MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
Typical Operating Circuit
19-6173; Rev 1; 12/14
Ordering Information appears at end of data sheet.
*Requires external pullups.
EVALUATION KIT AVAILABLE
General Description
The MAX14591 is a dual-channel, bidirectional logic-
level translator with the level shifting necessary to allow
data transfer in a multivoltage system. Externally applied
voltages, VCC and VL, set the logic levels on either side
of the device. A logic signal present on the VL side of the
device appears as the same logic signal on the VCC side
of the device, and vice-versa.
The device is optimized for the I2C bus as well as the
management data input/output (MDIO) bus where often
high-speed, open-drain operation is required. When TS
is high, the device allows the pullup to be connected to
the I/O port that has the power. This allows continuous
I2C operation on the powered side without any disruption
while the level translation function is off.
The part is specified over the extended -40NC to +85NC
temperature range, and is available in 8-bump WLP and
8-pin TDFN packages.
Applications
Devices with I2C Communication
Devices with MDIO Communication
General Logic-Level Translation
Benefits and Features
S Meets Industry Standards
I2C Requirements for Standard, Fast, and
High* Speeds
MDIO Open Drain Above 4MHz*
S Allows Greater Design Flexibility
Down to 0.9V Operation on VL Side
Supports Above 8MHz Push-Pull Operation
S Offers Low Power Consumption
23µA (typ) VCC Supply Current
0.5µA (typ) VL Supply Current
S Provides High Level of Integration
Pullup Resistor Enabled with One Side
Power Supply when TS Is High
12kI (max) Internal Pullup
Low Transmission Gate RON: 17I (max)
S Saves Space
8-Bump, 0.4mm pitch, 0.8mm x 1.6mm WLP
Package
8-Pin, 2mm x 2mm TDFN Package
VL = +1.2V
VL
*
VL
*
VCC
*
VCC
*
VCC = +3.0V
* PULLUPS ARE OPTIONAL FOR HIGH-SPEED, OPEN-DRAIN OPERATION.
0.1µF
+1.2V
SYSTEM
CONTROLLER
+3V
SYSTEM
GND GND GND
EN TS VLVCC
IOVL1 SDA
SLK
IOVL2 IOVCC2
IOVCC1
SDA
SLK
1µF
MAX14591
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
2Maxim Integrated
Voltages referenced to GND.
VCC, VL, TS .............................................................-0.5V to +6V
IOVCC1, IOVCC2 ................................... -0.5V to +(VCC + 0.5V)
IOVL1, IOVL2 ............................................-0.5V to +(VL + 0.5V)
Short-Circuit Duration IOVCC1, IOVCC2,
IOVL1, IOVL2 to GND ...........................................Continuous
VCC, IOVCC_ Maximum Continuous Current at +110°C ...100mA
VL, IOVL_ Maximum Continuous Current at +110°C .........40mA
TS Maximum Continuous Current at +110°C .....................70mA
Continuous Power Dissipation (TA = +70NC)
TDFN (derate 6.2mW/NC above +70NC) ...................... 496mW
WLP (derate 11.8mW/NC above +70NC)......................944mW
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range ............................ -65NC to +150NC
Lead Temperature (TDFN only, soldering, 10s) .............+300NC
Soldering Temperature (reflow) ......................................+260NC
TDFN
Junction-to-Ambient Thermal Resistance (BJA)............ 162NC/W
Junction-to-Case Thermal Resistance (BJC).................. 20NC/W
WLP
Junction-to-Ambient Thermal Resistance (BJA)............. 85NC/W
ABSOLUTE MAXIMUM RATINGS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +1.65V to +5.5V, VL = +0.9V to min(VCC + 0.3V, +3.6V), TA = -40NC to +85NC, unless otherwise noted. Typical values are at
VCC = +3V, VL = +1.2V, and TA = +25NC.) (Notes 2, 3)
PACKAGE THERMAL CHARACTERISTICS (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
Power Supply Range VL0.9 5.5 V
VCC 1.65 5.5
VCC Supply Current ICC IOVCC_ = VCC, IOVL_ = VL, TS = VCC 23 47 FA
VL Supply Current ILIOVCC_ = VCC, IOVL_ = VL, TS = VCC 0.5 6 FA
VCC Shutdown Supply Current ICC-SHDN
TS = GND 1 2.2 FA
TS = VCC, VL = GND, IOVCC_ = unconnected 1 2.2
VL Shutdown Supply Current IL-SHDN
TS = GND 0.1 1 FA
TS = VL, VCC = GND, IOVL_ = unconnected 0.1 1
IOVCC_, IOVL_ Three-State
Leakage Current ILEAK TA = +25NC, TS = GND 0.1 1 FA
TS Input Leakage Current ILEAK_TS TA = +25NC1FA
VCC Shutdown Threshold VTH_VCC TS = VL, VCC falling, VL = 0.9V 0.8 1.35 V
VL Shutdown Threshold VTH_VL TS = VCC, VL falling 0.15 0.3 0.8 V
VL Above VCC Shutdown
Threshold VTH_VL-VCC VL rising above VCC, VCC = +1.65V 0.4 0.73 1.1 V
IOVL_ Pullup Resistor RVL_PU Inferred from VOHL Measurements 3 7.6 12 kI
IOVCC_ Pullup Resistor RVCC_PU Inferred from VOHC Measurements 3 7.6 12 kI
IOVL_ to IOVCC_ DC
Resistance RIOVL-IOVCC Inferred from VOHx Measurements 6 17 I
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
3Maxim Integrated
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +1.65V to +5.5V, VL = +0.9V to min(VCC + 0.3V, +3.6V), TA = -40NC to +85NC, unless otherwise noted. Typical values are at
VCC = +3V, VL = +1.2V, and TA = +25NC.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LOGIC LEVELS
IOVL_ Input-Voltage High VIHL IOVL_ rising, VL = +0.9V,
VCC = +1.65V (Note 4) VL - 0.2 V
IOVL_ Input-Voltage Low VILL IOVL_ falling, VL = +0.9V,
VCC = +1.65V (Note 4) 0.15 V
IOVCC_ Input-Voltage High VIHC IOVCC_ rising, VL = +0.9V,
VCC = +1.65V (Note 4) VCC - 0.4 V
IOVCC_ Input-Voltage Low VILC IOVCC_ falling, VL = +0.9V,
VCC = +1.65V (Note 4) 0.2 V
TS Input-Voltage High VIH TS rising, VL = +0.9V or +3.6V, VCC > VLVL - 0.15 V
TS Input-Voltage Low VIL TS falling, VL = +0.9V or +3.6V, VCC > VL0.2 V
IOVL_ Output-Voltage High VOHL IOVL_ source current 20FA, VIOVCC_ = VL to
VCC (VCC R VL)0.7 x VLV
IOVL_ Output-Voltage Low VOLL IOVL_ sink current 5mA, VIOVCC_ P 0.05V 0.2 V
IOVCC_ Output-Voltage High VOHC IOVCC_ source current 20FA, VIOVL_ = VL 0.7 x VCC V
IOVCC_ Output-Voltage Low VOLC IOVCC_ sink current 5mA, VIOVL_ P 0.05V 0.25 V
RISE/FALL TIME ACCELERATOR STAGE
Accelerator Pulse Duration VL = +0.9V, VCC = +1.65V 9 22 48 ns
IOVL_ Output Accelerator
Source Impedance
VL = +0.9V, IOVL_ = GND, VCC = +1.65V 26 I
VL = +3.3V, IOVL_ = GND, VCC = +5V 6.8
IOVCC_ Output Accelerator
Source Impedance
VCC = +1.65V, IOVCC_ = GND 26 I
VCC = +5V, IOVCC_ = GND 6.5
THERMAL PROTECTION
Thermal Shutdown TSHDN +150 NC
Thermal Hysteresis THYST 10 NC
ESD PROTECTION
All Pins HBM ±2 kV
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
4Maxim Integrated
TIMING CHARACTERISTICS
(VCC = +1.65V to +5.5V, VL = +0.9V to +3.6V, VCC R VL, TS = VL, CVCC = 1FF, CVL = 0.1FF, CIOVL_ P 100pF, CIOVCC_ P 100pF, TA
= -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3V, VL = +1.2V and TA = +25NC. All timing is 10% to 90%
for rise time and 90% to 10% for fall time.) (Note 5)
Note 2: All devices are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by
design and not production tested.
Note 3: VL must be less than or equal to VCC during normal operation. However, VL can be greater than VCC during startup and
shutdown conditions.
Note 4: VIHL, VILL, VIHC, and VILC are intended to define the range where the accelerator triggers.
Note 5: Guaranteed by design.
Note 6: External pullup resistors are required.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Turn-On Time for Q1 tON VTS = 0V to VL (see the Block Diagram)80 200 Fs
IOVCC_ Rise Time tRCC
Push-pull driving, VL = +1.2V, VCC = +3V
(Figure 1) 3.7 10
ns
Open-drain driving, VL = +1.2V, VCC = +3V
(Figure 2) 7.9
IOVCC_ Fall Time tFCC
Push-pull driving, VL = +1.2V, VCC = +3V
(Figure 1) 5.1 15
ns
Open-drain driving, VL = +1.2V, VCC = +3V
(Figure 2) 6.1
IOVL_ Rise Time tRL
Push-pull driving, VL = +1.2V, VCC = +3V
(Figure 3) 2.7 8
ns
Open-drain driving, VL = +1.2V, VCC = +3V
(Figure 4) 13
IOVL_ Fall Time tFL
Push-pull driving, VL = +1.2V, VCC = +3V
(Figure 3) 2.8 12
ns
Open-drain driving, VL = +1.2V, VCC = +3V
(Figure 4) 3.3
Propagation Delay
(Driving IOVL_) tPD_LCC
Push-pull driving,
VL = +1.2V, VCC = +3V
(Figure 1)
Rising 3.4 7
ns
Falling 3 8
Propagation Delay
(Driving IOVCC_) tPD_CCL
Push-pull driving,
VL = +1.2V, VCC = +3V
(Figure 3)
Rising 1.9 3
ns
Falling 1.5 7
Channel-to-Channel Skew tSKEW Input rise time/fall time < 6ns 1.3 ns
Maximum Data Rate Push-pull operation 8MHz
Open-drain operation (Note 6) 4
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
5Maxim Integrated
Figure 1. Push-Pull Driving IOVL_
Figure 2. Open-Drain Driving IOVL_
Figure 3. Push-Pull Driving IOVCC_
Figure 4. Open-Drain Driving IOVCC_
IOVL_
VL
CL
20pF
RS
50I
VL
VCC
VCC
IOVCC_
GND
TS
50%
90%90%
10%10%
50%
50%
50%
tRCCtFCC
tPD_LCC
tPD_LCC
MAX14591
IOVL_
VL
CL
20pF
1kI1kI
VL
VCC
VCC
IOVCC_
GND
TS
90%90%
10%
10%
50%
tRCCtFCC
tPD_LCC tPD_LCC
RDSON
5I
50%
MAX14591
IOVL_
VL
CL
20pF
VL
VCC
VCC
IOVCC_
GND
TS
50%50%
50%
90%
10%10%
50%
tRL
tPD_CCL tPD_CCL
RS
50I
tFL
90%
MAX14591
IOVL_
VL
CL
20pF
1kI1kI
VL
VCC
VCC
IOVCC_
GND
TS
90%
10%
10%
50%
tPD_CCL
tRL tFL
tPD_CCL
RDSON
5I
90%
50%
MAX14591
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
6Maxim Integrated
Typical Operating Characteristics
(VCC = +3V, VL = +1.5V, RL = 1MI, CL = 15pF, push-pull driving data rate = 8Mbps, TA = +25NC, unless otherwise noted.)
VL DYNAMIC SUPPLY CURRENT
vs. VCC SUPPLY VOLTAGE
(OPEN-DRAIN DRIVING ONE IOVL_)
MAX14591E toc01
VCC (V)
VL SUPPLY CURRENT (µA)
4.954.403.30 3.852.752.20
20
40
60
80
100
120
140
160
180
200
0
1.65 5.50
VL DYNAMIC SUPPLY CURRENT
vs. VCC SUPPLY VOLTAGE
(PUSH-PULL DRIVING ONE IOVCC_)
MAX14591E toc02
VCC (V)
VL SUPPLY CURRENT (µA)
4.954.403.30 3.852.752.20
20
40
60
80
100
120
140
160
180
200
0
1.65 5.50
VCC DYNAMIC SUPPLY CURRENT
vs. VL SUPPLY VOLTAGE
(PUSH-PULL DRIVING ONE IOVL_)
MAX14591E toc03
VL (V)
VCC SUPPLY CURRENT (µA)
3.33.01.2 1.5 1.8 2.42.1 2.7
100
200
300
400
500
600
700
800
0
0.9 3.6
VCC DYNAMIC SUPPLY CURRENT
vs. VL SUPPLY VOLTAGE
(OPEN-DRAIN DRIVING ONE IOVCC_)
MAX14591E toc04
VL (V)
VCC SUPPLY CURRENT (µA)
3.33.01.2 1.5 1.8 2.42.1 2.7
100
200
300
400
500
600
700
800
0
0.9 3.6
VL DYNAMIC SUPPLY CURRENT
vs. TEMPERATURE
(OPEN-DRAIN DRIVING ONE IOVL_)
MAX14591E toc05
TEMPERATURE (°C)
VL SUPPLY CURRENT (µA)
603510-15
20
40
60
80
100
120
140
160
180
200
0
-40 85
VL DYNAMIC SUPPLY CURRENT
vs. TEMPERATURE
(PUSH-PULL DRIVING ONE IOVCC_)
MAX14591E toc06
TEMPERATURE (°C)
VL SUPPLY CURRENT (µA)
603510-15
20
40
60
80
100
120
140
160
180
200
0
-40 85
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
7Maxim Integrated
Typical Operating Characteristics (continued)
(VCC = +3V, VL = +1.5V, RL = 1MI, CL = 15pF, push-pull driving data rate = 8Mbps, TA = +25NC, unless otherwise noted.)
VL DYNAMIC SUPPLY CURRENT
vs. CAPACITIVE LOAD
(OPEN-DRAIN DRIVING ONE IOVL_)
MAX14591E toc07
CAPACITIVE LOAD (pF)
VL SUPPLY CURRENT (µA)
80604020
20
40
60
80
100
120
140
160
180
200
0
0 100
VCC DYNAMIC SUPPLY CURRENT
vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE IOVL_)
MAX1960 toc08
CAPACITIVE LOAD (pF)
VCC SUPPLY CURRENT (mA)
806020 40
0.2
0.4
0.6
0.8
1.2
1.0
1.4
1.6
0
0 100
RISE/FALL TIME vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE IOVL_)
MAX14591E toc09
CAPACITIVE LOAD (pF)
tRCC
RISE/FALL TIME (ns)
80604020
5
10
15
20
25
30
0
0 100
RS = 50I
tFCC
PROPAGATION DELAY
vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE IOVL_)
MAX1960 toc10
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
806020 40
2
4
6
8
12
10
14
16
0
0 100
tPD_LCC_FALL
tPD_LCC_RISE
RS = 50I
RISE/FALL TIME vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE IOVCC_)
MAX1960 toc11
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
806020 40
2
4
6
8
12
10
14
16
0
0 100
tFL
tRL
RS = 50I
PROPAGATION DELAY
vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE IOVCC_)
MAX1960 toc12
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
806020 40
2
1
3
4
5
7
6
8
9
0
0 100
RS = 50I
tPD_CCL_RISE
tPD_CCL_FALL
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
8Maxim Integrated
Typical Operating Characteristics (continued)
(VCC = +3V, VL = +1.5V, RL = 1MI, CL = 15pF, push-pull driving data rate = 8Mbps, TA = +25NC, unless otherwise noted.)
RIOVL-IOVCC vs. VL
MAX14591E toc13
VL (V)
RIOVL-IOVCC (I)
54321
1
2
3
4
5
6
0
06
VCC = 5.5V
VCC = 3.3V
VCC = 1.65V
VIOVL_ = 0.05V
IIOVCC_ = 3.3mA
RAIL-TO-RAIL DRIVING
(PUSH-PULL DRIVING ONE IOVL_)
MAX14591E toc14
VL = +1.5V
VCC = +3.3V
CL = 15pF
RL = 1MI
RS = 50I
IOVCC_
1V/div
40ns/div
IOVL_
1V/div
RAIL-TO-RAIL DRIVING
(OPEN-DRAIN DRIVING ONE IOVL_)
MAX14591E toc15
VL = +1.5V
VCC = +3.3V
CL = 100pF
RS = 50I
PULLUP ON
IOVL_ /IOVCC_ = 1kI
IOVCC_
1V/div
40ns/div
IOVL_
1V/div
RAIL-TO-RAIL DRIVING
(OPEN-DRAIN DRIVING ONE IOVL_)
MAX14591E toc15
VL = +1.5V
VCC = +3.3V
CL = 100pF
RS = 50I
PULLUP ON
IOVL_ /IOVCC_ = 1kI
IOVCC_
1V/div
40ns/div
IOVL_
1V/div
EXITING SHUTDOWN MODE
MAX14591E toc16
VL = 1.2V
VCC = 3.0V
IOVCC_ = 0V
CL = 100pF
RPU_VL = 50I
TS
500mV/div
IOVL_
500mV/div
10µs/div
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
9Maxim Integrated
Pin Description
Pin Configurations
BUMP/PIN NAME FUNCTION
WLP TDFN
A1 1 VLLogic Supply Voltage, +0.9V to min(VCC + 0.3V, +3.6V). Bypass VL to GND with a 0.1FF
ceramic capacitor as close as possible to the device.
A2 2 IOVL2 Input/Output 2. Reference to VL.
A3 3 IOVL1 Input/Output 1. Reference to VL.
A4 4 TS
Active-Low Three-State Input. Drive TS low to place the device in shutdown mode with
high-impedance output and internal pullup resistors disconnected. Drive TS high for normal
operation.
B1 8 VCC Power Supply Voltage, +1.65V to +5.5V. Bypass VCC to GND with a 1FF ceramic capacitor
as close to the device as possible.
B2 7 IOVCC2 Input/Output 2. Reference to VCC.
B3 6 IOVCC1 Input/Output 1. Reference to VCC.
B4 5 GND Ground
134
865
2
7
VCC
VCC
IOVCC1
IOVCC1
GND
GND
MAX14591
IOVCC2
IOVCC2
VL
VL
IOVL1
IOVL1
IOVL2
IOVL2
TDFN
BUMPS ON BOTTOM
TS
TS
+
A
12 34
B
+
TOP VIEW
MAX14591
WLP
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
10Maxim Integrated
Block Diagram
Detailed Description
The MAX14591 is a dual-channel, bidirectional level trans-
lator. The device translates low voltage down to +0.9V on
the VL side to high voltage on the VCC side and vice-ver-
sa. The device is optimized for open-drain and high-speed
operation, such as I2C bus and MDIO bus.
The device has low on-resistance (17I max), which
is important for high-speed, open-drain operation. The
device also features internal pullup resistors that are
active when the corresponding power is on and TS is high.
Level Translation
For proper operation, ensure that +1.65V P VCC P +5.5V,
and +0.9V P VL P VCC. When power is supplied to VL
while VCC is less than VL, the device automatically
disables logic-level translation function. Also, the device
enters shutdown mode when TS = GND.
High-Speed Operation
The device meets the requirements of high-speed I2C
and MDIO open-drain operation. The maximum data rate
is at least 4MHz for open-drain operation with the total
bus capacitance equal to or less than 100pF.
Three-State Input TS
The device features a three-state input that can put the
device into high-impedance mode. When TS is low,
IOVCC_ and IOVL_ are all high impedance and the inter-
nal pullup resistors are disconnected. When TS is high,
the internal pullup resistors are connected when the
corresponding power is in regulation, and the resistors
are disconnected at the side that has no power on. In
many portable applications, one supply is turned off but
the other side is still operating and requires the pullup
resistors to be present. This feature eliminates the need
for external pullup resistors. The level translation function
is off until both power supplies are in range.
Thermal-Shutdown Protection
The device features thermal-shutdown protection to
protect the part from overheating. The device enters
thermal shutdown when the junction temperature exceeds
+150NC (typ), and the device is back to normal operation
again after the temperature drops by approximately 10NC
(typ). When the device is in thermal shutdown, the level
translator is disabled.
ONE-SHOOT
BLOCK
ONE-SHOOT
BLOCK
EN CONTROL
BLOCK
GATE
DRIVE
IOVL_
NQ1
IOVCC_
VLVCCTS
MAX14591
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
11Maxim Integrated
Figure 6. Human Body Current WaveformFigure 5. Human Body ESD Test Model
Applications Information
Layout Recommendations
Use standard high-speed layout practices when
laying out a board with the MAX14591. For example, to
minimize line coupling, place all other signal lines not con-
nected to the device at least 1x the substrate height of the
PCB away from the input and output lines of the device.
Extended ESD
ESD protection structures are incorporated on all pins to
protect against electrostatic discharges up to ±2kV (HBM)
encountered during handling and assembly. After an ESD
event, the device continues to function without latchup.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Human Body Model
Figure 5 shows the Human Body Model. Figure 6 shows
the current waveform it generates when discharged
into a low impedance. This model consists of a 100pF
capacitor charged to the ESD voltage of interest that is
then discharged into the device through a 1.5kI resistor.
36.8%
tRL TIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
10%
00
AMPERES
IP 100%
90%
CHARGE CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
CS
100pF
RC
1MI
RD
1.5kI
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
12Maxim Integrated
Ordering Information
Note: All devices are specified over -40NC to +85NC operating
temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PART TOP MARK PIN-PACKAGE
MAX14591ETA+T BNS 8 TDFN
MAX14591EWA+T AAD 8 WLP
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 TDFN T822CN+1 21-0487 90-0349
8 WLP W80A1+1 21-0555
Refer to
Application
Note 1891
MAX14591
High-Speed, Open-Drain Capable
Logic-Level Translator
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
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Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 5/11 Initial release —
1 12/14 Updated Ordering Information and Package Information 12
