Philips Semiconductors Integrated Circuits Video analog input interface Product specification TDA8709A (A FEATURES 8-bit resolution Sampling rate up to 32 MHz TTL-compatible digital inputs and outputs Internal reference voltage regulator GENERAL DESCRIPTION The TDA8709A Is an analog input interface for video signal processing. It includes a an input selector (one out-of-three video signals), video amplifier with clamp and external gain control, an 8-bit analog-to-digital converter (ADC) with a sampling rate of 32 MHz and an * Low-level AC clock inputs and outputs input selector. Clamp function with selection for 16 or 128' No sample-and-hold circuit required * Three selectable video inputs. APPLICATIONS * Video signal processing Digital picture processing Frame grabbing. * Colour difference signals (U, V) * R, G, B signals Chrominance signal (C). QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT Voca analog supply voltage 4.5 5.0 5.5 Vv Vecp digital supply voltage 4.5 5.0 5.5 Vv Veco TTL output supply voltage 4.2 5.0 5.5 Vv loca analog supply current - 40 47 mA loco digital supply current - 24 30 mA leco TTL output supply current - 12 16 mA ILE DC integral linearity error - - +1 LSB DLE DC differential linearity error - - 20.5 LSB f, maximum clock frequency 30 32 - MHz B maximum -3 dB bandwidth (preamplifier) 12 18 - MHz Prot total power dissipation - 380 12 mw ORDERING INFORMATION PACKAGE TYPE NUMBER PINS PIN POSITION MATERIAL CODE TDA8709A 28 DIP plastic SOT117-1 TDA8709AT 28 SO28L plastic SOT136-1 June 1994 654 71104eb 00789869 O73Philips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A BLOCK DIAGRAM analog video input video input voltage ADC clock decoupling selection bit selection bit 1 output input input input TTL outputs Yoco 5) | 14 15 VIDEO 19 |20 5 21 7 AMPLIFIER video input 0 : INPUT 8 -bit 9 fast output P' - bil . chip enable video input 1 40 | SELECTOR ADC 1 by video input 2 + 2 clamp capacitor __ [24 3 o6 connection DS in control 25 TTL t+ D4 jaa ol ee apt TDAS709A OUTPUTS! 10] | os | & 5 {] > > 02 o1 CLAMP LEVEL "16" 131, po DIGITAL COMPARATOR CLAMP 26} puta LOGIC selection CLAMP LEVEL "128" DIGITAL COMPARATOR 4 27 26 | 6 Te [22 Ps MeB051 | clamp clamp digital Vocp digital analog Voca analog level pulse @5V ground (+5) ground selection Fig.1 Block diagram. June 1994 655 MB 7110826 0078990 355 omPhilips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A PINNING SYMBOL | PIN DESCRIPTION D7 1 | data output; bit 7 (MSB) D6 2 | data output; bit 6 D5 3 | data output; bit 5 D4 4 | data output; bit 4 CLK 5 | clock input o7 {4 U 28] OFS Veep 6 digital supply voltage (+5 V) pe! 2 [27] cLs Veco 7 |TTL outputs supply voltage (+5 V) ps [3] 26] CLP DGND 8 | digital ground oa cj 35] GAIN FOEN 9 | fast output chip enable a D3 10 | data output; bit 3 anKls 24) CLAMP D2 41 | data output; bit 2 Veen [8 [23] AGND Thi v 7 22] i Di 12 | data output; bit 1 cco Z| aoa [z2) Yoon DO 13 | data output; bit 0 (LSB) peno [3] 21] DEC io 14 | video input selection bit 0 FOEN I 20] ADCIN M1 15 | video input selection bit 1 D3 {| i) ANOUT VINO 16 | video input 0 oe fi re] vine VINI 17 | video input 1 VIN2 18 | video input 2 o1 [3 7] viny ANOUT | 19 | analog voltage output Do [1s [16] vino ADCIN 20 | analog-to-digital converter input 10 [aa] is} 4 DEC 21 } decoupling input MBB050 Voca 22 | analog supply voltage (+5 V) AGND 23 | analog ground CLAMP 24 | clamp capacitor connection GAIN 25 | gain control input CLP 26 | clamping pulse 7 amping level selection input CLS 27_| clamping level S ection np Fig.2 Pin configuration. OFS 28 | output format selection June 1994 656 MB 7110826 0078991 721Philips Semiconductors Integrated Circuits Video analog input interface Product specification TDA8709A FUNCTIONAL DESCRIPTION TDA8709A is an 8-bit ADC with internal clamping and a preamplifier with adjustable gain. The clamping value is switched via pin 27 between pin 28. digital 16 (for R, G, B signals) and digital 128 (for chrominance or colour difference signals). While clamping pulse at pin 27 is lagic 1, the device will adjust the clamping level to the chosen value. The output format can be selected between binary and two's complement at LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT Voca analog supply voltage -0.3 +7.0 Vv Veep digital supply voltage -0.3 +7.0 Vv Veco TTL output supply voltage -0.3 +7.0 Vv AVeco Supply voltage difference between Veca and Vecp -0.5 +0.5 Vv supply voltage difference between Vcco and Vecp -0.5 +0.5 Vv supply voltage difference between Veca and Veco -1.6 +1.0 Vv Vi input voltage 0.3 +7.0 Vv lo output current - +10 mA Tstg storage temperature ~55 +150 C Tamb operating ambient temperature 0 +70 C T junction temperature 0 +125 C THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT Pith pa thermal resistance from junction to ambient in free air SOT117-14 55 K/w SOT136-1 70 K/W June 1994 657 MB 71104eb 0078992 bbsPhilips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A CHARACTERISTICS Voeca = Vaz tO V2g = 4.5 to 5.5 V; Veen = Ve to Vag = 4.5 to 5.5 Vi Veco = V7 to Vg = 4.2 to 5.5 V; AGND and DGND shorted together; Veca to Vecp = -0.5 to +0.5 V; Veco to Veep = -0.5 to +0.5 V; Voca tO Veco = -0.5 to +0.5 V; Tamb = 0 to +70 C; typical readings taken at Veca = Vecp = Veco = 5 V and Tamb = 25 C; unless otherwise specified. SYMBOL PARAMETER conpitions | min. | Typ. | MAX | UNIT Supplies Voca analog supply voltage 4.6 .0 5.5 Vv Veep digital supply voltage 4.5 5.0 5.5 Vv Veco TTL output supply voltage 4.2 5.0 5.5 Vv loca analog supply current - 40 47 mA leeo digital supply current - 24 30 mA leco TTL output supply current TTL load (see Fig.7) - 12 16 mA Preamplifier inputs VINO To VIN2 INPUTS Vicp-p) input voltage (peak-to-peak vaiue) note 1 0.6 - 1.5 Vv |Z, input impedance fj = 6 MHz 10 20 - kQ Cc input capacitance f, = 6 MHz - 1 - pF 10 AND 11 TTL INPUTS (SEE TABLE 1) Vit LOW level input voltage Oo - 0.8 Vv Vin HIGH {evel input voltage 2.0 - Veen |V hie LOW level input current Vv, 20.4V -400 ~|- - pA hi HIGH level input current Vi=27V - - 20 pA CLS, OFS AND CLP TTL Inputs (SEE Fia.) Vit LOW level input voitage Qo - 0.8 v Vin HIGH level input voltage 2.0 - Veco |V lie LOW level input current Vi =0.4V 400 - - pA le HIGH level input current Vi=2.7V - - 20 pA tee clamp pulse width 2 - - Bs GAIN INPUT (PIN 25) Ves(min) input voltage for minimum gain see Fig.9 - 1.8 - Vv V25(mad input voltage for maximum gain see Fig.9 - 3.8 - Vv h input current - 1.0 - pA CLAMP INPUT (PIN 24) Vou clamp voltage for code 128 output - 3.5 |- Vv toa clamp output current see Table 2 June 1994 658 Me 7110426 0078993 STYPhilips Semiconductors Intagrated Circuits Product specification Video analog input interface TDA8709A SYMBOL | PARAMETER conpirions = { MIN. | TYP, | Max. | unir Video amplifier outputs ANOUT OUTPUT (PIN 19) Vie@p-p AC output voltage Vor = 1.33 V (p-p); - 1.33 - Vv (peak-to-peak value) Vas = 3.0 V lig internal current source RL = 2.0 2.5 - mA low-p) output current driven by the load Vanout = 1.33 V (p-p); | - - 1.0 mA note 2 Vig DC output voltage for black level CLS = logic 1 - Veca - 2.02 | ~ Vv Vio DC output voltage for black level CLS = logic 0 - Vera -2.6 J- Vv 219 output impedance - 20 - Q Preamplifier dynamic characteristics Cet crosstalk between VIN inputs Veeca = 4.75 to 5.25 V; - -50 -45 dB note 3 Gaer differential gain Vvin = 1.33 V (p-p); - 2 - % Vo5 = 3.0V att differential phase Vin = 1.33 V (p-p); - 0.8 - deg Vas =3.0V B 3 dB bandwidth 12 - - MHz S/N signal-to-noise ratio note 4 60 - - dB SVRRI1 supply voltage ripple rejection note 5 - 45 - dB AG gain range see Fig.9 4.5 - +6.0 dB Gotab gain stability as a function of supply | see Fig.9 - - 5 % voltage and temperature Analog-to-digital converter inputs CLK INPUT (PIN 5) Vit LOW level input voltage 0 - 0.8 v Vin HIGH level input voltage 2.0 - Veco |V lic LOW level input current Vem = 0.4 V ~400 | - - pA hin HIGH level input current Vom = 2.7V - - 100 pA [Zl input impedance fo = 10 MHz - 4 - kQ Cc input capacitance fon = 10 MHz - 4.5 - pF FOEN INPUT (SEE TABLE 3) Vit LOW level input voltage 0 - 0.8 v Vin HIGH level input vottage 2.0 - Veep |[V tie LOW level input current V9 =0.4V 400 - - BA fin HIGH level Input current Vg =2.7V - - 20 pA June 1994 659 @e 71104e6b 00789954 430Philips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A SYMBOL | PARAMETER conpmions | min. | Typ. | MAX | UNIT ADCGIN INPUT (PIN 20; SEE TABLE 4) Vo0 input voltage digital output = 00 - Veca 2.52 | - Vv Vo0 input voltage digital output = 255 - Voea - 1.52] - Vv Vo20(p-p) input voltage amplitude - 1.0 ~- Vv (peak-to-peak value) loo input current - 1.0 10 pA \2i] input impedance f,= 6 MHz - 50 - Ma CQ input capacitance f, = 6 MHz - 1 ode pF Analog-to-digital converter outputs DIGITAL OUTPUTS DO To D7 Vor LOW level output voltage lol = 2mMA 0 - 0.6 Vv Vou HIGH level output voltage lo. = -0.4 MA 2.4 - Veeo |V loz output current in 3-state mode 0.4 V < Vo< Veep -20 - +20 uA Switching characteristics fakimay __ | Maximum clock input frequency | see Fig.5; note 6 [30 [32 |- | MHz Analog signal processing (fe = 32 MHz; see Fig.7) Gast differential gain Veo = 1.0 V (p-p); - 2 - % see Fig.6; note 7 Qaitt differential phase see Fig.6; note 7 - 2 - deg f; fundamental harmonics (full-scale) _| f, = 4.43 MHz; note 7 - - 0 dB fait harmonics (full-scale); f, = 4.43 MHz; note 7 - -55 - dB all components SVRR2 supply voltage ripple rejection note 8 - 1 5 IN Transfer function ILE DC integral linearity error - - #1 LSB DLE DC differential linearity error - - +0.5 LSB ILE AC integral linearity error note 9 - - +2 LSB Timing (f,\, = 32 MHz; see Figs 5, 6 and 7) DIGITAL OUTPUTS (C, = 15 pF; lo. = 2 MA; RL = 2 k2Q2) tus sampling delay time - 2 - ns th output hold tine - & - ns tg output delay time - 16 20 ns tuez 3-state delay time; output enable - 16 25 ns tapz 3-state delay time; output disable - 12 25 ns June 1994 660 M@@ 71104826 0078995 377Philips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A Notes to the Characteristics 1. 2. 0 dB is obtained at the AGC amplifier when applying Vie-p) = 1.33 V. The output current at pin 19 should not exceed 1 mA. The load impedance R, should be referenced to Veca and defined as: a) AC impedance 21 kQ and the DC impedance >2.7 kQ. b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by the clamp is not disturbed. Input signals with the same amplitude. Gain is adjusted to obtain ANOUT = 1.33 V (p-p). Signal-to-noise ratio measured with 5 MHz bandwidth: Vv S. 20 logANOUT (P-2) at B = 5 MHz, N ANOUT {RMS noise) The voltage ratio is expressed as: AVoca_ G x = for V; = 1 V (p-p), gain at 100 kHz = 1 and1V supply variation. SVRR1 = 20 log Veca AG It is recommended that the rise and fall times of the clock are =2 ns. In addition, a good layout for the digital and analog grounds is recommended. These measurements are realized on analog signals after a digital-to-analog conversion (TOA8702 Is used). The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply variation: svaro = Sitio) Viger) + Yi (00) ~ Yivery) AVoca Full-scale sine wave (f, = 4.4 MHz; fy, = 27 MHz). June 1994 661 MB 7110826 007489946 203Philips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A Table 1 Video input selection (CVBS). Table 3 FOEN input coding. 1 fo SELECTED INPUT FOEN DO TO D7 0 0 VINO a active, two's complement oO 1 VINA 1 high impedance 1 0 VIN2 1 1 VIN1 Table 2 CLAMP output current. CLS CLP uTpUT leLawp 1 1 output < 128 +50 pA output > 128 -50 pA xa) oO X OpA oO 1 output < 16 +50 pA 16 < output -50 pA Note 1. X=don't care. Table 4 Output coding and input voltage (typical values). BINARY OUTPUTS TWO'S COMPLEMENT STEP Vapcin p7 | ps | ps | pa} o3 | p2 | D1 | Do | D7 | D | DS | D4 | D3 | D2 Di | DO Underfiow = ololtolololo;lolo|i{!oj/olojofof[ofo 0 Voa-zsevio|o|ofoflo[o[ojofi[ofo]o]ojo|jolo 1 - olfolo}joltololo|li}/71|of[olofofojo]1 254 - i 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 255 Veca 1.52V] 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Overflow - 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 June 1994 662 me 7110826 0078997 LTPhilips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A 5 MHz sine wave >, 1.0V Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements. digital MBa000 output fevel 498"! Cle=4 black-level 16"| CLS =2 clamping cup =] fo teur t Fig.4 Control mode selection. June 1994 663 Mi 7110826 00789598 O86Philips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A cLK j--\-f Meteors towel input asy) sample N+1 sample analog N input | (ADCIN) th 24V data outputs data N-3 data N-2 data N-~1 data N data N+1 DO to D7) K K o4V _ ta lee MBBDSa Fig.5 Timing diagram. av FOEN oe KL input o8V data Ye high-impedance ty; Hy 24V utputs f y Ye oo D7) Yip ty YY cay tapz Manes7 Fig.6 Output format timing diagram. June 1994 664 Mi 7110826 0074999 TlePhilips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A DO to D7 eee | MBBISS Fig.7 Load circuit for timing measurement: data outputs (FOEN = LOW). Veco 2ka DO to D7 | 15 pF IN916 or IN3O64 MBa0R65 OGND Fig.8 Load circuit for timing measurement: 3-state outputs (FOEN: fj= 1 MHz; Veoen = 3 V). June 1994 665 mM 71106e6 00759000 332Philips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A MBBC? - 7 -8 1.6 2.4 3.2 40 Vos) (1) Typleal value (Voca = Veco = 5 Vi Tamp = 25 C). 2 Mini and i values (temp and supply). Fig.9 Typical gain control curve as a function of gain voltage. June 1994 666 MB 7110826 0079001 277Product specification Philips Semiconductors Integrated Circuits TDA8709A Video analog input interface INTERNAL PIN CIRCUITRY uopesnByuoo ud ewe 01 6/4 Nioay INONY 2NIA PUB NIA 'ONIA og ud 61 Wd 91 O91 sud ONDy oNovYo ONDY anova tors] toto. ' } ra x of] T 44-14 x 0 (3 VOD, dnWI9 anew e2 ud T~ le + le. < volevdlL ONSoci tT? rar be nT > 14 i AGE | 92, 099, NWS $2 urd $1040 F710 10510 82 00 2 oz suid yO $140 41 cud N304 Bud wndu yo0}9 guid syNdyNo Bpsp L O01 pus yO}% Bud 667 June 1994 Mm 71108eb 007900e 105 MePhilips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A APPLICATION INFORMATION Additional information can be found in the laboratory report of TDA8708A FBL/AN9308". Voca L 7-4 1 28 + 2 27 + data outputs 3 26 4 hori I clamp 220 nF t 4 25 { 4002 33 pF 16nF clock 5 2+ EK 6 23t--fR * * 22 nF = 1 pF 10 nF +5V 7 22 Lg TPT it 5Vv 22 2 <= 22 nF TDAB709A " yt 8 21-4 +sv 1pF +19 20}- LOW PASS FILTER | ? 10 19 4,7 pF au 1s -____] data outputs 4.7 pF 752 112 17H] 4.7 wF 752 13 16-+] ma e 14 15 MBB05 - 1 (1) Itis recommended to decouple Veco through a 22 Qresistor especially when the output data of TOA8709A interfaces with a capacitive CMOS load device. (2) See Figs 12, 14, 16 and 18 for examples of the low-pass filters. Fig.11 Application diagram. June 1994 668 M@@ 7110426 0079003 O41Philips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A ANOUT ADCIN (pin 19) (pin 20) This fitter can be adapted to various ions with respect to perf must in any event be applied. qui An input and output impedance of at least 680 and 2.2 ke Fig.12 Example of a low-pass filter for RGB and C signals. Characteristics of Fig.13 * Order 5; adapted CHEBYSHEV * Ripple p s 0.4 dB * f=6.5 MHz at -3 dB * fhotch = 9.65 MHz. 0 10 20 f (MHz) 30 Fig.13 Frequency response for filter shown in Fig.12. June 1994 669 Me 7110826 oor7qdoo4 T6dPhilips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A ADOUT ssn | Saul ADCIN {pin 19) Voca {pin 22) This fiter can be adapted to various applications with respect to perf qui ts. An input and output impedance of at least 660 (2 and 2.2 ks must in any event be applied. Fig.14 Example of an economical low-pass filter for RGB and C signais. MSA681 (dB) -10 -40 0 19 20 f (MHz) Fig.15 Frequency response for filter shown in Fig.14. June 1994 M8 7110826 0079005 514 670 Characteristics of Fig.15 Order 3; adapted CHEBYSHEV * Ripple p s 0.4 dB f=6.5 MHz at -3 dB.Philips Semiconductors Integrated Circuits Product specification Video analog input interface TDA8709A ANOUT (pin 19) This filter can be adapted to various applications with pect to perf qui An input and output impedance of at least 680 2 and 2.2 kQ must in any event be applied. Fig.16 Example of a low-pass filter for U and V signals. Characteristics of Fig.17 * Order 5; adapted CHEBYSHEV Ripple p < 0.4 dB * f=2.3 MHz at ~3 dB di! 8) * fhotch = 4.5 MHz. 20 -40 -60 -100 0 f (MHz) Fig.17 Frequency response for filter shown in Fig.16. June 1994 671 Mf 7110826 OO7900b 3650Philips Semiconductors Intagrated Circuits Product specification Video analog input interface TDA8709A 180 pH ANOUT ADCIN (pin 19) (pin 20) Voca (pin 22) This filter can be adapted to various applications with respect to perf 4 An input and output impedance of at least 680 Q2 and 2.2 Kae must in any event be applied. Fig.18 Example of an economical iow-pass filter for U and V signals. Characteristics of Fig.19 * Order 3; adapted CHEBYSHEV Msaore Ripple p s 0.3 dB f=2.8 MHz at -3 dB * frotch = 11.9 MHz. -80 o 10 20 (MHZ) Fig.19 Frequency response for filter shown in Fig.18. June 1994 672 MH 71108eb 0079007 797