uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Meets or Exceeds the Requirements of
ANSI Standards EIA/TIA-423-B and -232-E
and ITU Recommendations V.10 and V.28
D
Output Slew Rate Control
D
Output Short-Circuit-Current Limiting
D
Wide Supply Voltage Range
D
8-Pin Package
D
Designed to Be Interchangeable With
National DS9636A
description
The uA9636AC is a dual, single-ended line driver designed to meet ANSI Standards EIA/TIA-423-B and
EIA/TIA-232-E and ITU Recommendations V.10 and V.28. The slew rates of both amplifiers are controlled by
a single external resistor , R(WS), connected between the wave-shape-control (W-S) terminal and GND. Output
current limiting is provided. Inputs are compatible with TTL and CMOS and are diode protected against negative
transients. This device operates from ±12 V and is supplied in an 8-pin package.
The uA9636AC is characterized for operation from 0°C to 70°C.
logic symbol
7
6
1
2
3
W-S
1A
2A
1Y
2Y
[Slew-Rate]
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
logic diagram
71Y
62Y
2
1A
3
2A
W-S 1
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
W-S
1A
2A
GND
VCC+
1Y
2Y
VCC
D OR P PACKAGE
(TOP VIEW)
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
schematics of inputs and outputs
VCC+
EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS
Input
VCC±
Current
Source Current
Source
VCC+
Output
VCC±
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Positive supply voltage range, VCC+(see Note 1) VCC to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Negative supply voltage range, VCC 0.5 V to –15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, VO ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, IO ±150 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: All voltage values are with respect to the network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
T
A
25°CDERATING FACTOR T
A
= 70°C
PACKAGE
A
POWER RATING ABOVE TA = 25°C
A
POWER RATING
D725 mW 5.8 mW/°C 464 mW
P1000 mW 8.0 mW/°C 640 mW
recommended operating conditions
MIN NOM MAX UNIT
Positive supply voltage, VCC+ 10.8 12 13.2 V
Negative supply voltage, VCC 10.8 –12 13.2 V
High-level input voltage, VIH 2 V
Low-level input voltage, VIL 0.8 V
W ave-shaping resistor, R(WS) 10 1000 k
Operating free-air temperature, TA0 70 °C
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of free-air temperature, supply voltage, and
wave-shaping resistance (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYPMAX UNIT
VIK Input clamp voltage II = –15 mA 1.1 1.5 V
RL = 55.6 6
VOH High-level output voltage VI = 0.8 V RL = 3 k to GND 5 5.6 6 V
RL = 450 to GND 4 5.4 6
RL = –65.7 –5
VOL Low-level output voltage VI = 2 V RL = 3 k to GND –65.6 –5 V
RL = 450 to GND –65.4 –4
IIH
High level in
p
ut current
VI = 2.4 V 10
µA
I
IH
High
-
le
v
el
inp
u
t
c
u
rrent
VI = 5.5 V 100 µ
A
IIL Low-level input current VI = 0.4 V –20 –80 µA
IOOutput current (power off) VCC± = 0, VO = ± 6 V ±100 µA
IOS
Short circut out
p
ut current§
VI = 2 V 15 25 150
mA
I
OS
Sh
or
t
-c
i
rcu
t
ou
t
pu
t
curren
t§
VI = 0 –15 –40 150
mA
rOOutput resistance RL = 450 25 50
ICC
Positive su
pp
ly current
V
CC
= ±12 V, V
I
= 0,
13
18
mA
I
CC+
Positi
v
e
s
u
ppl
y
c
u
rrent
CC ,
R(WS) = 100 k,
I,
Output open
13
18
mA
ICC
Negative su
pp
ly current
VCC = ±12 V, VI = 0,
13
18
mA
I
CC
Negati
v
e
s
u
ppl
y
c
u
rrent
CC
R(WS) = 100 k,
I
Output open
13
18
mA
All typical values are at VCC = ±12 V, TA = 25°C.
The algebraic convention, in which the less-positive (more-negative) limit is designated as minimum, is used in this data sheet for logic voltage
levels, e.g., when –5 V is the maximum, the minimum is a more-negative voltage.
§Not more than one output should be shorted to ground at a time.
switching characteristics, VCC± = ±12 V, TA = 25°C (see Figure 1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
R(WS) = 10 k0.8 1.1 1.4
tTLH
p
RL= 450 k
CL=30
p
F
R(WS) = 100 k811 14
µs
t
TLH
,
w-
-
v
u
u
R
L =
450
k
,
C
L =
30
pF
R(WS) = 500 k40 55 70 µ
s
R(WS) = 1 M80 110 140
R(WS) = 10 k0.8 1.1 1.4
tTHL
p
RL= 450 k
CL=30
p
F
R(WS) = 100 k811 14
µs
t
THL
,
-
w-
v
u
u
R
L =
450
k
,
C
L =
30
pF
R(WS) = 500 k40 55 70 µ
s
R(WS) = 1 M80 110 140
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC+
Input
VCC±
50
R(WS) RLCL = 30 pF
(see Note A)
TEST CIRCUIT
Output
90%
10%
3 V
0 V
VOH
VOL
tTLH
tTHL
Output
Input
(see Note B)
VOLTAGE WAVEFORMS
90%
10%
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: tr 10 ns, tf 10 ns, ZO = 50 , PRR 1 kHz,
duty cycle = 50%.
Figure 1. Test Circuit and Voltage Waveforms
TYPICAL CHARACTERISTICS
Figure 2
VO – Output Voltage – V
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
0 0.4 0.8 1.2 1.6 2
12
–8
–6
–4
–2
0
2
4
6
8
10
VIInput VoltageV
ÁÁ
ÁÁ
VO
VCC± = ±12 V
R(WS) = 100 k
RL = 450
TA = 70°C
TA = 25°C
TA = 0°C
Figure 3
200
150
100
50
0
–50
100
150
200
76543210–1
250 8
250
–2
II – Input Current –
INPUT CURRENT
vs
INPUT VOLTAGE
VIInput VoltageV
IIµ
VCC± = ±12 V
R(WS) = 100 k
TA = 70°C
TA = 0°C
TA = 0°C
TA = 25°C
TA = 70°C
TA = 25°C
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 4
–10
50
10
–50 –8 –6 –4 –2 0 2 4 6 8
–40
–30
–20
–10
0
10
20
30
40
VI = 0
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
(POWER ON)
VO – Output Voltage – V
Am– Output Current – IO
VCC± = ±12 V
R(WS) = 100 k
TA = 25°C
VI = 2 V
Figure 5
80
60
40
20
0
–20
–40
–60
–80
86420–2–4–6–8
100 10
100
–10
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
(POWER OFF)
VO – Output Voltage – V
Aµ– Output Current – IO
VCC
"
= 0
VI = 0
TA = 25°C
0.01
1000
10
1
2
4
7
10
20
40
100
70
200
400
700
0.10.04 0.4 1 4
TRANSITION TIME
vs
WAVE-SHAPING RESISTANCE
R(WS) – Wave-Shaping Resistance – M
tTLH tTLH
, – Transition Time – µs
TA = 0°C
TA = 70°C
Figure 6
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
5 V
12 V
R(WS)
12 V
uA9636A uA9637A
Twisted Pair
or
Flat Cable
Figure 7. EIA/TIA-423-B System Application
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
UA9636ACD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA9636ACDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA9636ACDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA9636ACDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA9636ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA9636ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA9636ACJG OBSOLETE CDIP JG 8 TBD Call TI Call TI
UA9636ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
UA9636ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 23-Apr-2007
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
UA9636ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UA9636ACDR SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
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