500 kbps, ESD Protected, Half-/Full-Duplex, iCoupler, Isolated RS-485 Transceiver ADM2484E FEATURES FUNCTIONAL BLOCK DIAGRAM VDD1 VDD2 ADM2484E DE GALVANIC ISOLATION TxD Y Z A RxD B RE GND1 GND2 06984-001 Isolated, RS-485/RS-422 transceiver, configurable as half- or full-duplex 15 kV ESD protection on RS-485 input/output pins 500 kbps data rate Complies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482: 1987(E) Suitable for 5 V or 3.3 V operation (VDD1) High common-mode transient immunity: >25 kV/s True fail-safe receiver inputs 256 nodes on the bus Thermal shutdown protection Safety and regulatory approvals pending UL recognition 5000 V rms isolation voltage for 1 minute per UL1577 VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 Reinforced insulation, VIORM = 848 V peak Operating temperature range: -40C to +85C Wide body, 16-lead SOIC package Figure 1. APPLICATIONS Isolated RS-485/RS-422 interfaces Industrial field networks INTERBUS Multipoint data transmission systems GENERAL DESCRIPTION The ADM2484E is an isolated data transceiver with 15 kV ESD protection suitable for high speed, half- or full-duplex communication on multipoint transmission lines. For halfduplex operation, the transmitter outputs and receiver inputs share the same transmission line. Transmitter Output Pin Y links externally to Receiver Input Pin A, and Transmitter Output Pin Z links externally to Receiver Input Pin B. Designed for balanced transmission lines, the ADM2484E complies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482: 1987(E). The device employs Analog Devices, Inc., iCoupler(R) technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package. The differential transmitter outputs and receiver inputs feature electrostatic discharge circuitry that provides protection up to 15 kV using the human body model (HBM). The logic side of the device can be powered with either a 5 V or a 3.3 V supply, whereas the bus side requires an isolated 3.3 V supply. The device has current-limiting and thermal shutdown features to protect against output short circuits and situations where bus contention causes excessive power dissipation. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved. ADM2484E TABLE OF CONTENTS Features .............................................................................................. 1 Test Circuits ..................................................................................... 10 Applications ....................................................................................... 1 Switching Characteristics .............................................................. 11 Functional Block Diagram .............................................................. 1 Circuit Description......................................................................... 12 General Description ......................................................................... 1 Electrical Isolation...................................................................... 12 Revision History ............................................................................... 2 Truth Tables................................................................................. 12 Specifications..................................................................................... 3 Thermal Shutdown .................................................................... 13 Timing Specifications .................................................................. 4 True Fail-Safe Receiver Inputs .................................................. 13 Package Characteristics ............................................................... 4 Magnetic Field Immunity.......................................................... 13 Regulatory Information (Pending) ............................................ 4 Applications Information .............................................................. 14 Insulation and Safety-Related Specifications ............................ 5 Isolated Power Supply Circuit .................................................. 14 VDE 0884 Insulation Characteristics (Pending) ...................... 5 PC Board Layout ........................................................................ 14 Absolute Maximum Ratings............................................................ 6 Typical Applications ................................................................... 15 ESD Caution .................................................................................. 6 Outline Dimensions ....................................................................... 16 Pin Configuration and Function Descriptions ............................. 7 Ordering Guide .......................................................................... 16 Typical Performance Characteristics ............................................. 8 REVISION HISTORY 5/08--Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADM2484E SPECIFICATIONS All voltages are relative to their respective grounds, 3.0 V VDD1 5.5 V and 3.0 V VDD2 3.6 V, all minimum/maximum specifications apply over the entire recommended operation range, all typical specifications are at TA = 25C, VDD1 = 5 V, and VDD2 = 3.3 V, unless otherwise noted. Table 1. Parameter SUPPLY CURRENT Power Supply Current, Logic Side TxD/RxD Data Rate = 500 kbps Power Supply Current, Bus Side TxD/RxD Data Rate = 500 kbps DRIVER Differential Outputs Differential Output Voltage |VOD| for Complementary Output States Common-Mode Output Voltage |VOC| for Complementary Output States Output Leakage Current (Y, Z Pins) Symbol Max Unit Test Conditions IDD1 2.0 2.0 mA mA Unloaded VDD2 = 5.5 V, half duplex configuration, RTERMINATION = 120 , see Figure 20 IDD2 3.0 40 mA mA Unloaded VDD2 = 5.5 V, half duplex configuration, RTERMINATION = 120 , see Figure 20 2.0 3.6 V 1.5 1.5 3.6 3.6 0.2 3.0 0.2 +30 250 V V V V V A A mA Loaded, RL = 100 (RS-422), see Figure 14 RL = 54 (RS-485), see Figure 14 -7 V VTEST 12 V, see Figure 15 RL = 54 or 100 , see Figure 14 RL = 54 or 100 , see Figure 14 RL = 54 or 100 , see Figure 14 DE = 0 V, VDD2 = 0 V or 5 V, VIN = +12 V DE = 0 V, VDD2 = 0 V or 5 V, VIN = -7 V 0.7 x VDD1 +10 V V A |VOD| Min Typ |VOD| VOC |VOC| IO -30 Short-Circuit Output Current Logic Inputs (DE, RE, TxD) Input Threshold Low Input Threshold High Input Current RECEIVER Differential Inputs Differential Input Threshold Voltage Input Voltage Hysteresis Input Current (A, B) Line Input Resistance Tristate Leakage Current Logic Outputs Output Voltage Low Output Voltage High Short-Circuit Current COMMON-MODE TRANSIENT IMMUNITY 1 1 IOS VIL VIH II 0.25 x VDD1 -10 +0.01 VTH VHYS II -200 -125 15 RIN IOZR VOLRxD VOHRxD -30 +125 -100 96 1 VDD1 - 0.3 0.2 VDD1 - 0.2 0.4 100 25 mV mV A A k A -7 V < VCM < +12 V VOC = 0 V DE = 0 V, VDD = 0 V or 3.6 V, VIN = +12 V DE = 0 V, VDD = 0 V or 3.6 V, VIN = -7 V -7 V < VCM < +12 V VDD1 = 5 V, 0 V < VOUT < VDD1 V V mA kV/s IORxD = 1.5 mA, VA - VB = -0.2 V IORxD = -1.5 mA, VA - VB = +0.2 V VCM = 1 kV, transient magnitude = 800 V CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 3 of 16 ADM2484E TIMING SPECIFICATIONS TA = -40C to +85C. Table 2. Parameter DRIVER Propagation Delay Differential Driver Output Skew (tDPLH - tDPHL) Rise Time/Fall Time Enable Time Disable Time RECEIVER Propagation Delay Pulse Width Distortion, PWD = |tPLH - tPHL| Enable Time Disable Time Symbol Min tDPLH, tDPHL tDSKEW 250 tDR, tDF tZL, tZH tLZ, tHZ 200 Typ Max Unit Test Conditions 700 100 ns ns RL = 54 , CL1 = C L2 = 100 pF, see Figure 16 and Figure 21 RL = 54 , CL1 = CL2 = 100 pF, see Figure 16 and Figure 21 1100 1.5 200 ns s ns RL = 54 , CL1 = CL2 = 100 pF, see Figure 16 and Figure 21 RL = 110 , CL = 50 pF, see Figure 18 and Figure 22 RL = 110 , CL = 50 pF, see Figure 18 and Figure 22 tPLH, tPHL tPWD 200 30 ns ns CL = 15 pF, see Figure 17 and Figure 23 CL = 15 pF, see Figure 17 and Figure 23 tZL, tZH tLZ, tHZ 13 13 ns ns RL = 1 k, CL = 15 pF, see Figure 19 and Figure 24 RL = 1 k, CL = 15 pF, see Figure 19 and Figure 24 Max Unit Test Conditions 450 PACKAGE CHARACTERISTICS Table 3. Parameter RESISTANCE Resistance (Input-to-Output) 1 CAPACITANCE Capacitance (Input-to-Output)1 Input Capacitance 2 THERMAL RESISTANCE Input IC Junction-to-Case Output IC Junction-to-Case 1 2 Symbol Min Typ RI-O 1012 CI-O CI 3 4 pF pF f = 1 MHz JCI JCO 33 28 C/W C/W Thermocouple located at center of package underside Device considered a 2-terminal device: Pin 1 to Pin 8 are shorted together and Pin 9 to Pin16 are shorted together. Input capacitance is from any input data pin to ground. REGULATORY INFORMATION (PENDING) Table 4. UL 1 1577 Component Recognition Program (Pending) 5000 V rms Isolation Voltage 1 2 VDE 2 To be certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-122 Reinforced insulation, 846 V peak In accordance with UL1577, each ADM2484E is proof tested by applying an insulation test voltage 6000 V rms for 1 second (current leakage detection limit = 10 A). In accordance with DIN V VDE V 0884-10, each ADM2484E is proof tested by applying an insulation test voltage 1590 V peak for 1 second (partial discharge detection limit = 5 pC). Rev. 0 | Page 4 of 16 ADM2484E INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 5. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L(I01) Value 5000 7.7 Unit V rms mm min Minimum External Tracking (Creepage) L(I02) 8.1 mm min Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI 0.017 >175 IIIa mm min V Conditions 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance along body Insulation distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89) VDE 0884 INSULATION CHARACTERISTICS (PENDING) This isolator is suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by means of protective circuits. Table 6. Description CLASSIFICATIONS Installation Classification per DIN VDE 0110 for Rated Mains Voltage 300 V rms 450 V rms 600 V rms Climatic Classification Pollution Degree VOLTAGE Maximum Working Insulation Voltage Input-to-Output Test Voltage Method b1 Method a After Environmental Tests, Subgroup 1 After Input and/or Safety Test, Subgroup 2/Subgroup 3 Highest Allowable Overvoltage SAFETY-LIMITING VALUES Case Temperature Input Current Output Current Insulation Resistance at TS Conditions Symbol Characteristic Unit I to IV I to II I to II 40/105/21 2 DIN VDE 0110, see Table 1 VIORM VPR 848 VPEAK VIORM x 1.875 = VPR, 100% production tested, tm = 1 sec, partial discharge < 5 pC 1590 VPEAK VIORM x 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC VIORM x 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC (Transient overvoltage, tTR = 10 sec) Maximum value allowed in the event of a failure, see Figure 9 1357 VPEAK 1018 VPEAK VTR 6000 VPEAK TS IS, INPUT IS, OUTPUT RS 150 265 335 >109 C mA mA VIO = 500 V Rev. 0 | Page 5 of 16 ADM2484E ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Each voltage is relative to its respective ground. Table 7. Parameter VDD1 VDD2 Logic Input Voltages Bus Terminal Voltages Logic Output Voltages Average Output Current per Pin ESD (Human Body Model) on A, B, Y, and Z Pins Storage Temperature Range Ambient Operating Temperature Range JA Thermal Impedance Rating -0.5 V to +7 V -0.5 V to +6 V -0.5 V to VDD1 + 0.5 V -9 V to +14 V -0.5 V to VDD1 + 0.5 V 35 mA 15 kV Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. ESD CAUTION -55C to +150C -40C to +85C 73C/W Rev. 0 | Page 6 of 16 ADM2484E PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD1 1 16 VDD2 GND1 2 15 GND2 RxD 3 14 A ADM2484E TOP VIEW 13 B DE 5 (Not to Scale) 12 Z TxD 6 11 Y NC 7 10 NC GND1 8 9 GND2 NC = NO CONNECT 06984-002 RE 4 Figure 2. Pin Configuration Table 8. Pin Function Descriptions Pin No. 1 2 3 4 Mnemonic VDD1 GND1 RxD RE 5 DE 6 7 8 9 10 11 12 13 14 15 16 TxD NC GND1 GND2 NC Y Z B A GND2 VDD2 Description Power Supply (Logic Side). Decoupling capacitor to GND1 required; capacitor value should be between 0.01 F and 0.1 F. Ground (Logic Side). Receiver Output. Receiver Enable Input. Active low logic input. When this pin is low, the receiver is enabled; when this pin is high, the receiver is disabled. Driver Enable Input. Active high logic input. When this pin is high, the driver (transmitter) is enabled; when this pin is low, the driver is disabled. Transmit Data. No Connect. This pin must be left floating. Ground (Logic Side). Ground (Bus Side). No Connect. This pin must be left floating. Driver Noninverting Output. Driver Inverting Output. Receiver Inverting Input. Receiver Noninverting Input. Ground (Bus Side). Power Supply (Bus Side). Decoupling capacitor to GND2 required; capacitor value should be between 0.01 F and 0.1 F. Rev. 0 | Page 7 of 16 ADM2484E TYPICAL PERFORMANCE CHARACTERISTICS 1.4 100 DATA RATE = 500kbps NO LOAD 54 LOAD 100 LOAD 1.0 90 tPHL 80 tPLH 70 60 DELAY (ns) 0.8 0.6 50 40 30 0.4 06984-033 0 -40 -20 0 20 40 60 06984-035 20 0.2 10 0 -40 80 -20 0 TEMPERATURE (C) 20 Figure 3. IDD1 Supply Current vs. Temperature (See Figure 20) 80 T DATA RATE = 500kbps IDD2 SUPPLY CURRENT (mA) 60 Figure 6. Receiver Propagation Delay vs. Temperature 45 40 40 TEMPERATURE (C) 54 LOAD 35 30 TxD 100 LOAD 1 25 Z, B 20 2 15 10 Y, A NO LOAD 0 -40 06984-034 5 -20 0 20 40 60 RxD 06984-031 IDD1 SUPPLY CURRENT (mA) 1.2 4 80 CH1 2.00V CH3 2.00V TEMPERATURE (C) Figure 4. IDD2 Supply Current vs. Temperature (See Figure 20) CH2 2.00V CH4 2.00V M 200ns T 47.80% A CH2 1.72V Figure 7. Driver/Receiver Propagation Delay, Low to High (RL = 54 , CL1 = CL2 = 100 pF) 600 T tDPLH 500 tDPHL TxD 1 300 Z, B Y, A 2 200 0 -40 -20 0 20 40 60 06984-030 100 06984-032 DELAY (ns) 400 RxD 4 80 CH1 2.00V CH3 2.00V TEMPERATURE (C) Figure 5. Driver Propagation Delay vs. Temperature CH2 2.00V CH4 2.00V M 200ns T 48.60% A CH2 1.72V Figure 8. Driver/Receiver Propagation Delay, High to Low (RL = 54 , CL1 = CL2 = 100 pF) Rev. 0 | Page 8 of 16 ADM2484E 350 4.77 4.76 4.75 4.74 250 VOLTAGE (V) SIDE 2 200 150 SIDE 1 50 100 150 CASE TEMPERATURE (C) 0.30 -4 0.25 VOLTAGE (V) -2 -6 -8 -12 0.05 4.8 0 -40 5.0 VOLTAGE (V) 14 12 10 8 6 4 06984-018 2 0.2 0.4 0.6 80 100 -20 0 20 40 60 80 100 Figure 13. Receiver Output Low Voltage vs. Temperature, IRxD = +4 mA 16 0 60 TEMPERATURE (C) Figure 10. Output Current vs. Receiver Output High Voltage 0 40 0.15 0.10 4.6 20 0.20 -10 4.4 0 Figure 12. Receiver Output High Voltage vs. Temperature, IRxD = -4 mA 0.35 4.2 -20 TEMPERATURE (C) 0 -14 4.0 06984-019 4.66 -40 200 06984-022 0 4.67 06984-017 CURRENT (mA) 4.71 4.68 Figure 9. Thermal Derating Curve, Dependence of Safety-Limiting Values with Case Temperature per VDE 0884 CURRENT (mA) 4.72 4.69 50 0 4.73 4.70 100 06984-016 SAFETY-LIMITING CURRENT (mA) 300 0.8 1.0 1.2 VOLTAGE (V) Figure 11. Output Current vs. Receiver Output Low Voltage Rev. 0 | Page 9 of 16 ADM2484E TEST CIRCUITS RL 2 RL 2 VOC VOUT B CL 06984-007 A 06984-003 VOD Figure 17. Receiver Propagation Delay Figure 14. Driver Voltage Measurement 375 VCC VOUT Y 0V OR 3V 375 RL S1 DE Figure 18. Driver Enable/Disable Figure 15. Driver Voltage Measurement VCC +1.5V S1 RL -1.5V RE CL2 S2 CL VOUT RE IN Figure 16. Driver Propagation Delay Figure 19. Receiver Enable/Disable VDD2 VDD1 VDD2 GALVANIC ISOLATION DE TxD Y Z 120 A RxD B RE GND1 GND2 Figure 20. Supply Current Measurement Test Circuit Rev. 0 | Page 10 of 16 06984-005 Z 06984-006 RL 06984-009 CL1 Y S2 CL Z 06984-008 VTEST 60 06984-004 VOD ADM2484E SWITCHING CHARACTERISTICS VDD1 VDD1 /2 VDD1 /2 0V tDPLH tDPHL Z VO A, B 1/2VO 0V 0V tPLH tPHL Y VOH 90% POINT 90% POINT VDIFF = V(Y) - V(Z) RxD -VO 10% POINT tDR tDF 10% POINT 1.5V 1.5V 06984-010 VDIFF 06984-012 +VO VOL Figure 21. Driver Propagation Delay, Rise/Fall Timing Figure 23. Receiver Propagation Delay VDD1 VDD1 RE 0V 0.5VDD1 0.5VDD1 tZL 0V tZL 1.5V RxD VOL + 0.5V tHZ 2.3V VOL + 0.5V OUTPUT LOW tZH VOL VOH - 0.5V 0V VOL tHZ OUTPUT HIGH VOH VOH - 0.5V RxD 06984-011 tZH Y, Z tLZ tLZ 2.3V Y, Z 0.5VDD1 0.5VDD1 VOH 1.5V 0V 0V Figure 22. Driver Enable/Disable Delay Figure 24. Receiver Enable/Disable Delay Rev. 0 | Page 11 of 16 06984-013 DE ADM2484E CIRCUIT DESCRIPTION ELECTRICAL ISOLATION TRUTH TABLES In the ADM2484E, electrical isolation is implemented on the logic side of the interface. Therefore, the part has two main sections: a digital isolation section and a transceiver section (see Figure 25). The driver input signal, which is applied to the TxD pin and referenced to the logic ground (GND1), is coupled across an isolation barrier to appear at the transceiver section referenced to the isolated ground (GND2). Similarly, the receiver input, which is referenced to the isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the RxD pin referenced to the logic ground. The truth tables in this section use the abbreviations shown in Table 9. Table 9. Truth Table Abbreviations Letter H L I X Z NC Description High level Low level Indeterminate Irrelevant High impedance (off ) Disconnected iCoupler Technology The digital signals transmit across the isolation barrier using iCoupler technology. This technique uses chip scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. Digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding. At the secondary winding, the induced waveforms are decoded into the binary value that was originally transmitted. Positive and negative logic transitions at the input cause narrow (~1 ns) pulses to be sent to the decoder via the transformer. The decoder is bistable and is, therefore, set or reset by the pulses, indicating input logic transitions. In the absence of logic transitions at the input for more than ~1 s, a periodic set of refresh pulses, indicative of the correct input state, are sent to ensure dc correctness at the output. If the decoder receives no internal pulses for more than about 5 s, then the input side is assumed to be unpowered or nonfunctional, in which case the output is forced to a default state (see Table 10). VDD1 VDD2 ISOLATION BARRIER ENCODE DECODE TxD ENCODE DECODE RxD DECODE ENCODE GND1 Supply Status VDD1 On On On On On On Off Z R A B TRANSCEIVER Supply Status VDD2 On On On Off On Off DE H H L X L X Inputs TxD H L X X X X Y H L Z Z Z Z Outputs Z L H Z Z Z Z Table 11. Receiving Y D RE DIGITAL ISOLATION VDD1 On On On On Off Off 06984-023 DE Table 10. Transmitting GND2 Figure 25. Digital Isolation and Transceiver Sections Rev. 0 | Page 12 of 16 VDD2 On On On On On Off Off Inputs A - B (V) > -0.03 < -0.2 -0.2 < A - B < -0.03 Inputs open X X X RE Output RxD L or NC L or NC L or NC L or NC H L or NC L or NC H L I H Z H L ADM2484E 100 10 1 0.1 0.01 06984-024 The ADM2484E contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs. This circuitry is designed to disable the driver outputs when a die temperature of 150C is reached. As the device cools, the drivers re-enable at a temperature of 140C. MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kGAUSS) THERMAL SHUTDOWN TRUE FAIL-SAFE RECEIVER INPUTS The limitation on the magnetic field immunity of the iCoupler is set by the condition in which an induced voltage in the receiving coil of the transformer is large enough to either falsely set or reset the decoder. The following analysis defines the conditions under which this may occur. The 3 V operating condition of the ADM2484E is examined because it represents the most susceptible mode of operation. The pulses at the transformer output have an amplitude greater then 1 V. The decoder has a sensing threshold of about 0.5 V, thus establishing a 0.5 V margin in which induced voltages can be tolerated. 10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz) 100M Figure 26. Maximum Allowable External Magnetic Flux Density For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 V at the receiving coil. This is about 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event occurs during a transmitted pulse and is the worst-case polarity, it reduces the received pulse from >1.0 V to 0.75 V, still well above the 0.5 V sensing threshold of the decoder. Figure 27 shows the magnetic flux density values in terms of more familiar quantities, such as maximum allowable current flow at given distances away from the ADM2484E transformers. 1000 The voltage induced across the receiving coil is given by DISTANCE = 1m 100 DISTANCE = 5mm 10 DISTANCE = 100mm 1 0.1 0.01 1k - d 2 V = rn ; n = 1, 2, . . . , N dt 06984-025 MAGNETIC FIELD IMMUNITY 0.001 1k MAXIMUM ALLOWABLE CURRENT (kA) The receiver inputs have a true fail-safe feature ensuring that the receiver output is high when the inputs are open or shorted. During line-idle conditions, when no driver on the bus is enabled, the voltage across a terminating resistor at the receiver input decays to 0 V. With traditional transceivers, receiver input thresholds specified between -200 mV and +200 mV mean that external bias resistors are required on the A and B pins to ensure that the receiver outputs are in a known state. The true fail-safe receiver input feature eliminates the need for bias resistors by specifying the receiver input threshold between -30 mV and -200 mV. The guaranteed negative threshold means that when the voltage between A and B decays to 0 V; the receiver output is guaranteed to be high. 10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz) 100M Figure 27. Maximum Allowable Current for Various Current-to-ADM2484E Spacings where: is the magnetic flux density (gauss). N is the number of turns in the receiving coil. rn is the radius of the nth turn in the receiving coil (cm). Given the geometry of the receiving coil and an imposed requirement that the induced voltage is, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field can be determined using Figure 26. With combinations of strong magnetic field and high frequency, any loops formed by PCB traces can induce error voltages large enough to trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility. Rev. 0 | Page 13 of 16 ADM2484E APPLICATIONS INFORMATION ISOLATED POWER SUPPLY CIRCUIT PC BOARD LAYOUT The ADM2484E requires isolated power capable of 3.3 V at up to approximately 75 mA (this current is dependent on the data rate and termination resistors used) to be supplied between the VDD2 and the GND2 pins. A transformer driver circuit with a center tapped transformer and LDO can be used to generate the isolated 5 V supply, as shown in Figure 28. The center tapped transformer provides electrical isolation of the 5 V power supply. The primary winding of the transformer is excited with a pair of square waveforms that are 180 out of phase with each other. A pair of Schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. The ADP3330 linear voltage regulator provides a regulated power supply to the bus-side circuitry (VDD2) of the ADM2484E. The ADM2484E isolated RS-485 transceiver requires no external interface circuitry for the logic interfaces. Power supply bypassing is required at the input and output supply pins (see Figure 29). Bypass capacitors are conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. Best practice suggests the following: SD103C + VCC 78253 SD103C 22F IN OUT SD ADP3330 ERR NR GND VDD1 GND1 RxD RE DE TxD NC GND1 5V + 10F VDD2 GND2 A B Z Y NC GND2 Figure 29. Recommended PCB Layout VDD2 GND2 Figure 28. Isolated Power Supply Circuit 06984-026 ADM2484E GND1 ADM2484E NC = NO CONNECT VCC VDD1 A capacitor value between 0.01 F and 0.1 F. A total lead length between both ends of the capacitor and the input power supply pin that does not exceed 20 mm. Unless the ground pair on each package side is connected close to the package, consider bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16. 06984-027 * ISOLATION BARRIER VCC TRANSFORMER DRIVER * * In applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. Furthermore, design the board layout so that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this could cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. Rev. 0 | Page 14 of 16 ADM2484E TYPICAL APPLICATIONS Figure 30 and Figure 31 show typical applications of the ADM2484E in half-duplex and full-duplex RS-485 network configurations. Up to 256 transceivers can be connected to the RS-485 bus. To minimize reflections, the line must be terminated VCC ADM2484E A RxD R MAXIMUM NUMBER OF TRANSCEIVERS ON BUS = 256 ADM2484E A R1 B B RE RT DE RE RT Z D RxD R DE Z R2 Y Y A B R Z Y A B R D ADM2484E Z D TxD Y D ADM2484E RxD RE DE TxD RxD RE DE TxD 06984-028 TxD at the receiving end in its characteristic impedance, and stub lengths off the main line must be kept as short as possible. For half-duplex operation, this means that both ends of the line must be terminated, because either end can be the receiving end. NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. 2. ISOLATION NOT SHOWN. Figure 30. ADM2484E Typical Half-Duplex RS-485 Network R B SLAVE R1 A RxD MAXIMUM NUMBER OF NODES = 256 VDD MASTER Y D RT Z RE VDD Z DE TxD D R2 R1 Y DE B RT A TxD RE R RxD R2 ADM2484E ADM2484E A B Z Y A B Z Y SLAVE SLAVE RxD RE R D DE TxD RxD RE D DE TxD NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. Figure 31. ADM2484E Typical Full -Duplex RS-485 Network Rev. 0 | Page 15 of 16 ADM2484E 06984-029 R ADM2484E ADM2484E OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 8 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 10.65 (0.4193) 10.00 (0.3937) 0.75 (0.0295) 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 45 8 0 0.33 (0.0130) 0.20 (0.0079) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-013- AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 032707-B 1 Figure 32. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model ADM2484EBRWZ1 ADM2484EBRWZ-REEL71 1 Temperature Range -40C to +85C -40C to +85C Package Description 16-Lead Wide Body SOIC_W 16-Lead Wide Body SOIC_W Z = RoHS Compliant Part. (c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06984-0-5/08(0) Rev. 0 | Page 16 of 16 Package Option RW-16 RW-16