LTC4311
1
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4311 TA01b
LTC4311
1V/DIV
VCC = 5V
CLD = 200pF
fI2C = 100kHz
1μs/DIV
RPULL-UP = 15.8k
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
Low Voltage I2C/SMBus
Accelerator
The LTC
®
4311 is a dual I2C active pull-up designed to
enhance data transmission speed and reliability for bus
loading conditions well beyond the 400pF I2C specifi cation
limit. The LTC4311 operates at supply voltages from 1.6V
to 5.5V and is also compatible with SMBus.
The LTC4311 allows multiple device connections or a lon-
ger, more capacitive interconnect, without compromising
slew rates or bus performance, by using two slew limited
pull-up currents.
During positive bus transitions, the LTC4311 provides slew
limited pull-up currents to quickly slew the I2C or SMBus
lines to the bus pull-up voltage. During negative transitions
or steady DC levels, the currents are disabled to improve
negative slew rate, and improve low state noise margins.
An auto detect standby mode reduces supply current if
both SCL and SDA are high. When disabled, the LTC4311
goes into low (<5μA) current shutdown.
The LTC4311 is available in the 2mm × 2mm × 0.75mm
DFN, and SC70 packages.
Comparison of I2C Waveforms for
the LTC4311 vs Resistor Pull-Up
Improves I2C Bus Rise Time Transition
Ensures Data Integrity with Multiple Devices on the
I2C Bus.
Wide Supply Voltage Range: 1.6V to 5.5V
Improves Low State Noise Margin
Up to 400kHz Operation
Auto Detect Low Power Standby Mode
Low (<5μA) Supply Current Shutdown
Does Not Load Bus When Disabled or Powered Down
Strong Slew Limited Pull-up Current
±8kV Human Body Model ESD Ruggedness
2mm × 2mm DFN and SC70 Packages
Notebook and Palmtop Computers
Portable Instruments
Battery Chargers
Industrial Controls
TV/Video Products
ACPI SMBus Interface
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All
other trademarks are the property of their respective owners. Protected by U.S. Patents
includin
g
6356140 and 6650174.
LTC4311
VCC
ENABLE
GND
VCC
2.5V
C1
0.01μF
BUS1
BUS2
DEVICE 1
CLK
IN
CLK
OUT
VCC
2.5V
DATA
IN
DATA
OUT
DEVICE N
4311 TA01a
CLK
IN
10k
CLK
OUT
DATA
IN
DATA
OUT
10k
I2C
SCL
SDA
LTC4311
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Storage Temperature Range (DFN) ........ 65°C to 125°C
Storage Temperature Range (SC70).......65°C to 125°C
Lead Temperature (Soldering 10, sec)
SC70 ............................................................ 300°C
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
VCC to GND .................................................... 0.3 to 6V
BUS1, BUS2, ENABLE Inputs ......................... 0.3 to 6V
Operating Temperature
LTC4311C ................................................ 0°C to 70°C
LTC4311I.............................................. 40°C to 85°C
(Notes 1, 2)
TOP VIEW
GND
BUS2
BUS1
ENABLE
NC
VCC
DFN PACKAGE
6-LEAD (2mm s 2mm) PLASTIC DFN
4
5
7
6
3
2
1
TJMAX = 125°C, θJA = 102°C/W
EXPOSED PAD (PIN 7) PCB CONNECTION TO GND IS OPTIONAL (Note 3)
VCC
GND
ENABLE
1
2
3
6
5
4
BUS1
GND
BUS2
TOP VIEW
SC70 PACKAGE
6-LEAD PLASTIC SC70
TJMAX = 125°C, θJA = 150° C/W
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4311CDC#TRMPBF LTC4311CDC#TRPBF LCNG 6-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C
LTC4311IDC#TRMPBF LTC4311IDC#TRPBF LCNG 6-Lead (2mm × 2mm) Plastic DFN 40°C to 85°C
LTC4311CSC6#TRMPBF LTC4311CSC6#TRPBF LCNF 6-Lead (2mm × 2mm) Plastic SC70 0°C to 70°C
LTC4311ISC6#TRMPBF LTC4311ISC6#TRPBF LCNF 6-Lead (2mm × 2mm) Plastic SC70 40°C to 85°C
TRM = 500 pieces. *Temperature grades are identifi ed by a label on the shipping container.
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
LTC4311
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ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive. All voltages are referenced to
GND unless otherwise specifi ed.
Note 3: Thermal characteristics are determined with exposed pad soldered
to GND plane. If the exposed pad is left open, thermal characteristics can
be drastically different.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Positive Supply Voltage 1.6 5.5 V
ICC Supply Current VCC = 5.5V, ENABLE = 5.5V, VBUS1 = VBUS2 = 0V 200 300 μA
ICC_STANDBY Supply Current, Standby Mode VCC = 5.5V, ENABLE = 5.5V, VBUS1 = VBUS2 = 5.5V 26 45 μA
ICC_DISABLED Supply Current, Disabled VCC = 5.5V, ENABLE = 0V, VBUS1 = VBUS2 = 5.5V ±5 μA
IPULLUPAC Transient Boosted Pull-up Current Positive Transition on Bus, Slew Rate = 0.5V/μs
VCC = 1.8V, BUS > VTHR
2.5 5 mA
IBUS(IN) BUS1,BUS2, Input Leakage Current VCC = 0V, VBUS1 = VBUS2 = 5.5V ±5 μA
IENABLE(IN) ENABLE Input Leakage Current VCC = 0V, VENABLE = 5.5V ±10 μA
VTHR Bus Input Threshold Voltage VCC = 1.8V 0.45 0.55 0.65 V
VCC = 2.5V 0.65 0.75 0.85 V
VCC = 2.7V to 5.5V 0.68 0.78 0.88 V
VTHR_ENABLE ENABLE Threshold Voltage VCC = 1.6V, 5.5V 0.4 1 1.5 V
SRTHRESH Slew Rate Detector Threshold BUS > VTHR, VCC = 1.8V, 5.5V 0.2 0.5 V/μs
trFast Mode I2C Bus Rise Time Bus Capacitance = 400pF, VCC = 3V (Note 4) 300 ns
fMAX Bus Maximum Operating Frequency (Note 5) 400 kHz
• The denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VCC = 3.3V, unless otherwise noted.
Note 4: The rise time of an I2C bus line is calculated from VIL(MAX) to
VIH(MIN) or 0.9V to 2.1V (with VCC = 3V). This parameter is guaranteed by
design and not tested. With a minimum boosted pull-up current of 2.5mA:
Rise Time = (2.1V – 0.9V) • 400pF/2.5mA = 0.19μs.
Note 5: Determined by design, not tested in production.
LTC4311
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TYPICAL PERFORMANCE CHARACTERISTICS
Boost Pull-Up Current vs
Temperature
Supply Current vs Temperature
–40
SUPPLY CURRENT (μA)
200
20
4311 G03
170
150
–20 0 40
140
130
210
190
180
160
60 80 100
TEMPERATURE (°C)
VCC = 5.5V
VCC = 3.3V
VCC = 2.5V
VCC = 1.8V
BUS1 = BUS2 = 0V
–40
BOOST PULL-UP CURRENT (mA)
35
20
4311 G01
20
10
–20 0 40
5
0
40
30
25
15
60 80 100
TEMPERATURE (°C)
VCC = 5.5V
VCC = 3.3V
VCC = 2.5V
VCC = 1.8V
RP = 4.7kΩ
CBUS = 1nF
TEMPERATURE (°C)
–40
24
26
30
20 60
4311 G05
22
20
–20 0 40 80 100
18
16
28
STANDBY CURRENT (μA)
VCC = 3.3V
VCC = 5.5V
VCC = 1.8V
VCC = 2.5V
Standby Current vs Temperature
Boost Pull-Up Current vs Bus
Capacitance
Rise Time vs Capacitance
1
INPUT THRESHOLD (V)
0.55
0.6
0.65
46
4311 G06
0.5
0.45
0.4 23 5
0.7
0.75
0.8
SUPPLY VOLTAGE (V)
Bus Input Threshold Voltage vs
Supply Voltage
CAPACITANCE (pF)
0
0
RISE TIME (ns)
50
100
150
200
250
300
1000 2000 3000 4000
4311 G04
5000
VCC = 1.8V
VCC = 3.3V
VCC = 2.5V
VCC = 5.5V
RP = 2kΩ
Measured from 0.3 VCC to 0.7 VCC
CAPACITANCE (pF)
0
0
BOOST PULL-UP CURRENT (mA)
10
20
30
40
50
60
1000 2000 3000 4000
4311 G02
5000
VCC = 1.8V
VCC = 2.5V
VCC = 3.3V
VCC = 5.5VRp = 2kΩ
(TA = 25°C, unless otherwise indicated)
LTC4311
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PIN FUNCTIONS
BUS1: Active Pull-up for Bus. Connect to either clock line
or data line for 2-wire bus.
BUS2: Active Pull-up for Bus. Connect to either clock line
or data line for 2-wire bus.
ENABLE: Device Enable Input. This is a 1V nominal digital
threshold input pin. For normal operation drive ENABLE
to a voltage greater than 1.5V. Driving ENABLE below the
0.4V threshold puts the device in a low (<5μA) current
shutdown mode and puts the BUS pins in a high imped-
ance state. If unused, connect to VCC.
EXPOSED PAD (DFN Package Only): Exposed Pad may
be left open or connected to device ground.
GND: Device Ground. Connect this pin to a ground plane
for best results.
VCC: Supply Voltage Input. Connect this pin to bus supply
and place a bypass capacitor of at least 0.01μF close to
VCC for best results.
BLOCK DIAGRAM
+
+
+
+
+
VTHR
SLEW RATE
DETECTOR
CONTROL
LOGIC AND
INTERNAL SLEW
COMPARATOR
VTHR
VCC – 0.4
VCC – 0.4
1V
SLEW RATE
DETECTOR
5mA
BUS1 VCC
GND
BUS2
ENABLE
5mA
4311 BD
LTC4311
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I2C and SMBus Overview
The I2C communication protocol employs open-drain
pull-down drivers with resistive or current source pull-
ups. This protocol allows multiple devices to drive and
monitor the bus without bus contention. The simplicity
of resistive or fi xed current source pull-ups is offset by
the slow rise times resulting when bus capacitance is
high. Rise times can be improved by using lower pull-up
resistor values or higher fi xed current source values, but
the additional current increases the low state bus voltage,
decreasing noise margins. Slow rise times can seriously
impact data reliability, enforcing a maximum practical bus
speed well below the established I2C or SMBus maximum
transmission rate.
The LTC4311 overcomes these limitations by providing a
boosted pull-up current only during positive bus transitions
to quickly slew large bus capacitances. Therefore, rise time
is dramatically improved, especially with maximum or out
of specifi cation I2C or SMBus loading conditions.
The LTC4311 has separate but identical circuitry for each
BUS output pin. The circuitry consists of a positive edge
slew rate detector and a voltage comparator. The voltage
comparator has a supply dependent threshold. At supply
voltages below 2.7V the comparator threshold is 0.3VCC,
and at higher voltages the comparator threshold is a
constant 0.8V. This allows the rise time accelerator to be
used in non-compliant systems where the bus thresholds
are optimized for low voltage operation, while still meet-
ing standard thresholds for compliant I2C and SMBus
systems.
The slew limited pull-up current is only turned on if the
bus line voltage is greater than the supply dependent
comparator threshold voltage and the positive slew rate
of the bus line is greater than the typical 0.2V/μs threshold
of the slew rate detector. The pull-up current remains on
until the voltage on the bus line is within 0.4V of VCC or
the slew rate drops below 0.2V/μs.
The pull-up current is slew limited to maintain signal
integrity for busses that have very little capacitive load.
In a lightly loaded system a strong pull-up could result in
fast edge rates that cause refl ections on the bus. These
refl ections can be detected by devices on the bus as extra
clock edges, could result in erroneous data, or cause a
stuck bus. An internal slew limit comparator limits the rate
the pull-up current can slew the bus lines to 100V/μs.
Auto Detect Standby Mode and Shutdown Mode
When BUS1 and BUS2 are both high the LTC4311 reduces
the standby supply current. Internal comparators detect
when the bus pins are within 400mV of VCC, and reduce
the supply current to 26μA. When the ENABLE pin is
grounded, the LTC4311 enters a low (<5μA) supply cur-
rent shutdown mode. Both bus pins are high impedance
in shutdown, regardless of the bus pin voltage.
OPERATION
LTC4311
7
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Selecting the values of RS and RP
The typical confi guration for the data bus for a 2-wire bus
is shown in Figure 1. The parameters RP and RS should be
chosen carefully. A description of the process for choosing
the values of RP and RS follows.
An external pull-up resistor RP is required in each bus
line to supply a steady state pull-up current if the bus is
at logic zero. This pull-up current is used for slewing the
bus line during the initial portion of the positive transition
in order to activate the LTC4311 pull-up current.
Using an external pull-up resistor RP to supply steady
state pull-up current provides the freedom to adjust rise
time versus fall time as well as defi ning the low state
logic-level (VOL).
For I/O stage protection from ESD and high voltage spikes
on the bus, a series resistor RS (Figure 1) is sometimes
added to the open drain driver of the bus agents.
RS
VCC
CBUS
Bus
RON
4311 F01
DATA
IN
LTC4311
DYNAMIC
CURRENT
PULL-UP
DATA
OUT
RP
Figure 1. Typical 2-Wire Bus Confi guration
APPLICATIONS INFORMATION
Low State Noise Margin
A low value of VOL, the low state logic level, is desired
for good noise margin. VOL is calculated as follows:
VOL =RLVCC
RL+RP
(1)
RL is the series sum of RS and RON, the on resistance of
the open-drain driver.
Increasing the value of RP decreases the value of VOL.
Increasing RL increases the value of VOL.
Initial Slew Rate
The initial slew rate, SR, of the bus is determined by:
SR =VCC –V
OL
RPCBUS
(2)
SR must be greater than SRTHRESH, the LTC4311 slew rate
detector threshold (0.5V/μs max), in order to activate the
pull-up current.
I2C Rise and Fall Time
Rise time of an I2C line is derived using equation 3.
tr = RpCBUS
ln VIHMIN –V
CC –R
pIPULLUPAC
VILMAX –V
CC –R
pIPULLUPAC
(3)
Fall time of an I2C line is derived using equation 4.
tf = RTCBUS ln
VIHMIN
VCC
(RP+RL)–R
L
VILMAX
VCC
(RP+RL)–R
L
(4)
where RT is the parallel equivalent of RP and RL.
Both the values of RP and RS must be chosen carefully
to meet the low state noise margin and all bus timing
requirements.
A discussion of the electrical parameters affected by the
values of RS and RP, as well as the general procedure for
selecting the values of RS and RP follows.
LTC4311
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APPLICATIONS INFORMATION
A general procedure for selecting RP and RL is as fol-
lows:
1. RL is fi rst selected based on the I/O protection
requirement. Generally, an RS of 100Ω is suffi cient for
high voltage spikes and ESD protection. RON is
determined by the size of the open-drain driver, a large
driver will have a lower RON.
2. The value of RP is determined based on the VOL and
minimum slew rate requirements. The VOL will determine
the smallest resistance value that can be used in a
system, and the minimum slew requirement will bound
the resistance on the upper end. Generally the largest
value of resistance that meets the minimum slew rate
with some margin will be selected.
3. For I2C systems incorporating the LTC4311, the rise
times are met under most loading conditions, due to
the strong accelerator current. The pull-down drivers
are typically low impedance, and therefore fall times
are not generally an issue. Rise and fall time
requirements must be verifi ed using equations 3 and
4 (for an I2C system) or equations 5 to 8 (for an SMBus
system). The value chosen for RP must ensure that
both the rise and fall time specifi cations are met
simultaneously.
I2C Design Example
Given the following conditions and requirements:
VCC =3.3V NOMINAL
VOL =0.4V MAXIMUM
CBUS =600pF
VILMAX =0.99V,VIHMIN =2.31V
tr=0.3µs MAXIMUM,tf=0.3µs MAXIMUM
(9)
If an RS of 100Ω is used and the max RON of the driver is
200Ω, then RL = 200Ω + 100Ω = 300Ω. Use equation 1
to fi nd the required RP to meet VOL.
RP = 300Ω•(3.3V 0.4V)
0.4V
RP = 2.175k
(10)
For an I2C system with fi xed input levels, VILMAX = 1.5V
and VIHMIN = 3V. For I2C systems with VCC related input
levels, VILMAX = 0.3VCC and VIHMIN = 0.7VCC.
CBUS is the total capacitance of the I2C line.
SMBus Rise and Fall Time
Rise time of a SMBus line is derived using equations 5,
6 and 7.
tr = t1+t
2
(5)
t1 is the time from when the bus crosses the lower slew
rate measurement point, until the bus reaches VTHR and the
accelerators fi re. The time from when the accelerators fi re
until the bus reaches the upper slew rate measure point is
given by t2. Equations for t1 and t2 are given here:
t1 = –RPCBUS ln VTHR –V
CC
VILMAX 0.15V VCC
(6)
If (VILMAX 0.15V) > VTHR, then t1 = 0
t2 = –RPCBUS
ln VIHMIN + 0.15V VCC –R
PIPULLUPAC
VTHR –V
CC –R
PIPULLUPAC
(7)
Fall time of an SMBus line is derived using equation 8:
tf = RTCBUS
ln
VIHMIN + 0.15V
VCC
•(RP+RL)–R
L
VILMAX 0.15V
VCC
•(RP+RL)–R
L
(8)
For an SMBus system, VILMAX = 0.8V and VIHMIN = 2.1V.
CBUS is the total bus capacitance of the SMBus line.
LTC4311
9
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APPLICATIONS INFORMATION
This is the lowest resistor value that may be chosen and
still meet VOL. Next calculate the largest value of RP that
will satisfy SR, the minimum slew rate requirement. Us-
ing VOL = 0.4V and SR = 0.5V/μs calculate the value of
RP with equation 2.
RP =3.3V 0.4V
600pF 0.5V / µs
RP = 9.667k
(11)
This is approximately the largest value of RP that will satisfy
the minimum slew rate requirement. Since RP is larger
than 2.175k the VOL will be below 0.4V, and the slew rate
will actually be faster than calculated. Choosing RP = 10k,
VOL and SR are recalculated.
VOL =300Ω•3.3V
300Ω+10kΩ=96mV
SR =3.3V 96mV
10kΩ•600pF =0.534V / µs
(12)
The rise and fall times need to be verifi ed using equations
3 and 4.
tr=–10kΩ•600pF
In 2.31V 3.3V 10kΩ 2.5mA
0.99V 3.3V 10kΩ 2.5mA
=0.297µs
(13)
tf=291Ω•600pF
In
2.31
3.3V (10kΩ+300Ω) 300Ω
0.99V
3.3V (10kΩ+300Ω) 300Ω
=0.158µs
(14)
Both the rise and fall times meet the 0.3μs I2C requirement
and the VOL is satisfi ed, while meeting the minimum slew
rate requirement, so RP is chosen to be 10k.
If tr is not met, RP should be decreased and if tf is not met
then RP should be increased.
SMBus Design Example
Given the following conditions and requirements for a low
power SMBus system:
VCC =3.3V NOMINAL
VOL =0.4V MAXIMUM
CBUS =400pF
VILMAX =0.8V,VIHMIN =2.1V
tr=1µs MAXIMUM, tf=0.3µs MAXIMUM
(15)
If an RS of 100Ω is used and the max RON of the driver is
200Ω, then RL = 200Ω + 100Ω = 300Ω. Use equation 1
to fi nd the required RP to meet VOL.
RP = 300Ω•(3.3V 0.4V)
0.4V
RP = 2.175k
(16)
Calculate Maximum RP from equation 2.
RP = 3.3V 0.4V
400pF0.5V / µs
RP = 14.5k
(17)
Choose RP = 13k and recalculate VOL and SR.
VOL =300Ω•3.3V
300Ω+13kΩ=74mV
SR =3.3V 74mV
13kΩ•400pF =0.62V / µs
(18)
The rise and fall times need to be verifi ed using equations
5 to 8.
t1 = –13kΩ•400pF
ln 0.9V–3.3V
0.8V–0.15V–3.3V
= 0.515µs
(19)
LTC4311
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APPLICATIONS INFORMATION
t2=–13kΩ•400pF
In 2.1V +0.15V 3.3V 13kΩ•2.5mA
0.9V 3.3V 13kΩ•2.5mA
=0.205µs
(20)
tr=t1+t2=0.515µs +0.205µs =0.72µs
(21)
tf=293Ω•400pF
In
2.1V +0.15V
3.3V (13kΩ+300Ω) 300Ω
0.8V 0.15V
3.3V (13kΩ+300Ω) 300Ω
=0.156µs
(22)
The rise time meets the 1μs SMBus requirement and the
fall time meets the 0.3μs requirement. The VOL is satisfi ed
while meeting the minimum slew rate requirements, so RP
is chosen to be 13kΩ. If the rise time was not met due to
a large t1, equation 6 can be used to calculate a maximum
value of RP that will meet the rise time requirements.
ACK Data Setup Time
Care must be taken in selecting the value of RS (in series
with the pull-down driver) to ensure that the data setup
time requirement for ACK (acknowledge) is fulfi lled. An
acknowledge is the host releasing the SDA line (pulling
high) at the end of the last bit sent and the slave device
pulling the SDA line low before the rising edge of the ACK
clock pulse.
The LTC4311 5mA pull-up current is activated when the
host releases the SDA line, allowing the voltage to rise
above the LTC4311’s comparator threshold (VTHR). If
a slave device has a high value of RS, a longer time is
required for the slave device to pull SDA low before the
rising edge of the ACK clock pulse. To ensure suffi cient
data setup time for ACK, slave devices with high values
of RS should pull the SDA low earlier.
An alternative is the slave device can hold the SCL line low
until the SDA line reaches a stable state. Then, SCL can
be released to generate the ACK clock pulse.
Multiple LTC4311s in Parallel
In very heavily loaded systems, stronger pull up current
may be desired. Two LTC4311’s may be used in parallel
to increase the total pull up current to meet rise time
requirements.
Notes on Using the LTC4311 in LTC1694 Applications
Although the LTC1694 and LTC4311 are functionally similar
accelerators for I2C, SMBus, and other comparable open
drain/collector bus applications, the LTC4311 offers a lower
power, higher performance solution in a smaller package
as compared to the LTC1694. These and other differences
are listed in Table 1 and must be accounted for if using
the LTC4311 in LTC1694 applications.
Table 1. Differences Between LTC1694 and LTC4311
SPECIFICATION LTC1694 LTC4311 COMMENTS
Enable Pin (typ) N/A 1V Allows the LTC4311 to be Disabled, Consuming Less than 5μA
VCC 2.7V – 6V 1.6V – 5.5V Lower Operating Supply Voltage for Low Voltage Systems
ICC (typ), BUS1, BUS2 High 60μA 26μA Lower Standby Current to Conserve Power
VTHRES (typ) 0.65V Dependent on VCC Tighter, Higher Noise Margins and Improved Rise Times
IPULL-UP (typ) 2.2mA 5mA Stronger Slew-Limited Source Current for Slewing Higher Bus Capacitances
fMAX 100kHz 400kHz Higher Operating Frequency for I2C’s Fast Mode Bus Specifi cation
LTC4311
11
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
2.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE
M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.38 ± 0.05
BOTTOM VIEW—EXPOSED PAD
0.56 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
1.37 ±0.05
(2 SIDES)
1
3
64
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DC6) DFN 1103
0.25 ± 0.05
1.42 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.675 ±0.05
2.50 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
0.50 BSC
PIN 1
CHAMFER OF
EXPOSED PAD
1.15 – 1.35
(NOTE 4)
1.80 – 2.40
0.15 – 0.30
6 PLCS (NOTE 3)
SC6 SC70 1205 REV B
1.80 – 2.20
(NOTE 4)
0.65 BSC
PIN 1
0.80 – 1.00
1.00 MAX
0.00 – 0.10
REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE INDEX AREA
7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70
8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
2.8 BSC
0.47
MAX
0.65
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.8 REF
1.00 REF
INDEX AREA
(NOTE 6)
0.10 – 0.18
(NOTE 3)
0.26 – 0.46
GAUGE PLANE
0.15 BSC
0.10 – 0.40
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
SC6 Package
6-Lead Plastic SC70
(Reference LTC DWG # 05-08-1638 Rev B)
LTC4311
12
4311fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008
LT 0408 • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
PART NUMBER DESCRIPTION COMMENTS
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-2: Dual Supply Bus Buffer with READY and ACC
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LTC4301L Hot Swappable 2-Wire Bus Buffer with Low Voltage
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Allows Bus Pull-Up Voltages as Low as 1V on SDAIN and SCLIN
LTC4302-1/
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Addressable 2-Wire Bus Buffer Address Expansion, GPIO, Software Controlled
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Recovery
Provides Automatic Clocking to Free Stuck I2C Busses
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Capacitance Buffering
2 or 4 Selectable Downstream Buses, Stuck Bus Disconnect, Rise Time
Accelerators, Fault Reporting, +/– 10kV HBM ESD Tolerance
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ThinSOT is a trademark of Linear Technology Corporation
LTC4311
VCC
ENABLE
GND
VCC
2.5V
C1
0.01μF
BUS1
BUS2
DEVICE 1
CLK
IN
CLK
OUT
VCC
2.5V
DATA
IN
DATA
OUT
DEVICE N
4311 TA02
CLK
IN
R2
10k
CLK
OUT
DATA
IN
DATA
OUT
R1
10k
OFF ON
I2C
SCL
SDA
Application Utilizing Low Current Shutdown