TS3A5017 www.ti.com .......................................................................................................................................... SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 DUAL SP4T ANALOG SWITCH 3.3-V/2.5-V DUAL 4:1 ANALOG MULTIPLEXER/DEMULTIPLEXER FEATURES 1 * * * * * * * * DESCRIPTION Isolation in the Powered-Down Mode, V+ = 0 Low ON-State Resistance Low Charge Injection Excellent ON-State Resistance Matching Low Total Harmonic Distortion (THD) 2.3-V to 3.6-V Single-Supply Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 - 2000-V Human-Body Model (A114-B, Class II) - 1000-V Charged-Device Model (C101) The TS3A5017 is a dual single-pole quadruple-throw (4:1) analog switch that is designed to operate from 2.3 V to 3.6 V. This device can handle both digital and analog signals, and signals up to V+ can be transmitted in either direction. FUNCTION TABLE IN1 D TO S, S TO D L L D = S1 L H D = S2 L H L D = S3 L H H D = S4 H X X OFF EN IN2 L L APPLICATIONS Sample-and-Hold Circuits Battery-Powered Equipment Audio and Video Signal Routing Communication Circuits 15 2EN 1S4 3 14 IN1 1 16 IN2 2 15 2EN 1S4 3 14 IN1 13 2S4 12 2S3 1S3 4 13 2S4 1S3 4 1S2 5 12 2S3 1S2 5 11 2S2 1S1 6 11 2S2 1D 7 10 2S1 1S1 6 1D 7 10 2S1 GND 8 9 2D Exposed Center Pad 8 9 GND 2D 2EN 2 V+ 1EN V+ IN2 1EN 16 15 13 14 1S4 1 12 1S3 2 11 IN1 2S4 1S2 3 10 2S3 4 9 2S2 1S1 5 6 7 2D 2S1 16 V+ 1 GND Logic Control 1EN IN2 Logic Control RSV PACKAGE (TOP VIEW) RGY PACKAGE (TOP VIEW) D, DBQ, DGV, OR PW PACKAGE (TOP VIEW) 1D * * * * 8 If exposed center pad is used, it must be connected as a secondary ground or left electrically open. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2005-2008, Texas Instruments Incorporated TS3A5017 SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com ORDERING INFORMATION TA PACKAGE TOP-SIDE MARKING Tape and reel TS3A5017RSVR ZVL QFN - RGY Tape and reel TS3A5017RGYR YA017 Tube TS3A5017D Tape and reel TS3A5017DR Tape and reel TS3A5017DBQR Tube TS3A5017PW Tape and reel TS3A5017PWR Tape and reel TS3A5017DGVR SSOP (QSOP) - DBQ TSSOP - PW TVSOP - DGV (1) (2) ORDERABLE PART NUMBER QFN - RSV SOIC - D -40C to 85C (1) (2) TS3A5017 YA017 YA017 YA017 Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. SUMMARY OF CHARACTERISTICS V+ = 3.3 V, TA = 25C Dual Analog Multiplexer/Demultiplexer (4:1 Mux/Demux) Configuration Number of channels 2 ON-state resistance (ron) 11 ON-state resistance match (ron) 1 7 ON-state resistance flatness (ron(flat)) Turn-on/turn-off time (tON/tOFF) 5 ns/1.5 ns Charge injection (QC) Bandwidth (BW) 165 MHz OFF isolation (OISO) -48 dB at 10 MHz Crosstalk (XTALK) -49 dB at 10 MHz Total harmonic distortion (THD) 0.21% Leakage current (ID(OFF)/IS(OFF)) 0.1 A Power-supply current (I+) 2.5 A Package options 2 5 pC 16-pin QFN, QFN, SOIC, SSOP, TSSOP, or TVSOP Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 TS3A5017 www.ti.com .......................................................................................................................................... SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 ABSOLUTE MINIMUM AND MAXIMUM RATINGS (1) (2) over operating free-air temperature range (unless otherwise noted) Supply voltage (3) V+ VS, VD Analog voltage (3) (4) ISK, IDK Analog port clamp current VS, VD < 0 IS, ID On-state switch current VS, VD = 0 to 7 V VI Digital input voltage IIK Digital input clamp current (3) (4) I+ Continuous current through V+ IGND Continuous current through GND Tstg Storage temperature (1) (2) (3) (4) VI < 0 MIN MAX -0.5 4.6 V -0.5 4.6 V -50 mA -128 128 -0.5 4.6 -50 mA V mA 100 -100 -65 UNIT mA mA 150 C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. All voltages are with respect to ground, unless otherwise specified. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. PACKAGE THERMAL IMPEDANCE UNIT JA (1) Package thermal impedance (1) D package 73 DB package 82 DGV package 120 DW package 108 RGY package 91.6 RSV package 184 C/W The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 3 TS3A5017 SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY (1) V+ = 2.7 V to 3.6 V, TA = -40C to 85C (unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX 0 V+ UNIT Analog Switch Analog signal range VD, VS ron 0 VS V+, ID = -32 mA, Switch ON, See Figure 13 ON-state resistance match between channels ron VS = 2.1 V, ID = -32 mA, Switch ON, See Figure 13 ON-state resistance flatness ron(flat) 0 VS V+, ID = -32 mA, Switch ON, See Figure 13 IS(OFF) VS = 1 V, VD = 3 V, or VS = 3 V, VD = 1 V, ON-state resistance S OFF leakage current D OFF leakage current S ON leakage current D ON leakage current 25C Full 11 3V 14 25C ISPWR(OFF) ID(OFF) IDPWR(OFF) Full 1 3V 7 3V 25C Switch OFF, See Figure 14 VS = 0 to 3.6 V, VD = 3.6 V to 0, Full 25C Full VS = 1 V, VD = 3 V, or VS = 3 V, VD = 1 V, 0V 25C Switch OFF, See Figure 14 VD = 0 to 3.6 V, VS = 3.6 V to 0, Full 25C Full IS(ON) VS = 1 V, VD = Open, or VS = 3 V, VD = Open, Switch ON, See Figure 15 ID(ON) VD = 1 V, VS = Open, or VD = 3 V, VS = Open, Switch ON, See Figure 15 0V 25C Full -1 3.6 V 1 0.05 0.1 A 5 0.2 0.5 1 0.05 0.1 -5 A 5 -0.2 -0.1 3.6 V 0.2 -0.2 -1 0.1 0.5 -5 -0.1 25C Full -0.2 -0.1 3.6 V 0.05 9 10 -0.1 3.6 V 2 3 25C Full 12 V 0.2 0.05 0.1 A A -0.2 0.2 2 V+ V 0.8 V Digital Control Inputs (IN1, IN2, EN) (2) Input logic high VIH Input logic low VIL Input leakage current (1) (2) 4 IIH, IIL Full VI = V+ or 0 Full 0 25C -1 Full 3.6 V -1 0.05 1 1 A The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 TS3A5017 www.ti.com .......................................................................................................................................... SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY (continued) V+ = 2.7 V to 3.6 V, TA = -40C to 85C (unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT Dynamic Turn-on time tON VD = 2 V, RL = 300 , CL = 35 pF, See Figure 17 25C 3.3 V 1 5 9.5 Full 3 V to 3.6 V 1 Turn-off time tOFF VD = 2 V, RL = 300 , CL = 35 pF, See Figure 17 25C 3.3 V 0.5 Full 3 V to 3.6 V 0.5 Charge injection QC VGEN = 0, RGEN = 0, CL = 0.1 nF, See Figure 22 25C 3.3 V 5 pC 10.5 1.5 3.5 4.5 ns ns S OFF capacitance CS(OFF) VS = V+ or GND, Switch OFF, See Figure 16 25C 3.3 V 4.5 pF D OFF capacitance CD(OFF) VD = V+ or GND, Switch OFF, See Figure 16 25C 3.3 V 19 pF S ON capacitance CS(ON) VS = V+ or GND, Switch ON, See Figure 16 25C 3.3 V 25 pF D ON capacitance CD(ON) VD = V+ or GND, Switch ON, See Figure 16 25C 3.3 V 25 pF CI VI = V+ or GND, See Figure 16 25C 3.3 V 2 pF Digital input capacitance Bandwidth BW RL = 50 , Switch ON, See Figure 18 25C 3.3 V 165 MHz OFF isolation OISO RL = 50 , f = 1 MHz, See Figure 19 25C 3.3 V -48 dB Crosstalk XTALK RL = 50 , f = 1 MHz, See Figure 20 25C 3.3 V -49 dB Crosstalk adjacent XTALK(ADJ) RL = 50 , f = 1 MHz, See Figure 21 25C 3.3 V -74 dB THD RL = 600 , CL = 50 pF, f = 20 Hz to 20 kHz, See Figure 23 25C 3.3 V 0.21 % VI = V+ or GND, Switch ON or OFF Total harmonic distortion Supply Positive supply current I+ 25C Full 3.6 V 2.5 7 10 Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 A 5 TS3A5017 SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY (1) V+ = 2.3 V to 2.7 V, TA = -40C to 85C (unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX 0 V+ UNIT Analog Switch Analog signal range VD, VS ron 0 VS V+, ID = -24 mA, Switch ON, See Figure 13 ON-state resistance match between channels ron VS = 1.6 V, ID = -24 mA, Switch ON, See Figure 13 ON-state resistance flatness ron(flat) 0 VS V+, ID = -24 mA, Switch ON, See Figure 13 IS(OFF) VS = 0.5 V, VD = 2.2 V, or VS = 2.2 V, VD = 0.5 V, ON-state resistance S OFF leakage current D OFF leakage current ISPWR(OFF) ID(OFF) IDPWR(OFF) VS = 0 to 2.7 V, VD = 2.7 V to 0, 25C Full Full 25C Full Full 25C Full VS = 0.5 V, VD = 2.2 V, or VS = 2.2 V, VD = 0.5V, VD = 0 to 2.7 V, VS = 2.7 V to 0, 1 2.3 V 0V Full 25C Full S ON leakage current IS(ON) VS = 0.5 V, VD = Open, or VS = 2.2 V, VD = Open, Switch ON, See Figure 15 D ON leakage current ID(ON) VD = 0.5 V, VS = Open, or VD = 2.2 V, VS = Open, Switch ON, See Figure 15 0V 25C Full 25C Full -1 1 0.05 0.1 A 5 0.2 0.5 -5 A 1 5 0.05 -0.2 -0.1 2.7 V 0.5 -0.2 -1 0.1 0.2 -5 -0.1 2.7 V 0.05 -0.2 -0.1 2.7 V 18 20 -0.1 25C Switch OFF, See Figure 14 16 2 3 2.3 V 2.7 V 22 24 25C 25C Switch OFF, See Figure 14 20.5 2.3 V V 0.1 0.2 0.05 -0.2 0.1 0.2 A A Digital Control Inputs (IN1, IN2, EN) (2) Input logic high VIH Full 1.7 V+ V Input logic low VIL Full 0 0.7 V 25C -1 Input leakage current (1) (2) 6 IIH, IIL VI = V+ or 0 Full 2.7 V -1 0.05 1 1 A The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 TS3A5017 www.ti.com .......................................................................................................................................... SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY (continued) V+ = 2.3 V to 2.7 V, TA = -40C to 85C (unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN 25C 2.5 V 1.5 Full 2.3 V to 2.7 V 25C 2.5 V 0.3 Full 2.3 V to 2.7 V 0.3 TYP MAX UNIT Dynamic 5 8 Turn-on time tON VD = 2 V, RL = 300 , CL = 35 pF, See Figure 17 Turn-off time tOFF VD = 2 V, RL = 300 , CL = 35 pF, See Figure 17 Charge injection QC VGEN = 0, RGEN = 0, CL = 0.1 nF, See Figure 22 25C 2.5 V S OFF capacitance CS(OFF) VS = V+ or GND, Switch OFF, See Figure 16 25C 2.5 V 4.5 pF D OFF capacitance CD(OFF) VD = V+ or GND, Switch OFF, See Figure 16 25C 2.5 V 18.5 pF S ON capacitance CS(ON) VS = V+ or GND, Switch ON, See Figure 16 25C 2.5 V 24 pF D ON capacitance CD(ON) VD = V+ or GND, Switch ON, See Figure 16 25C 2.5 V 24 pF CI VI = V+ or GND, See Figure 16 25C 2.5 V 2 pF Digital input capacitance 1 10 2 ns 4.5 6 ns pC Bandwidth BW RL = 50 , Switch ON, See Figure 18 25C 2.5 V 165 MHz OFF isolation OISO RL = 50 , f = 1 MHz, See Figure 19 25C 2.5 V -48 dB Crosstalk XTALK RL = 50 , f = 1 MHz, See Figure 20 25C 2.5 V -49 dB XTALK(ADJ) RL = 50 , f = 1 MHz, See Figure 21 25C 2.5 V -74 dB THD RL = 600 , CL = 50 pF, f = 20 Hz to 20 kHz, See Figure 23 25C 2.5 V 0.29 % VI = V+ or GND, Switch ON or OFF Crosstalk adjacent Total harmonic distortion Supply Positive supply current I+ 25C Full 2.7 V 2.5 7 10 Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 A 7 TS3A5017 SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com TYPICAL PERFORMANCE 18 12 TA = 25C 16 10 V+ = 2.5 V 14 85C 8 10 rON () rON () 12 8 6 V+ = 3.3 V 25C 6 4 4 2 -40C 2 0 0 1 3 2 VCOM (V) 4 0 0.0 0.5 Figure 1. ron vs VCOM 1.0 Leakage Current (nA) 12 rON () 3.0 3.5 INC(ON) 14 85C 10 25C 6 4 2 0 0.0 ICOM(ON) 30 INO(ON) 20 10 INO(OFF) 0 0.5 1.0 1.5 2.0 2.5 -40 3.0 25 TA (C) VCOM (V) 4.0 8 V+ = 3.3 V 7 3.0 6 tON /tOFF (ns) 3.5 2.5 V+ = 2.5 V 2.0 85 Figure 4. Leakage Current vs Temperature (V+ = 3.6 V) 9 4.5 1.5 1.0 tON 5 4 3 tOFF 2 1 0.5 0.0 0.0 ICOM(OFF) INC(OFF) -40C Figure 3. ron vs VCOM (V+ = 2.5 V) Charge Injection (pC) 2.5 40 16 0.5 1.0 1.5 2.0 VCOM (V) 2.5 3.0 3.5 0 2.0 2.5 3.0 3.5 4.0 V+ (V) Figure 5. Charge Injection (QC) vs VCOM 8 2.0 VCOM (V) Figure 2. ron vs VCOM (V+ = 3.3 V) 18 8 1.5 Submit Documentation Feedback Figure 6. tON and tOFF vs Supply Voltage Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 TS3A5017 www.ti.com .......................................................................................................................................... SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 TYPICAL PERFORMANCE (continued) 2.0 5.0 1.8 tON /tOFF (ns) 4.0 Logic-Level Threshold (nA) 4.5 tON 3.5 3.0 2.5 2.0 tOFF 1.5 1.0 1.6 VIH 1.4 VIL 1.2 1.0 0.8 0.6 0.4 0.5 0.2 0.0 0.0 2.0 -40 25 85 2.2 2.4 TA (C) 2.6 2.8 3.0 3.2 3.4 V+ (V) 3.6 3.8 4.0 Figure 7. tON and tOFF vs Temperature (V+ = 3.3 V) Figure 8. Logic-Level Threshold vs V+ Figure 9. Bandwidth (Gain vs Frequency) (V+ = 3.3 V) Figure 10. OFF Isolation and Crosstalk vs Frequency (V+ = 3.3 V) 0.35 0.25 (A) THD (%) 0.30 0.20 0.15 0.10 10 100 1000 Frequency (Hz) 10 K 100 K (C) Figure 11. Total Harmonic Distortion vs Frequency Figure 12. Power-Supply Current vs Temperature (V+ = 3.6 V) Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 9 TS3A5017 SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com PIN DESCRIPTION 10 PIN NO. NAME 1 1EN Enable (active low) 2 IN2 Digital control to connect D to S 3 1S4 Analog I/O 4 1S3 Analog I/O 5 1S2 Analog I/O 6 1S1 Analog I/O 7 1D Common 8 GND DESCRIPTION Ground 9 2D Common 10 2S1 Analog I/O 11 2S2 Analog I/O 12 2S3 Analog I/O 13 2S4 Analog I/O 14 IN1 Digital control to connect D to S 15 2EN Enable (active low) 16 V+ Power supply Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 TS3A5017 www.ti.com .......................................................................................................................................... SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 PARAMETER DESCRIPTION SYMBOL DESCRIPTION VD Voltage at D VNC Voltage at S ron Resistance between D and S ports when the channel is ON ron Difference of ron between channels in a specific device ron(flat) Difference between the maximum and minimum value of ron in a channel over the specified range of conditions IS(OFF) Leakage current measured at the S port, with the corresponding channel (S to D) in the OFF state ISPWR(OFF) Leakage current measured at the S port under the powered down mode, V+ = 0 IS(ON) Leakage current measured at the S port, with the corresponding channel (S to D) in the ON state and the output (D) open ID(OFF) Leakage current measured at the D port, with the corresponding channel (D to S) in the OFF state IDPWR(OFF) Leakage current measured at the D port under the powered down mode, V+ = 0 ID(ON) Leakage current measured at the D port, with the corresponding channel (D to S) in the ON state and the output (S) open VIH Minimum input voltage for logic high for the control input (IN, EN) VIL Maximum input voltage for logic low for the control input (IN, EN) VI Voltage at the control input (IN, EN) IIH, IIL Leakage current measured at the control input (IN, EN) tON Turn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagation delay between the digital control (IN) signal and analog output (D or S) signal when the switch is turning ON. tOFF Turn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagation delay between the digital control (IN) signal and analog output (D or S) signal when the switch is turning OFF. QC Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (S or D) output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input. Charge injection, QC = CL x VD, CL is the load capacitance and VD is the change in analog output voltage. CS(OFF) Capacitance at the S port when the corresponding channel (S to D) is OFF CS(ON) Capacitance at the S port when the corresponding channel (S to D) is ON CD(OFF) Capacitance at the D port when the corresponding channel (D to S) is OFF CD(ON) Capacitance at the D port when the corresponding channel (D to S) is ON CI Capacitance of control input (IN) OISO OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific frequency, with the corresponding channel (S to D) in the OFF state. XTALK Crosstalk is a measurement of unwanted signal coupling from an ON channel to an OFF channel (1S1 to 2S1). This is measured in a specific frequency and in dB. BW Bandwidth of the switch. This is the frequency in which the gain of an ON channel is -3 dB below the DC gain. THD Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of root mean square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental harmonic. I+ Static power-supply current with the control (IN) pin at V+ or GND Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 11 TS3A5017 SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION Channel ON V - VS2-S4 or Vs1 ron = D ID VI = VIH or VIL Figure 13. ON-State Resistance (ron) OFF-State Leakage Current Channel OFF VI = VIH or VIL VS1 or VS2-S4 = 0 to V+ and VD = V+ to 0 Figure 14. OFF-State Leakage Current (ID(OFF), IS(OFF)) ON-State Leakage Current Channel ON VI = VIH or VIL Figure 15. ON-State Leakage Current (ID(ON), IS(ON)) 12 Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 TS3A5017 www.ti.com .......................................................................................................................................... SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 PARAMETER MEASUREMENT INFORMATION (continued) VBIAS = V+ to GND VI = VIH or VIL Capacitance is measured at S1, S2-S4, D, and IN inputs during ON and OFF conditions. Figure 16. Capacitance (CI, CD(OFF), CD(ON), CS(OFF), CS(ON)) CL 300 35 pF 300 35 pF (C) (B) V+ (B) 0 (A) tOFF A. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr < 5 ns, tf < 5 ns. B. CL includes probe and jig capacitance. C. See Electrical Characteristics for VD. Figure 17. Turn-On (tON) and Turn-Off Time (tOFF) Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 13 TS3A5017 SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) Channel ON: S1 to D VI = V+ or GND 50 Network Analyzer Setup Source Power = 0 dBm (632-mV P-P at 50- load) 50 DC Bias = 350 mV Figure 18. Bandwidth (BW) Channel OFF: S to D VI = V+ or GND 50 50 Network Analyzer Setup Source Power = 0 dBm (632-mV P-P at 50- load) 50 DC Bias = 350 mV Figure 19. OFF Isolation (OISO) Channel ON: S1 to D Channel OFF: S2-S4 to D VI = V+ or GND 50 VS2-S4 Network Analyzer Setup 50 50 Source Power = 0 dBm (632-mV P-P at 50- load) DC Bias = 350 mV Figure 20. Crosstalk (XTALK) 14 Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 TS3A5017 www.ti.com .......................................................................................................................................... SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 PARAMETER MEASUREMENT INFORMATION (continued) 50 V1S Channel ON: S1 to D 1S1 1D V2S 2S1 50 2D Network Analyzer Setup Source Power = 0 dBm (632-mV P-P at 50- load) 50 DC Bias = 350 mV Figure 21. Adjacent Crosstalk (XTALK) VIH VIL VD VGEN = 0 to V+ RGEN = 0 CL = 0.1 nF QC = CL X VD VI = VIH or VIL A. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr < 5 ns, tf < 5 ns. B. CL includes probe and jig capacitance. Figure 22. Charge Injection (QC) Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 15 TS3A5017 SCDS188D - JANUARY 2005 - REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) 10 F 10 F (A) 600 600 600 A. CL includes probe and jig capacitance. Figure 23. Total Harmonic Distortion (THD) 16 Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s): TS3A5017 PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TS3A5017D ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017DBQR ACTIVE SSOP DBQ 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TS3A5017DBQRE4 ACTIVE SSOP DBQ 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TS3A5017DBQRG4 ACTIVE SSOP DBQ 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TS3A5017DE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017DGVR ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017DGVRE4 ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017DGVRG4 ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017DR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017DRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017PW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017PWE4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017PWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017PWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017PWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 16-Aug-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TS3A5017PWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A5017RGYR ACTIVE VQFN RGY 16 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TS3A5017RGYRG4 ACTIVE VQFN RGY 16 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TBD Call TI Samples (Requires Login) TS3A5017RSV PREVIEW UQFN RSV 16 TS3A5017RSVR ACTIVE UQFN RSV 16 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Call TI TS3A5017RSVRG4 ACTIVE UQFN RSV 16 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TS3A5017DGVR Package Package Pins Type Drawing TVSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 TS3A5017DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TS3A5017PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TS3A5017RGYR VQFN RGY 16 3000 330.0 12.4 3.8 4.3 1.5 8.0 12.0 Q1 TS3A5017RSVR UQFN RSV 16 3000 180.0 12.4 2.1 2.9 0.75 4.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TS3A5017DGVR TVSOP DGV 16 2000 367.0 367.0 35.0 TS3A5017DR SOIC D 16 2500 333.2 345.9 28.6 TS3A5017PWR TSSOP PW 16 2000 367.0 367.0 35.0 TS3A5017RGYR VQFN RGY 16 3000 367.0 367.0 35.0 TS3A5017RSVR UQFN RSV 16 3000 203.0 203.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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