1
FEATURES
DESCRIPTION
APPLICATIONS
1EN V+
116
RGY PACKAGE
(TOP VIEW)
Exposed
Center
Pad
If exposed center pad is used, it must be
connected as a secondary ground
or left electrically open.
2
3
4
5
6
IN2
1S4
1S3
1S2
1S1
1D
2EN
IN1
2S4
2S3
2S2
2S1
7
GND 2D
8 9
15
14
13
12
11
10
1Logic
Control
Logic
Control 16
D, DBQ, DGV, OR PW PACKAGE
(TOP VIEW)
215
314
413
5
12
611
7
10
1EN
IN2
1S4
1S3
1S2
1S1
1D
GND
V+
2EN
IN1
2S4
2S3
2S2
2S1
2D
8 9
1S4
1S3
1S2
1S1
1EN
V+
IN2
2EN
IN1
2S4
2S3
2S2
1D
2S1
GND
2D
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
RSV PACKAGE
(TOP VIEW)
TS3A5017
www.ti.com
.......................................................................................................................................... SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008
DUAL SP4T ANALOG SWITCH3.3-V/2.5-V DUAL 4:1 ANALOG MULTIPLEXER/DEMULTIPLEXER
•Isolation in the Powered-Down Mode, V
+
= 0•Low ON-State Resistance
The TS3A5017 is a dual single-pole quadruple-throw(4:1) analog switch that is designed to operate from•Low Charge Injection
2.3 V to 3.6 V. This device can handle both digital•Excellent ON-State Resistance Matching
and analog signals, and signals up to V
+
can be•Low Total Harmonic Distortion (THD)
transmitted in either direction.•2.3-V to 3.6-V Single-Supply Operation
FUNCTION TABLE•Latch-Up Performance Exceeds 100 mA Per
D TO S,JESD 78, Class II
EN IN2 IN1
S TO D•ESD Performance Tested Per JESD 22
L L L D = S
1
– 2000-V Human-Body Model
L L H D = S
2(A114-B, Class II)
L H L D = S
3
L H H D = S
4– 1000-V Charged-Device Model (C101)
H X X OFF
•Sample-and-Hold Circuits•Battery-Powered Equipment•Audio and Video Signal Routing•Communication Circuits
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
TS3A5017
SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008 ..........................................................................................................................................
www.ti.com
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
µQFN – RSV Tape and reel TS3A5017RSVR ZVLQFN – RGY Tape and reel TS3A5017RGYR YA017Tube TS3A5017DSOIC – D TS3A5017Tape and reel TS3A5017DR– 40 ° C to 85 ° C
SSOP (QSOP) – DBQ Tape and reel TS3A5017DBQR YA017Tube TS3A5017PWTSSOP – PW YA017Tape and reel TS3A5017PWRTVSOP – DGV Tape and reel TS3A5017DGVR YA017
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
SUMMARY OF CHARACTERISTICSV
+
= 3.3 V, T
A
= 25 ° C
Dual AnalogConfiguration Multiplexer/Demultiplexer
(4:1 Mux/Demux)Number of channels 2ON-state resistance (r
on
) 11 Ω
ON-state resistance match ( Δr
on
) 1 Ω
ON-state resistance flatness (r
on(flat)
) 7 Ω
Turn-on/turn-off time (t
ON
/t
OFF
) 5 ns/1.5 nsCharge injection (Q
C
) 5 pCBandwidth (BW) 165 MHzOFF isolation (O
ISO
) – 48 dB at 10 MHzCrosstalk (X
TALK
) – 49 dB at 10 MHzTotal harmonic distortion (THD) 0.21%Leakage current (I
D(OFF)
/I
S(OFF)
) ± 0.1 µAPower-supply current (I
+
) 2.5 µA16-pin QFN, µQFN, SOIC,Package options
SSOP, TSSOP, or TVSOP
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ABSOLUTE MINIMUM AND MAXIMUM RATINGS
(1) (2)
PACKAGE THERMAL IMPEDANCE
TS3A5017
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.......................................................................................................................................... SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
+
Supply voltage
(3)
– 0.5 4.6 VV
S
, V
D
Analog voltage
(3) (4)
– 0.5 4.6 VI
SK
,
Analog port clamp current V
S
, V
D
< 0 – 50 mAI
DK
I
S
, I
D
On-state switch current V
S
, V
D
= 0 to 7 V – 128 128 mAV
I
Digital input voltage – 0.5 4.6 VI
IK
Digital input clamp current
(3) (4)
V
I
< 0 – 50 mAI
+
Continuous current through V
+
100 mAI
GND
Continuous current through GND – 100 mAT
stg
Storage temperature – 65 150 ° C
(1) Stresses beyond those listed under " absolute maximum ratings " may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under " recommended operatingconditions " is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.(3) All voltages are with respect to ground, unless otherwise specified.(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
UNIT
D package 73DB package 82DGV package 120θ
JA
Package thermal impedance
(1)
° C/WDW package 108RGY package 91.6RSV package 184
(1) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
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ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY
(1)
TS3A5017
SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008 ..........................................................................................................................................
www.ti.com
V
+
= 2.7 V to 3.6 V, T
A
= – 40 ° C to 85 ° C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS T
A
V
+
MIN TYP MAX UNIT
Analog Switch
Analog signal
V
D
, V
S
0 V
+
Vrange
25 ° C 11 12ON-state 0 ≤V
S
≤V
+
, Switch ON,r
on
3 V Ωresistance I
D
= – 32 mA, See Figure 13
Full 14ON-state 25 ° C 1 2resistance
V
S
= 2.1 V, Switch ON,match Δr
on
3 V ΩI
D
= – 32 mA, See Figure 13
Full 3between
channels
ON-state 25 ° C 7 90≤V
S
≤V
+
, Switch ON,resistance r
on(flat)
3 V ΩI
D
= – 32 mA, See Figure 13
Full 10flatness
V
S
= 1 V, V
D
= 3 V, 25 ° C – 0.1 0.05 0.1I
S(OFF)
or 3.6 VS
Full – 0.2 0.2Switch OFF,V
S
= 3 V, V
D
= 1 V,OFF leakage µASee Figure 14current 25 ° C – 1 0.5 1V
S
= 0 to 3.6 V,I
SPWR(OFF)
0 VV
D
= 3.6 V to 0,
Full – 5 5V
S
= 1 V, V
D
= 3 V, 25 ° C – 0.1 0.05 0.1I
D(OFF)
or 3.6 VD
Full – 0.2 0.2Switch OFF,V
S
= 3 V, V
D
= 1 V,OFF leakage µASee Figure 14current 25 ° C – 1 0.5 1V
D
= 0 to 3.6 V,I
DPWR(OFF)
0 VV
S
= 3.6 V to 0,
Full – 5 5S V
S
= 1 V, V
D
= Open, 25 ° C – 0.1 0.05 0.1Switch ON,ON leakage I
S(ON)
or 3.6 V µASee Figure 15
Full – 0.2 0.2current V
S
= 3 V, V
D
= Open,D V
D
= 1 V, V
S
= Open, 25 ° C – 0.1 0.05 0.1Switch ON,ON leakage I
D(ON)
or 3.6 V µASee Figure 15
Full – 0.2 0.2current V
D
= 3 V, V
S
= Open,
Digital Control Inputs (IN1, IN2, EN)
(2)
Input logic high V
IH
Full 2 V
+
VInput logic low V
IL
Full 0 0.8 V25 ° C – 1 0.05 1Input leakage
I
IH
, I
IL
V
I
= V
+
or 0 3.6 V µAcurrent
Full – 1 1
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum(2) All unused digital inputs of the device must be held at V
+
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated
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TS3A5017
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.......................................................................................................................................... SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008
ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY (continued)V
+
= 2.7 V to 3.6 V, T
A
= – 40 ° C to 85 ° C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS T
A
V
+
MIN TYP MAX UNIT
Dynamic
25 ° C 3.3 V 1 5 9.5V
D
= 2 V, C
L
= 35 pF,Turn-on time t
ON
nsR
L
= 300 Ω, See Figure 17
Full 3 V to 3.6 V 1 10.525 ° C 3.3 V 0.5 1.5 3.5V
D
= 2 V, C
L
= 35 pF,Turn-off time t
OFF
nsR
L
= 300 Ω, See Figure 17
Full 3 V to 3.6 V 0.5 4.5V
GEN
= 0, R
GEN
= 0,Charge injection Q
C
See Figure 22 25 ° C 3.3 V 5 pCC
L
= 0.1 nF,S
V
S
= V
+
or GND,OFF C
S(OFF)
See Figure 16 25 ° C 3.3 V 4.5 pFSwitch OFF,capacitance
D
V
D
= V
+
or GND,OFF C
D(OFF)
See Figure 16 25 ° C 3.3 V 19 pFSwitch OFF,capacitance
S V
S
= V
+
or GND,C
S(ON)
See Figure 16 25 ° C 3.3 V 25 pFON capacitance Switch ON,D V
D
= V
+
or GND,C
D(ON)
See Figure 16 25 ° C 3.3 V 25 pFON capacitance Switch ON,Digital input
C
I
V
I
= V
+
or GND, See Figure 16 25 ° C 3.3 V 2 pFcapacitance
R
L
= 50 Ω,Bandwidth BW See Figure 18 25 ° C 3.3 V 165 MHzSwitch ON,R
L
= 50 Ω,OFF isolation O
ISO
See Figure 19 25 ° C 3.3 V – 48 dBf = 1 MHz,R
L
= 50 Ω,Crosstalk X
TALK
See Figure 20 25 ° C 3.3 V – 49 dBf = 1 MHz,Crosstalk R
L
= 50 Ω,X
TALK(ADJ)
See Figure 21 25 ° C 3.3 V – 74 dBadjacent f = 1 MHz,Total harmonic R
L
= 600 Ω, f = 20 Hz to 20 kHz,THD 25 ° C 3.3 V 0.21 %distortion C
L
= 50 pF, See Figure 23
Supply
25 ° C 2.5 7Positive supply
I
+
V
I
= V
+
or GND, Switch ON or OFF 3.6 V µAcurrent
Full 10
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ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY
(1)
TS3A5017
SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008 ..........................................................................................................................................
www.ti.com
V
+
= 2.3 V to 2.7 V, T
A
= – 40 ° C to 85 ° C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS T
A
V
+
MIN TYP MAX UNIT
Analog Switch
Analog signal
V
D
, V
S
0 V
+
Vrange
25 ° C 20.5 22ON-state 0 ≤V
S
≤V
+
, Switch ON,r
on
2.3 V Ωresistance I
D
= – 24 mA, See Figure 13
Full 24ON-state 25 ° C 1 2V
S
= 1.6 V, Switch ON,resistance match Δr
on
2.3 V ΩI
D
= – 24 mA, See Figure 13
Full 3between channels
25 ° C 16 18ON-state 0 ≤V
S
≤V
+
, Switch ON,r
on(flat)
2.3 V Ωresistance flatness I
D
= – 24 mA, See Figure 13
Full 20V
S
= 0.5 V, V
D
= 2.2 V, 25 ° C – 0.1 0.05 0.1I
S(OFF)
or 2.7 VS
Full – 0.2 0.2Switch OFF,V
S
= 2.2 V, V
D
= 0.5 V,OFF leakage µASee Figure 14current 25 ° C – 1 0.5 1V
S
= 0 to 2.7 V,I
SPWR(OFF)
0 VV
D
= 2.7 V to 0,
Full – 5 5V
S
= 0.5 V, V
D
= 2.2 V, 25 ° C – 0.1 0.05 0.1I
D(OFF)
or 2.7 VD
Full – 0.2 0.2Switch OFF,V
S
= 2.2 V, V
D
= 0.5V,OFF leakage µASee Figure 14current 25 ° C – 1 0.5 1V
D
= 0 to 2.7 V,I
DPWR(OFF)
0 VV
S
= 2.7 V to 0,
Full – 5 5S V
S
= 0.5 V, V
D
= Open, 25 ° C – 0.1 0.05 0.1Switch ON,ON leakage I
S(ON)
or 2.7 V µASee Figure 15
Full – 0.2 0.2current V
S
= 2.2 V, V
D
= Open,D V
D
= 0.5 V, V
S
= Open, 25 ° C – 0.1 0.05 0.1Switch ON,ON leakage I
D(ON)
or 2.7 V µASee Figure 15
Full – 0.2 0.2current V
D
= 2.2 V, V
S
= Open,
Digital Control Inputs (IN1, IN2, EN)
(2)
Input logic high V
IH
Full 1.7 V
+
VInput logic low V
IL
Full 0 0.7 V25 ° C – 1 0.05 1Input leakage
I
IH
, I
IL
V
I
= V
+
or 0 2.7 V µAcurrent
Full – 1 1
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum(2) All unused digital inputs of the device must be held at V
+
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
6Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated
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TS3A5017
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.......................................................................................................................................... SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008
ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY (continued)V
+
= 2.3 V to 2.7 V, T
A
= – 40 ° C to 85 ° C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS T
A
V
+
MIN TYP MAX UNIT
Dynamic
25 ° C 2.5 V 1.5 5 8V
D
= 2 V, C
L
= 35 pF,Turn-on time t
ON
ns2.3 V toR
L
= 300 Ω, See Figure 17
Full 1 102.7 V25 ° C 2.5 V 0.3 2 4.5V
D
= 2 V, C
L
= 35 pF,Turn-off time t
OFF
ns2.3 V toR
L
= 300 Ω, See Figure 17
Full 0.3 62.7 VV
GEN
= 0, R
GEN
= 0,Charge injection Q
C
See Figure 22 25 ° C 2.5 V pCC
L
= 0.1 nF,S V
S
= V
+
or GND,C
S(OFF)
See Figure 16 25 ° C 2.5 V 4.5 pFOFF capacitance Switch OFF,D V
D
= V
+
or GND,C
D(OFF)
See Figure 16 25 ° C 2.5 V 18.5 pFOFF capacitance Switch OFF,S V
S
= V
+
or GND,C
S(ON)
See Figure 16 25 ° C 2.5 V 24 pFON capacitance Switch ON,D V
D
= V
+
or GND,C
D(ON)
See Figure 16 25 ° C 2.5 V 24 pFON capacitance Switch ON,Digital input
C
I
V
I
= V
+
or GND, See Figure 16 25 ° C 2.5 V 2 pFcapacitance
R
L
= 50 Ω,Bandwidth BW See Figure 18 25 ° C 2.5 V 165 MHzSwitch ON,R
L
= 50 Ω,OFF isolation O
ISO
See Figure 19 25 ° C 2.5 V – 48 dBf = 1 MHz,R
L
= 50 Ω,Crosstalk X
TALK
See Figure 20 25 ° C 2.5 V – 49 dBf = 1 MHz,R
L
= 50 Ω,Crosstalk adjacent X
TALK(ADJ)
See Figure 21 25 ° C 2.5 V – 74 dBf = 1 MHz,Total harmonic R
L
= 600 Ω, f = 20 Hz to 20 kHz,THD 25 ° C 2.5 V 0.29 %distortion C
L
= 50 pF, See Figure 23
Supply
25 ° C 2.5 7Positive supply
I
+
V
I
= V
+
or GND, Switch ON or OFF 2.7 V µAcurrent
Full 10
Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
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TYPICAL PERFORMANCE
r(
ON Ω)
V (V)
COM
T = 25°C
A
V = 2.5 V
+
V = 3.3 V
+
1 42 3
18
12
6
16
10
4
14
8
2
0
0
0
2
4
6
8
10
12
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
85°C
25°C
– °C40
r(
ON Ω)
V (V)
COM
Leakage Current (nA)
ICOM(ON)
INC(ON)
INC(OFF)
INO(ON)
INO(OFF)
ICOM(OFF)
40
10
–40 25 85
30
20
0
T (°C)
A
0
2
4
6
8
10
12
14
16
18
0.0 0.5 1.0 1.5 2.0 2.5 3.0
85°C
25°C
– °40 C
VCOM (V)
r(
ON Ω)
Charge Injection (pC)
V (V)
COM
V = 2.5 V
+
V = 3.3 V
+
3.0
3.0
1.5
1.5
4.0
4.5
2.5
2.5
1.0
1.0
3.5
3.5
2.0
2.0
0.5
0.5
0.0
0.0
t /
ON t(ns
OFF )
6
7
4
5
8
9
2
3
0
1
V (V)
+
2.0 2.5 3.0 3.5 4.0
tON
tOFF
TS3A5017
SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008 ..........................................................................................................................................
www.ti.com
Figure 1. r
on
vs V
COM
Figure 2. r
on
vs V
COM
(V
+
= 3.3 V)
Figure 3. r
on
vs V
COM
(V
+
= 2.5 V) Figure 4. Leakage Current vs Temperature (V
+
= 3.6 V)
Figure 5. Charge Injection (Q
C
) vs V
COM
Figure 6. t
ON
and t
OFF
vs Supply Voltage
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2.0
2.0 2.2 2.4 2.6 2.8 3.0
VIL
VIH
V (V)
+
3.2 3.4 3.6 3.8 4.0
Logic-Level Threshold (nA)
1.0
1.8
0.8
1.6
0.6
1.4
0.4
1.2
0.2
0.0
THD (%)
0.35
0.30
0.25
0.20
0.15
0.10
10 100 1000
Frequency (Hz)
10 K 100 K
TS3A5017
www.ti.com
.......................................................................................................................................... SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008
TYPICAL PERFORMANCE (continued)
Figure 7. t
ON
and t
OFF
vs Temperature (V
+
= 3.3 V) Figure 8. Logic-Level Threshold vs V
+
Figure 9. Bandwidth (Gain vs Frequency) (V
+
= 3.3 V) Figure 10. OFF Isolation and Crosstalk vs Frequency(V
+
= 3.3 V)
Figure 11. Total Harmonic Distortion vs Frequency Figure 12. Power-Supply Current vs Temperature(V
+
= 3.6 V)
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TS3A5017
SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008 ..........................................................................................................................................
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PIN DESCRIPTION
PIN
NAME DESCRIPTIONNO.
1 1 EN Enable (active low)2 IN2 Digital control to connect D to S3 1S
4
Analog I/O4 1S
3
Analog I/O5 1S
2
Analog I/O6 1S
1
Analog I/O7 1D Common8 GND Ground9 2D Common10 2S
1
Analog I/O11 2S
2
Analog I/O12 2S
3
Analog I/O13 2S
4
Analog I/O14 IN1 Digital control to connect D to S15 2 EN Enable (active low)16 V
+
Power supply
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.......................................................................................................................................... SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008
PARAMETER DESCRIPTION
SYMBOL DESCRIPTION
V
D
Voltage at DV
NC
Voltage at Sr
on
Resistance between D and S ports when the channel is ON
Δr
on
Difference of r
on
between channels in a specific devicer
on(flat)
Difference between the maximum and minimum value of r
on
in a channel over the specified range of conditionsI
S(OFF)
Leakage current measured at the S port, with the corresponding channel (S to D) in the OFF stateI
SPWR(OFF)
Leakage current measured at the S port under the powered down mode, V
+
= 0I
S(ON)
Leakage current measured at the S port, with the corresponding channel (S to D) in the ON state and the output (D) openI
D(OFF)
Leakage current measured at the D port, with the corresponding channel (D to S) in the OFF stateI
DPWR(OFF)
Leakage current measured at the D port under the powered down mode, V
+
= 0I
D(ON)
Leakage current measured at the D port, with the corresponding channel (D to S) in the ON state and the output (S) openV
IH
Minimum input voltage for logic high for the control input (IN, EN)V
IL
Maximum input voltage for logic low for the control input (IN, EN)V
I
Voltage at the control input (IN, EN)I
IH
, I
IL
Leakage current measured at the control input (IN, EN)Turn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagationt
ON
delay between the digital control (IN) signal and analog output (D or S) signal when the switch is turning ON.Turn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagationt
OFF
delay between the digital control (IN) signal and analog output (D or S) signal when the switch is turning OFF.Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (S or D) output.Q
C
This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input. Chargeinjection, Q
C
= C
L
×ΔV
D
, C
L
is the load capacitance and ΔV
D
is the change in analog output voltage.C
S(OFF)
Capacitance at the S port when the corresponding channel (S to D) is OFFC
S(ON)
Capacitance at the S port when the corresponding channel (S to D) is ONC
D(OFF)
Capacitance at the D port when the corresponding channel (D to S) is OFFC
D(ON)
Capacitance at the D port when the corresponding channel (D to S) is ONC
I
Capacitance of control input (IN)OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specificO
ISO
frequency, with the corresponding channel (S to D) in the OFF state.Crosstalk is a measurement of unwanted signal coupling from an ON channel to an OFF channel (1S
1
to 2S
1
). This isX
TALK
measured in a specific frequency and in dB.BW Bandwidth of the switch. This is the frequency in which the gain of an ON channel is – 3 dB below the DC gain.Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of rootTHD mean square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamentalharmonic.I
+
Static power-supply current with the control (IN) pin at V
+
or GND
Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TS3A5017
PARAMETER MEASUREMENT INFORMATION
ChannelON
V V
V =V
D S2-S4
–
I IH
orV
I
orV
s1
D
IL
Ω
r =
on
OFF-StateLeakageCurrent
ChannelOFF
V =V orV
V orV =0toV
and
V =V to0
I IH IL
D +
S1 S2-S4 +
ON-StateLeakageCurrent
ChannelON
V =V orV
I IH IL
TS3A5017
SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008 ..........................................................................................................................................
www.ti.com
Figure 13. ON-State Resistance (r
on
)
Figure 14. OFF-State Leakage Current (I
D(OFF)
, I
S(OFF)
)
Figure 15. ON-State Leakage Current (I
D(ON)
, I
S(ON)
)
12 Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TS3A5017
V =V toGND
BIAS +
V =V orV
CapacitanceismeasuredatS1,
S2-S4,D,andINinputsduring
ONandOFFconditions.
I IH IL
(A)
(C)
(B)
(B)
tOFF
V+
0
300 Ω
300 Ω 35pF
35pF
CL
TS3A5017
www.ti.com
.......................................................................................................................................... SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 16. Capacitance (C
I
, C
D(OFF)
, C
D(ON)
, C
S(OFF)
, C
S(ON)
)
A. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, Z
O
= 50 Ω, t
r
< 5 ns,t
f
< 5 ns.B. C
L
includes probe and jig capacitance.C. See Electrical Characteristics for V
D
.
Figure 17. Turn-On (t
ON
) and Turn-Off Time (t
OFF
)
Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): TS3A5017
Network AnalyzerSetup
SourcePower=0dBm
(632-mVP-P at50- load)
DCBias=350mV
Ω
ChannelON:S toD
V =V orGND
1
I +
50 Ω
50 Ω
Network AnalyzerSetup
SourcePower=0dBm
(632-mVP-P at50- load)
DCBias=350mV
Ω
ChannelOFF:StoD
V =V orGND
I +
50 Ω
50 Ω
50 Ω
Network AnalyzerSetup
SourcePower=0dBm
(632-mVP-P at50- load)
DCBias=350mV
Ω
ChannelON:S toD
V =V orGND
1
I +
ChannelOFF:S -S toD
2 4
50 Ω
50 Ω 50 Ω
VS2-S4
TS3A5017
SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008 ..........................................................................................................................................
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 18. Bandwidth (BW)
Figure 19. OFF Isolation (O
ISO
)
Figure 20. Crosstalk (X
TALK
)
14 Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TS3A5017
Network AnalyzerSetup
SourcePower=0dBm
(632-mVP-P at50- load)
DCBias=350mV
Ω
ChannelON:S toD
1
50 Ω
50 Ω
50 Ω
V2S
V1S
2S1
1S1
1D
2D
V =0toV
GEN +
R =0
C =0.1nF
Q =C V
V =V orV
GEN
L
C L D
I IH IL
XΔ
VΔ D
VIH
VIL
TS3A5017
www.ti.com
.......................................................................................................................................... SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 21. Adjacent Crosstalk (X
TALK
)
A. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, Z
O
= 50 Ω, t
r
< 5 ns,t
f
< 5 ns.B. C
L
includes probe and jig capacitance.
Figure 22. Charge Injection (Q
C
)
Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): TS3A5017
10µF
10µF
(A)
600 Ω
600 Ω
600 Ω
TS3A5017
SCDS188D – JANUARY 2005 – REVISED DECEMBER 2008 ..........................................................................................................................................
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
A. C
L
includes probe and jig capacitance.
Figure 23. Total Harmonic Distortion (THD)
16 Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TS3A5017
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TS3A5017D ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017DBQR ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TS3A5017DBQRE4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TS3A5017DBQRG4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TS3A5017DE4 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017DG4 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017DGVR ACTIVE TVSOP DGV 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017DGVRE4 ACTIVE TVSOP DGV 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017DGVRG4 ACTIVE TVSOP DGV 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017DR ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017DRE4 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017DRG4 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017PW ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017PWE4 ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017PWG4 ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017PWR ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017PWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TS3A5017PWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017RGYR ACTIVE VQFN RGY 16 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TS3A5017RGYRG4 ACTIVE VQFN RGY 16 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TS3A5017RSV PREVIEW UQFN RSV 16 TBD Call TI Call TI
TS3A5017RSVR ACTIVE UQFN RSV 16 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A5017RSVRG4 ACTIVE UQFN RSV 16 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TS3A5017DGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1
TS3A5017DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
TS3A5017PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TS3A5017RGYR VQFN RGY 16 3000 330.0 12.4 3.8 4.3 1.5 8.0 12.0 Q1
TS3A5017RSVR UQFN RSV 16 3000 180.0 12.4 2.1 2.9 0.75 4.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TS3A5017DGVR TVSOP DGV 16 2000 367.0 367.0 35.0
TS3A5017DR SOIC D 16 2500 333.2 345.9 28.6
TS3A5017PWR TSSOP PW 16 2000 367.0 367.0 35.0
TS3A5017RGYR VQFN RGY 16 3000 367.0 367.0 35.0
TS3A5017RSVR UQFN RSV 16 3000 203.0 203.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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