Supertex inc. VP0104 P-Channel Enhancement-Mode Vertical DMOS FETs Features General Description Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds High input impedance and high gain Excellent thermal stability Integral source-to-drain diode The Supertex VP0104 is an enhancement-mode (normallyoff) transistor that utilizes a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Applications Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Motor controls Converters Amplifiers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Ordering Information Package Device VP0104 Wafer / Die Options TO-92 NW (Die in wafer form) NJ (Die on adhesive tape) ND (Die in waffle pack) VP0104N3-G VP1504NW VP1504NJ VP1504ND For packaged products, -G indicates package is RoHS compliant (`Green'). Devices in Wafer / Die form are RoHS compliant (`Green'). Refer to Die Specification VF15 for layout and dimensions. Pin Configuration Product Summary RDS(ON) ID(ON) (V) (max) () (min) (mA) -40 8.0 -500 Device BVDSS/BVDGS VP0104N3-G DRAIN SOURCE Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage 20V Operating and storage temperature -55C to +150C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Supertex inc. GATE TO-92 (N3) Product Marking SiVP 0 1 0 4 YYWW YY = Year Sealed WW = Week Sealed = "Green" Packaging Package may or may not include the following marks: Si or TO-92 (N3) 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com VP0104 Thermal Characteristics ID ID Power Dissipation jc ja IDR IDRM Package (continuous) (mA) (pulsed) (mA) @TC = 25OC (W) ( C/W) ( C/W) (mA) (mA) TO-92 -250 -800 1.0 125 170 -250 -800 O O Notes: ID (continuous) is limited by max rated Tj . Electrical Characteristics (T = 25C unless otherwise specified) A Sym Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage -40 - - V VGS = 0V, ID = -1.0mA VGS(th) Gate threshold voltage -1.5 - -3.5 V VGS = VDS, ID = -1.0mA Change in VGS(th) with temperature - 5.8 6.5 mV/ C VGS = VDS, ID = -1.0mA Gate body leakage current - -1.0 -100 nA VGS = 20V, VDS = 0V - - -10 A VGS = 0V, VDS = Max Rating - - -1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125OC -0.15 -0.25 - -0.5 -1.2 - VGS(th) IGSS O Conditions IDSS Zero gate voltage drain current ID(ON) On-state drain current RDS(ON) Static drain-to-source on-state resistance - 11 15 - 6.0 8.0 Change in RDS(ON) with temperature - 0.55 1.0 %/ C VGS = -10V, ID = -500mA 150 190 - mmho VDS = -25V, ID = -500mA RDS(ON) GFS Forward transconductance CISS Input capacitance - 45 60 COSS Common source output capacitance - 22 30 CRSS Reverse transfer capacitance - 3.0 8.0 td(ON) Turn-on delay time - 4.0 6.0 Rise time - 3.0 10 Turn-off delay time - 8.0 12 Fall time - 4.0 10 Diode forward voltage drop - -1.2 Reverse recovery time - 400 tr td(OFF) tf VSD trr A O VGS = -5.0V, VDS = -25V VGS = -10V, VDS = -25V VGS = -5.0V, ID = -100mA VGS = -10V, ID = -500mA pF VGS = 0V, VDS = -25V, f = 1.0MHz ns VDD = -25V, ID = -500mA, RGEN = 25 -2.0 V VGS = 0V, ISD = -1.0A - ns VGS = 0V, ISD = -1.0A Notes: 1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V Pulse Generator 10% INPUT -10V td(ON) RGEN 90% t(OFF) t(ON) td(OFF) tr D.U.T. tf INPUT 0V 90% OUTPUT VDD 10% Supertex inc. Output RL 90% 10% VDD 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2 VP0104 Typical Performance Curves Output Characteristics -2.0 VGS = -10V -9V -0.8 VGS = -10V -1.2 -9V -8V -0.8 ID (amperes) -1.6 ID (amperes) Saturation Characteristics -1.0 -8V -0.6 -7V -0.4 -7V -6V -6V -0.4 -0.2 -5V -4V 0 0 -10 -20 -30 0 -40 -5V -4V 0 -2 -4 Transconductance vs. Drain Current VDS = -25V -10 2.0 Power Dissipation vs. Case Temperature TA = -55OC 200 TA = 25OC TA = 125OC 150 100 PD (watts) GFS (millisiemens) -8 VDS (volts) VDS (volts) 250 -6 TO-92 1.0 50 0 0 -0.2 -0.4 -0.6 -0.8 0 -1.0 0 25 50 Maximum Rated Safe Operating Area ID (amperes) -1.0 TO-92 (DC) -0.1 -0.01 -0.1 1.0 Thermal Resistance (normalized) -10 TC = 25OC -1.0 -10 VDS (volts) Supertex inc. 75 100 125 150 TC (OC) ID (amperes) -100 Thermal Response Characteristics 0.8 0.6 0.4 TO-92 PD = 1W TC = 25OC 0.2 0 0.001 0.01 0.1 1.0 10 tP (seconds) 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 3 VP0104 Typical Performance Curves (cont.) BVDSS Variation with Temperature 1.10 VGS = -5.0V 40 RDS(ON) (ohms) 1.06 1.02 0.98 VGS = -10V 30 20 10 0.94 0.90 -50 0 50 100 0 150 0 -0.3 -0.6 -0.6 TA = 125 C O -0.4 -0.2 -1.6 RDS(ON) @ 10V, -0.5A -1.4 TA = 25OC VGS(th) (normalized) -0.8 -1.5 -1.6 TA = -55OC VDS = -25V -1.2 V(th) and RDS Variation with Temperature Transfer Characteristics -1.0 -0.9 ID (amperes) Tj (OC) RDS(ON) @ -5V, -0.1A -1.4 -1.2 -1.2 -1.0 -1.0 -0.8 V(th) @ -1.0mA 0 0 -2 -4 -6 -8 0.6 -50 -10 0 50 VGS (volts) 100 -0.8 150 Tj (OC) Capacitance vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics -10 100 f = 1MHz VDS = -10V -8 VGS (volts) C (picofarads) 75 50 CISS 25 70pf -6 70pf -4 45pf -2 COSS VDS = -40V CRSS 0 0 -10 -20 -30 VDS (volts) Supertex inc. -40 0 0 0.2 0.4 0.6 0.8 1.0 QG (nanocoulombs) 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 4 RDS(ON) (normalized) BVDSS (normalized) On-Resistance vs. Drain Current 50 VP0104 3-Lead TO-92 Package Outline (N3) D A Seating Plane 1 2 3 L b e1 e c Side View Front View E1 E 3 1 2 Bottom View Symbol Dimensions (inches) A b c D E E1 e e1 L MIN .170 .014 .014 .175 .125 .080 .095 .045 .500 NOM - - - - - - - - - MAX .210 .022 .022 .205 .165 .105 .105 .055 .610* JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. (The package drawing (s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate "product liability indemnification insurance agreement." Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. (c)2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-VP0104 B062211 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 5