LTC3624/LTC3624-2
1
36242fd
For more information www.linear.com/LTC3624
Typical applicaTion
FeaTures DescripTion
17V, 2A Synchronous
Step-Down Regulator with
3.5µA Quiescent Current
The LT C
®
3624/LTC3624-2 is a high efficiency 17V, 2A
synchronous monolithic step-down regulator. The switch-
ing frequency is fixed to 1MHz (LTC3624) or 2.25MHz
(LTC3624-2) with a ±40% synchronization range. The
regulator features ultralow quiescent current and high
efficiency over a wide VOUT range.
The step-down regulator operates from an input voltage
range of 2.7V to 17V and provides an adjustable output
range from 0.6V to VIN while delivering up to 2A of output
current. A user-selectable mode input is provided to allow
the user to trade off ripple noise for light load efficiency;
Burst Mode operation provides the highest efficiency at
light loads, while pulse-skipping mode provides the lowest
voltage ripple. The MODE pin can also be used to sync the
switching frequency to an external clock.
Efficiency and Power Loss vs Load
5V VOUT with 800mA Burst Clamp, fSW = 1MHz
applicaTions
n Wide VIN Range: 2.7V to 17V
n Wide VOUT Range: 0.6V to VIN
n 95% Max Efficiency
n Low IQ: 3.5µA, Zero-Current Shutdown
n Constant Frequency (1MHz/2.25MHz)
n Fixed VOUT Options Available
n Low Dropout Operation (100% Duty Cycle) with
Ultralow IQ
n 2A Rated Output Current
n ±1% Output Voltage Accuracy
n Current Mode Operation for Excellent Line and Load
Transient Response
n Synchronizable to External Clock
n Pulse-Skipping, Forced Continuous, Burst Mode
®
Operation
n Internal Compensation and Soft-Start
n Overtemperature Protection
n Compact 8-Lead DFN (3mm × 3mm) Package
n Battery Powered Equipment
n Portable Instrumentation
n Emergency Radios
n General Purpose Step-Down Supplies L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258,
6498466, 6611131, 6177787, 5705919, 5847554, 6703692.
LTC3624/LTC3624-2 Options
PART NAME FREQUENCY VOUT
LTC3624 1MHz Adjustable
LTC3624-3.3 1MHz 3.3V
LTC3624-5 1MHz 5V
LTC3624-2 2.25MHz Adjustable
LTC3624-23.3 2.25MHz 3.3V
LTC3624-25 2.25MHz 5V
LOAD CURRENT (A)
0
0
EFFICIENCY (%)
POWER LOSS (W)
10
30
40
50
100
70
0.5 1
3624 TA01b
20
80
90
60
0
0.2
0.4
0.6
1.2
1.0
0.8
1.5 2
VOUT = 5V
BURST MODE OPERATION
VIN = 12V
VIN = 8V
VIN = 6V
FREQ = 1MHz
2.2µF
47µF
36242 TA01a
3.3µH VOUT
5V
2A
VIN
RUN
SW
VIN
5.6V TO 17V
LTC3624-5
GND
FB
MODE/SYNC
INTVCC
10µF
LTC3624/LTC3624-2
2
36242fd
For more information www.linear.com/LTC3624
absoluTe MaxiMuM raTings
VIN Voltage ................................................. 0.3V to 17V
RUN Voltage............................................... 0.3V to 17V
MODE/SYNC, FB Voltages ............................ 0.3V to 6V
INTVCC, PGOOD Voltages ............................ 0.3V to 6V
(Note 1)
TOP VIEW
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
5
6
7
8
9
GND
4
3
2
1SW
VIN
RUN
PGOOD
GND
MODE/SYNC
INTVCC
FB
TJMAX = 125°C, θJA = 43°C/W, θJC = 5.5°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
1
2
3
4
5
6
SW
SW
VIN
VIN
RUN
PGOOD
12
11
10
9
8
7
GND
GND
MODE/SYNC
INTVCC
FB
NC
13
GND
TOP VIEW
MSE PACKAGE
12-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 40°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB FOR
OPTIMAL THERMAL PERFORMANCE
pin conFiguraTion
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3624EDD#PBF LTC3624EDD#TRPBF LGJF 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624IDD#PBF LTC3624IDD#TRPBF LGJF 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624EMSE#PBF LTC3624EMSE#TRPBF 3624 12-Lead Plastic MSOP –40°C to 125°C
LTC3624IMSE#PBF LTC3624IMSE#TRPBF 3624 12-Lead Plastic MSOP –40°C to 125°C
LTC3624HMSE#PBF LTC3624HMSE#TRPBF 3624 12-Lead Plastic MSOP –40°C to 150°C
LTC3624EDD-3.3#PBF LTC3624EDD-3.3#TRPBF LGRG 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624IDD-3.3#PBF LTC3624IDD-3.3#TRPBF LGRG 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624EMSE-3.3#PBF LTC3624EMSE-3.3#TRPBF 362433 12-Lead Plastic MSOP –40°C to 125°C
LTC3624IMSE-3.3#PBF LTC3624IMSE-3.3#TRPBF 362433 12-Lead Plastic MSOP –40°C to 125°C
LTC3624HMSE-3.3#PBF LTC3624HMSE-3.3#TRPBF 362433 12-Lead Plastic MSOP –40°C to 150°C
LTC3624EDD-5#PBF LTC3624EDD-5#TRPBF LGRD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624IDD-5#PBF LTC3624IDD-5#TRPBF LGRD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624EMSE-5#PBF LTC3624EMSE-5#TRPBF 36245 12-Lead Plastic MSOP –40°C to 125°C
LTC3624IMSE-5#PBF LTC3624IMSE-5#TRPBF 36245 12-Lead Plastic MSOP –40°C to 125°C
LTC3624HMSE-5#PBF LTC3624HMSE-5#TRPBF 36245 12-Lead Plastic MSOP –40°C to 150°C
LTC3624EDD-2#PBF LTC3624EDD-2#TRPBF LGMN 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624IDD-2#PBF LTC3624IDD-2#TRPBF LGMN 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624EMSE-2#PBF LTC3624EMSE-2#TRPBF 36242 12-Lead Plastic MSOP –40°C to 125°C
LTC3624IMSE-2#PBF LTC3624IMSE-2#TRPBF 36242 12-Lead Plastic MSOP –40°C to 125°C
Operating Junction Temperature Range
(Notes 2, 5) ............................................40°C to 150°C
Storage Temperature Range .................. 65°C to 150°C
http://www.linear.com/product/LTC3624#orderinfo
LTC3624/LTC3624-2
3
36242fd
For more information www.linear.com/LTC3624
elecTrical characTerisTics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C. (Note 2) VIN = 12V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Operating Voltage 2.7 17 V
VOUT Output Voltage Range 0.6 VIN V
IVIN Input Quiescent Current Shutdown Mode, VRUN = 0V
Burst Mode Operation
Forced Continuous Mode (Note 3)
0.1
3.5
1.8
1.0
7
µA
µA
mA
VFB Regulated Feedback Voltage (Note 4)
l
0.594
0.591
0.6
0.6
0.606
0.609
V
V
VOUT Regulated Fixed Output Voltage LTC3624-3.3/LTC3624-23.3 (Note 4)
l
3.267
3.250
3.3
3.3
3.333
3.350
V
V
LTC3624-5/LTC3624-25 (Note 4)
l
4.950
4.925
5.0
5.0
5.050
5.075
V
V
ΔVLINE(REG) Reference Voltage Line Regulation VIN = 2.7V to 17V (Note 4) 0.01 0.015 %/V
ΔVLOAD(REG) Output Voltage Load Regulation (Note 4) 0.1 %
ILSW NMOS Switch Leakage
PMOS Switch Leakage
0.1
0.1
1
1
µA
µA
RDS(ON) NMOS On-Resistance 115
PMOS On-Resistance VIN = 5V 200
DMAX Maximum Duty Cycle VFB = 0.5V, VMODE/SYNC = 1.5V l100 %
tON(MIN) Minimum On-Time 60 ns
VRUN RUN Input High
RUN Input Low
0.35
1.0 V
V
IRUN RUN Input Current VRUN = 12V 0 100 nA
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3624HMSE-2#PBF LTC3624HMSE-2#TRPBF 36242 12-Lead Plastic MSOP –40°C to 150°C
LTC3624EDD-23.3#PBF LTC3624EDD-23.3#TRPBF LGRH 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624IDD-23.3#PBF LTC3624IDD-23.3#TRPBF LGRH 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624EMSE-23.3#PBF LTC3624EMSE-23.3#TRPBF 362423 12-Lead Plastic MSOP –40°C to 125°C
LTC3624IMSE-23.3#PBF LTC3624IMSE-23.3#TRPBF 362423 12-Lead Plastic MSOP –40°C to 125°C
LTC3624HMSE-23.3#PBF LTC3624HMSE-23.3#TRPBF 362423 12-Lead Plastic MSOP –40°C to 150°C
LTC3624EDD-25#PBF LTC3624EDD-25#TRPBF LGRF 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624IDD-25#PBF LTC3624IDD-25#TRPBF LGRF 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3624EMSE-25#PBF LTC3624EMSE-25#TRPBF 362425 12-Lead Plastic MSOP –40°C to 125°C
LTC3624IMSE-25#PBF LTC3624IMSE-25#TRPBF 362425 12-Lead Plastic MSOP –40°C to 125°C
LTC3624HMSE-25#PBF LTC3624HMSE-25#TRPBF 362425 12-Lead Plastic MSOP –40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
orDer inForMaTion
http://www.linear.com/product/LTC3624#orderinfo
LTC3624/LTC3624-2
4
36242fd
For more information www.linear.com/LTC3624
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C. (Note 2) VIN = 12V, unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3624/LTC3624-2 is tested under pulsed load conditions
such that TJ ≈ TA. The LTC3624E/LTC3624E-2 is guaranteed to meet
specifications from 0°C to 85°C junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3624I/LTC3624I-2 is guaranteed over the –40°C to 125°C
operating junction temperature range and the LTC3624H is guaranteed
over the –40°C to 150°C operating junction temperature range. High
junction temperatures degrade operating lifetimes; operation lifetime is
decreased for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors. TJ is calculated from the ambient, TA, and power dissipation, PD,
according to the following formula:
TJ = TA + (PD θJA)
Note 3: The quiescent current in forced continuous mode does not include
switching loss of the power FETs.
Note 4: The LTC3624 is tested in a proprietary test mode that servos FB to
the output of the error amplifier.
Note 5: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when overtemperature
protection is active Continuous operation above the specified maximum
operating junction temperature may impair device reliability. The
overtemperature protection level is not production tested but guaranteed
by design.
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VMODE/SYNC Pulse-Skipping Mode
Burst Mode Operation
Forced Continuous Mode
VINTVCC 0.4
1.0
0.3
VINTVCC 1.2
V
V
V
IMODE/SYNC MODE/SYNC Input Current 0 100 nA
tSS Internal Soft-Start Time 1 ms
ILIM Peak Current Limit VIN > 5V (E-, I-Grade)
VIN > 5V (H-Grade)
l
l
2.4
2.3
3 3.6 A
A
IFB FB Input Current 10 nA
IFB(VOUT) Feedback Input Leakage Current Fixed Output Versions 2 10 µA
VUVLO VINTVCC Undervoltage Lockout VIN Ramping Up 2.4 2.6 2.7 V
VUVLO(HYS) VINTVCC Undervoltage Lockout Hysteresis 175 mV
VOVLO VIN Overvoltage Lockout Rising l18 19 20 V
VOVLO(HYS) VIN Overvoltage Lockout Hysteresis 500 mV
fOSC Oscillator Frequency LTC3624/LTC3624-3.3/LTC3624-5
(E-, I-Grade)
(H-Grade)
l
l
0.92
0.82
0.78
1.00
1.08
1.16
MHz
MHz
MHz
LTC3624-2/LTC3624-23.3/LTC3624-25
(E-, I-Grade)
(H-Grade)
l
l
2.05
1.8
1.7
2.25
2.45
2.6
MHz
MHz
MHz
fSYNC SYNC Capture Range LTC3624/LTC3624-3.3/LTC3624-5 50 150 %
LTC3624-2/LTC3624-23.3/LTC3624-25 50 140 %
VINTVCC VINTVCC LDO Output Voltage VIN > 4V 3.2 3.6 4.0 V
ΔVPGOOD Power Good Range LTC3624/LTC3624-2 ±7.5 ±11.5 %
LTC3624-3.3/LTC3624-5/LTC3624-23.3/
LTC3624-25
±7.5 ±13 %
RPGOOD Power Good Resistance 280 350 Ω
tPGOOD PGOOD Delay PGOOD Low to High
PGOOD High to Low
0
32
Cycles
Cycles
LTC3624/LTC3624-2
5
36242fd
For more information www.linear.com/LTC3624
Typical perForMance characTerisTics
Burst Mode Operation
Pulse-Skipping Mode Operation Load Transient Response Soft-Start Operation
Efficiency vs Load Current in
Burst Mode Operation at 2.25MHz
IQ vs VIN IQ vs Temperature
Efficiency vs Load Current at 1MHz
Efficiency vs Load Current in
Dropout
TJ = 25°C, unless otherwise noted.
LOAD CURRENT (A)
EFFICIENCY (%)
36242 G01
100
80
70
90
60
50
30
20
10
40
0
0.0001 0.1 1 20.010.001
VOUT = 5V
VOUT = 3.3V
VOUT = 2.5V
VIN = 12V
Burst Mode OPERATION
LOAD CURRENT (A)
EFFICIENCY (%)
36242 G03
100
90
80
70
60
50
40
30
20
10
0
0.0001 0.001 1 20.10.01
Burst Mode
OPERATION
VIN = 5V
100% DUTY CYCLE
FREQ = 1MHz
FORCE CONTINUOUS
MODE
VIN (V)
0
IQ (µA)
7
6
8
10
9
16
36242 G04
5
4
2
1
3
02468 10 12 14 18 20
SLEEP
SHUTDOWN
TEMPERATURE (°C)
–50
IQ (µA)
6
10
8
12
100 150
36242 G05
4
2
0050
SHUTDOWN
SLEEP
VIN = 12V
VOUT = 2.5V
Burst Mode OPERATION
IOUT = 30mA
L = 2.2µH
4µs/DIV
SW
5V/DIV
36242 G06
VOUT
AC-COUPLED
50mV/DIV
IL
1A/DIV
VIN = 12V
VOUT = 2.5V
PULSE-SKIPPING MODE
IOUT = 10mA
L = 2.2µH
SW
5V/DIV
36242 G07
VOUT
AC-COUPLED
50mV/DIV
IL
1A/DIV
4µs/DIV
VIN = 12V
VOUT = 2.5V
ILOAD = 0A to 1.8A
FORCED CONTINUOUS MODE
VOUT
200mV/DIV
36242 G08
ILOAD
2A/DIV
IL
2A/DIV
40µs/DIV
VIN = 12V
VOUT = 2.5V
ILOAD = 1A
RUN
10V/DIV
36242 G09
IL
0.5A/DIV PGOOD
5V/DIV
VOUT
1V/DIV
1ms/DIV
LOAD CURRENT (A)
EFFICIENCY (%)
36242 G02
100
80
70
90
60
50
30
20
10
40
0
0.001 1 20.10.01
VOUT = 5V
VOUT = 3V
VOUT = 2.5V
VIN = 12V
Burst Mode OPERATION
LTC3624/LTC3624-2
6
36242fd
For more information www.linear.com/LTC3624
Typical perForMance characTerisTics
Efficiency vs Input Voltage
Oscillator Frequency
vs Temperature
RDS(ON) vs Temperature
Load Regulation Line Regulation VIN vs Peak Current Limit
Oscillator Frequency
vs Supply Voltage
Reference Voltage
vs Temperature RDS(ON) vs Input Voltage
TJ = 25°C, unless otherwise noted.
SUPPLY VOLTAGE (V)
2
OSCILLATOR FREQUENCY (MHz)
1.0
1.5
36242 G12
0.5
0712 17
2.0
VIN (V)
0
RDS(ON) (mΩ)
200
400
600
100
300
500
8 10 12
36242 G14
42 6 14 16
BOTTOM FET
TOP FET
LOAD CURRENT (A)
0
–0.80
–0.20
–0.40
–0.60
VOUT (%)
0.20
0.80
1.5
36242 G16
0
0.60
0.40
0.5 12
FORCED CONTINUOUS MODE
VIN (V)
2
–0.80
–0.20
–0.40
–0.60
∆VOUT (%)
0.20
0.80
1412
36242 G17
0
0.60
0.40
4 6 108 16
VIN (V)
0
EFFICIENCY (%)
60
80
100
15
36242 G10
40
20
50
70
90
30
10
0510 20
ILOAD = 10mA
ILOAD = 1A
VOUT = 5V
FREQ = 1MHz
Burst Mode OPERATION
LOW DROPOUT OPERATION
TEMPERATURE (°C)
–50
REFERENCE VOLTAGE
599.5
600.0
600.5
36242 G13
599.0
598.5
050 100 150
598.0
597.5
TEMPERATURE (°C)
50
0
100
RDS(ON) (mΩ)
300
600
050 75 100
36242 G15
200
500
400
25 25 150125
BOTTOM FET
TOP FET
VIN = 12V
VIN (V)
0
0
PEAK CURRENT LIMIT (A)
2
3
5
36242 G18
1
2 4 6 14 16 1812 20
8 10
4
150°C
25°C
TEMPERATURE (°C)
–50
OSCILLATOR FREQUENCY (MHz)
1.5
2.0
25 75
36242 G11
1.0
–25 0 50 100 150125
0.5
0
LTC3624/LTC3624-2
7
36242fd
For more information www.linear.com/LTC3624
pin FuncTions
SW (Pin 1/Pins 1, 2): Switch Node Connection to the
Inductor of the Step-Down Regulator.
VIN (Pin 2/Pins 3, 4): Input Voltage of the Step-Down
Regulator.
RUN (Pin 3/Pin 5): Logic Controlled RUN Input. Do not
leave this pin floating. Logic high activates the step-down
regulator.
PGOOD (Pin 4/Pin 6): VOUT within Regulation Indicator.
FB (Pin 5/Pin 8): Feedback Input to the Error Amplifier
of the Step-Down Regulator. Connect a resistor divider
tap to this pin. The output voltage can be adjusted from
0.6V to VIN by:
VOUT = 0.6V [1 + (R2/R1)]
See Figure 1.
For fixed VOUT options, connect the FB pin directly to VOUT.
INTVCC (Pin 6/Pin 9): Low Dropout Regulator. Bypass with
at least 2.2µF to Ground.
MODE/SYNC (Pin 7/Pin 10): Burst Mode Select and Ex-
ternal Clock Synchronization of the Step-Down Regulator.
Tie MODE/SYNC to INTVCC for Burst Mode operation with
a 800mA peak current clamp, tie MODE/SYNC to GND for
pulse skipping operation, and tie MODE/SYNC to a volt-
age between 1V and VINTVCC 1.2V for forced continuous
mode. Furthermore, connecting MODE/SYNC to an external
clock will sync the system clock to the external clock and
put the part in forced continuous mode.
GND (Pin 8, Exposed Pad Pin 9/Pins 11, 12, Exposed
Pad Pin 13): Power and Signal Ground. The exposed pad
must be soldered to PCB ground for electrical and rated
thermal performance.
NC (Pin 7, MSOP Only): No Connect. There is no electrical
connection to this pin inside the package.
(DFN/MSOP)
LTC3624/LTC3624-2
8
36242fd
For more information www.linear.com/LTC3624
block DiagraM
+
+
+
+
V
ERROR
AMPLIFIER
ITH
BURST
AMPLIFIER
MAIN
I-COMPARATOR
+
+
OVERCURRENT
COMPARATOR
REVERSE
CURRENT
COMPARATOR
0.6V
FB
MODE/SYNC
FIXED
VOUT
RUN
PGOOD
INTVCC
CLK
VIN – 5V SW
GND
36242 BD
VIN
INTVCC
OSCILLATOR
LDO BUCK
LOGIC
AND
GATE DRIVE
SLOPE
COMPENSATION
1ms
SOFT-START
LTC3624/LTC3624-2
9
36242fd
For more information www.linear.com/LTC3624
operaTion
The LTC3624/LTC3624-2 uses a constant-frequency, peak
current mode architecture. It operates through a wide VIN
range and regulates with ultralow quiescent current. The
operation frequency is set at either 1MHz or 2.25MHz and
can be synchronized to an external oscillator ±40% of the
inherent frequency. To suit a variety of applications, the
selectable MODE/SYNC pin allows the user to trade off
output ripple for efficiency.
The output voltage is set by an external divider returned to
the FB pin. An error amplifier compares the divided output
voltage with a reference voltage of 0.6V and adjusts the
peak inductor current accordingly. Overvoltage and un-
dervoltage comparators will pull the PGOOD output low if
the output voltage is not within ±7.5% of the programmed
value. The PGOOD output will go low 32 clock cycles after
falling out of regulation and will go high immediately after
achieving regulation.
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle.
The inductor current is allowed to ramp up to a peak level.
Once that level is reached, the top power switch is turned
off and the bottom switch (N-channel MOSFET) is turned
on until the next clock cycle. The peak current level is con-
trolled by the internally compensated ITH voltage, which is
the output of the error amplifier. This amplifier compares
the FB voltage to the 0.6V internal reference. When the
load current increases, the FB voltage decreases slightly
below the reference, which causes the error amplifier to
increase the ITH voltage until the average inductor current
matches the new load current.
The main control loop is shut down by pulling the RUN
pin to ground.
Low Current Operation
Two discontinuous-conduction modes (DCMs) are available
to control the operation of the LTC3624/LTC3624-2 at low
currents. Both modes, Burst Mode operation and pulse-
skipping, automatically switch from continuous operation
to the selected mode when the load current is low.
To optimize efficiency, Burst Mode operation can be selected
by tying the MODE/SYNC pin to INTVCC. In Burst Mode
operation, the peak inductor current is set to be at least
800mA, even if the output of the error amplifier demands
less. Thus, when the switcher is on at relatively light output
loads, FB voltage will rise and cause the ITH voltage to
drop. Once the ITH voltage goes below 0.2V, the switcher
goes into its sleep mode with both power switches off.
The switcher remains in this sleep state until the external
load pulls the output voltage below its regulation point.
During sleep mode, the part draws an ultralow 3.5µA of
quiescent current from VIN.
To minimize VOUT ripple, pulse-skipping mode can be se-
lected by grounding the MODE/SYNC pin. In the LTC3624/
LTC3624-2, pulse-skipping mode is implemented similarly
to Burst Mode operation with the peak inductor current
set to be at least 132mA. This results in lower ripple than
in Burst Mode operation with the trade-off being slightly
lower efficiency.
Forced Continuous Mode Operation
Aside from the two discontinuous-conduction modes, the
LTC3624/LTC3624-2 also has the ability to operate in the
forced continuous mode by setting the MODE/SYNC volt-
age between 1V and VINTVCC 1.2V. In forced continuous
mode, the switcher will switch cycle by cycle regardless
of what the output load current is. If forced continuous
mode is selected, the minimum peak current is set to
be –266mA in order to ensure that the part can operate
continuously at zero output load.
High Duty Cycle/Dropout Operation
When the input supply voltage decreases towards the
output voltage, the duty cycle increases and slope com-
pensation is required to maintain the fixed switching
frequency. The LTC3624/LTC3624-2 has internal circuitry
to accurately maintain the peak current limit (ILIM) of 3A
even at high duty cycles.
As the duty cycle approaches 100%, the LTC3624/
LTC3624-2 enters dropout operation. During dropout, if
force continuous mode is selected, the top PMOS switch
is turned on continuously, and all active circuitry is kept
LTC3624/LTC3624-2
10
36242fd
For more information www.linear.com/LTC3624
operaTion
alive. However, if Burst Mode operation or pulse-skipping
mode is selected, the part will transition in and out of
sleep mode depending on the output load current. This
significantly reduces the quiescent current, thus prolong-
ing the use of the input supply.
VIN Overvoltage Protection
In order to protect the internal power MOSFET devices
against transient voltage spikes, the LTC3624/LTC3624-2
constantly monitors the VIN pin for an overvoltage condi-
tion. When VIN rises above 19V, the regulator suspends
operation by shutting off both power MOSFETs. Once VIN
drops below 18.5V, the regulator immediately resumes
normal operation. The regulator executes its soft-start
function when exiting an overvoltage condition.
Minimum On-Time
The minimum on-time is the smallest duration of the time
the top power switch is allowed to be in its on state. This
time is typically 60ns. In forced continuous mode operation,
the minimum on-time limit imposes a minimum duty cycle
of 6% for the LTC3624 (FSW = 1MHz) and 13.5% for the
LTC3624-2 (FSW = 2.25MHz). In the rare cases that this
minimum on-time is violated, the output voltage may lose
regulation. In such situation, the user must choose either
Burst Mode or pulse-skipping mode operation, or apply a
slower external clock to force a slower switching frequency
in order to adhere to the minimum on-time limitation.
Low Supply Operation
The LTC3624 incorporates an undervoltage lockout circuit
which shuts down the part when the input voltage drops
below 2.7V. As the input voltage rises slightly above the
undervoltage threshold, the switcher will begin its basic
operation. However, the RDS(ON) of the top and bottom
switch will be slightly higher than that specified in the
electrical characteristics due to lack of gate drive. Refer
to graph of RDS(ON) versus VIN for more details.
Soft-Start
The LTC3624/LTC3624-2 has an internal 1ms soft-start
ramp. During start-up soft-start operation, the switcher
will operate in pulse-skipping mode.
applicaTions inForMaTion
Output Voltage Programming
The output voltage is set by external resistive divider ac-
cording to the following equation for adjustable output
versions:
VOUT = 0.6V 1+ R2
R1
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
For fixed VOUT options, connect FB pin directly to VOUT.
Input Capacitor (CIN) Selection
The input capacitance, CIN, is needed to filter the square
wave current at the drain of the top power MOSFET. To
Figure 1. Setting the Output Voltage (Adjustable Version)
Figure 2. Setting the Output Voltage (Fixed VOUT Option)
VOUT
R2
R1
36242 F01
CFF
LTC3624
SGND
FB
V
OUT
36242 F02
LTC3624
(FIXED VOUT)
SGND
FB
LTC3624/LTC3624-2
11
36242fd
For more information www.linear.com/LTC3624
applicaTions inForMaTion
special polymer, aluminum electrolytic, and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors are very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteristics
and small footprints.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
VIN input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at VIN large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage char-
acteristics of all the ceramics for a given value and size.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. Typically, five cycles are required to
respond to a load step, but only in the first cycle does the
output voltage drop linearly. The output droop, VDROOP, is
prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum RMS current
should be used. The maximum RMS current is given by:
IRMS IOUT(MAX)
VOUT
VIN
VIN
VOUT
1
This formula has a maximum at VIN = 2VOUT, where:
IRMS
I
OUT
2
This simple worst-case condition is commonly used for
design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based on only 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design. For low input
voltage applications, sufficient bulk input capacitance is
needed to minimize transient effects during output load
changes.
Output Capacitor (COUT) Selection
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, VOUT, is
determined by:
∆VOUT < ∆IL
1
8fCOUT
+ESR
The output ripple is highest at maximum input voltage
since IL increases with input voltage. Multiple capaci-
tors placed in parallel may be needed to meet the ESR
and RMS current handling requirements. Dry tantalum,
LTC3624/LTC3624-2
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For more information www.linear.com/LTC3624
applicaTions inForMaTion
usually about three times the linear drop of the first cycle.
Thus, a good place to start with the output capacitor value
is approximately:
COUT =3
ΔI
OUT
fV
DROOP
More capacitance may be required depending on the duty
cycle and load-step requirements. In most applications,
the input capacitor is merely required to supply high
frequency bypassing, since the impedance to the supply
is very low. A 10μF ceramic capacitor is usually enough
for these conditions. Place this input capacitor as close
to the VIN pin as possible.
Output Power Good
When the LTC3624/LTC3624-2’s output voltage is within
the ±7.5% window of the regulation point, the output
voltage is good and the PGOOD pin is pulled high with
an external resistor. Otherwise, an internal open-drain
pull-down device (280Ω) will pull the PGOOD pin low. To
prevent unwanted PGOOD glitches during transients or
dynamic VOUT changes, the LTC3624/LTC3624-2s PGOOD
falling edge includes a blanking delay of approximately 32
switching cycles.
Frequency Sync Capability
The LTC3624/LTC3624-2 has the capability to sync to
a ±40% range of the internal programmed frequency. It
takes 2 to 3 cycles of external clock to engage the sync
mode, and roughly 2µs of no clocks for the part to realize
that the sync signal is gone. Once engaged in sync, the
LTC3624/LTC3624-2 immediately runs at the external
clock frequency.
Inductor Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple current:
IL=VOUT
fL1 VOUT
VIN(MAX)
Lower ripple current reduces power losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a trade-off between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of IOUT(MAX). To guarantee that ripple
current does not exceed a specified maximum, the induc-
tance should be chosen according to:
L = VOUT
fIL(MAX)
1 VOUT
VIN(MAX)
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductance selected. As the inductance or frequency in-
creases, core losses decrease. Unfortunately, increased
inductance requires more turns of wire and therefore
copper losses will increase.
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. New designs for
surface mount inductors are available from Toko, Vishay,
Coilcraft, NEC/Tokin, Cooper, TDK and Würth Elektronik.
Refer to Table 1 for more details.
LTC3624/LTC3624-2
13
36242fd
For more information www.linear.com/LTC3624
applicaTions inForMaTion
Checking Transient Response
The regular loop response can be checked by looking at the
load transient response. Switching regulators take several
cycles to respond to a step in load current. When a load step
occurs, VOUT immediately shifts by an amount equal to the
ILOAD ESR, where ESR is the effective series resistance
of COUT. ILOAD also begins to charge or discharge COUT
generating a feedback error signal used by the regulator to
return VOUT to its steady-state value. During this recovery
time, VOUT can be monitored for overshoot or ringing that
would indicate a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine
phase margin. In addition, a feedforward capacitor can
be added to improve the high frequency response, as
Table 1. Inductor Selection Table
INDUCTOR
INDUCTANCE
(µH)
DCR
(mΩ)
MAX CURRENT
(A)
DIMENSIONS
(mm)
HEIGHT
(mm) MANUFACTURER
XAL4020 Series 1.0
1.5
2.2
13.25
21.45
35.20
8.7
7.1
5.6
4.3 × 4.3
4.3 × 4.3
4.3 × 4.3
2.1
2.1
2.1
Coilcraft
www.coilcraft.com
XAL4030 Series 3.3
4.7
6.8
26.0
40.1
67.4
5.5
4.5
3.6
4.3 × 4.3
4.3 × 4.3
4.3 × 4.3
3.1
3.1
3.1
IHLP-1616BZ-11 Series 1.0
2.2
24
61
4.5
3.25
4.3 × 4.7
4.3 × 4.7
2
2
Vishay
www.vishay.com
IHLP-2020BZ-01 Series 1
2.2
3.3
4.7
5.6
6.8
18.9
45.6
79.2
108
113
139
7
4.2
3.3
2.8
2.5
2.4
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
2
2
2
2
2
2
FDV0620 Series 1
2.2
3.3
4.7
18
37
51
68
5.7
4
3.2
2.8
6.7 × 7.4
6.7 × 7.4
6.7 × 7.4
6.7 × 7.4
2
2
2
2
Toko
www.toko.com
MPLC0525L Series 1
1.5
2.2
16
24
40
6.4
5.2
4.1
6.2 × 5.4
6.2 × 5.4
6.2 × 5.4
2.5
2.5
2.5
NEC/Tokin
www.nec-tokin.com
HCP0703 Series 1
1.5
2.2
3.3
4.7
6.8
8.2
9
14
18
28
37
54
64
11
9
8
6
5.5
4.5
4
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
3
3
3
3
3
3
3
Cooper Bussmann
www.cooperbussmann.com
RLF7030 Series 1
1.5
2.2
3.3
4.7
6.8
8.8
9.6
12
20
31
45
6.4
6.1
5.4
4.1
3.4
2.8
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
3.2
3.2
3.2
3.2
3.2
3.2
TDK
www.tdk.com
WE-TPC 4828 Series 1.2
1.8
2.2
2.7
3.3
17
20
23
27
30
3.1
2.7
2.5
2.35
2.15
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
2.8
2.8
2.8
2.8
2.8
Würth Elektronik
www.we-online.com
LTC3624/LTC3624-2
14
36242fd
For more information www.linear.com/LTC3624
applicaTions inForMaTion
shown in Figure 1. Capacitor CFF provides phase lead by
creating a high frequency zero with R2, which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to application Note 76.
In some applications, a more severe transient can be caused
by switching in loads with large (>1µF) input capacitors.
The discharge input capacitors are effectively put in paral-
lel with COUT, causing a rapid drop in VOUT. No regulator
can deliver enough current to prevent this problem if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates
current limiting, short-circuit protection and soft-starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 +…)
where L1, L2, etc. are the individual losses as a percent-
age of input power. Although all dissipative elements in
the circuit produce losses, three main sources usually
account for most of the losses in LTC3624/LTC3624-2
circuits: 1) I2R losses, 2) switching and biasing losses,
3) other losses.
1. I2R losses are calculated from the DC resistances of
the internal switches, RSW, and external inductor, RL.
In continuous mode, the average output current flows
through inductor L but is chopped between the
internal top and bottom power MOSFETs. Thus, the
series resistance looking into the SW pin is a function
of both top and bottom MOSFET RDS(ON) and the duty
cycle (DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus to obtain I2R losses:
I2R losses = IOUT2(RSW + RL)
2. The switching current is the sum of the MOSFET driver
and control currents. The power MOSFET driver current
results from switching the gate capacitance of the power
MOSFETs. Each time a power MOSFET gate is switched
from low to high to low again, a packet of charge dQ
moves from IN to ground. The resulting dQ/dt is a cur-
rent out of IN that is typically much larger than the DC
control bias current. In continuous mode, IGATECHG =
f(QT + QB), where QT and QB are the gate charges of
the internal top and bottom power MOSFETs and f is
the switching frequency. The power loss is thus:
Switching Loss = IGATECHG VIN
The gate charge loss is proportional to VIN and f and
thus their effects will be more pronounced at higher
supply voltages and higher frequencies.
3. Other “hidden” losses such as transition loss and cop-
per trace and internal load resistances can account for
additional efficiency degradations in the overall power
system. It is very important to include these “system”
level losses in the design of a system. Transition loss
arises from the brief amount of time the top power
MOSFET spends in the saturated region during switch
node transitions. The LTC3624/LTC3624-2 internal
power devices switch quickly enough that these losses
are not significant compared to other sources. These
losses plus other losses, including diode conduction
losses during dead-time and inductor core losses,
generally account for less than 2% total additional loss.
Thermal Conditions
In a majority of applications, the LTC3624/LTC3624-2
does not dissipate much heat due to its high efficiency and
low thermal resistance of its exposed pad DFN package.
However, in applications where the LTC3624/LTC3624-2
is running at high ambient temperature, high VIN, high
switching frequency, and maximum output current load,
LTC3624/LTC3624-2
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the heat dissipated may exceed the maximum junction
temperature of the part. If the junction temperature reaches
approximately 160°C, both power switches will be turned
off until the temperature drops about 15°C cooler.
To avoid the LTC3624/LTC3624-2 from exceeding the
maximum junction temperature, the user will need to do
some thermal analysis. The goal of the thermal analysis
is to determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
TRISE = PD θJA
As an example, consider the case when the LTC3624/
LTC3624-2 is used in applications where VIN = 12V, IOUT = 2A,
f = 1MHz, VOUT = 1.8V. The equivalent power MOSFET
resistance RSW is:
RSW =RDS(ON)TOP VOUT
VIN
+ RDS( NO )BOT 1VOUT
VIN
=200mΩ1.8V
12V +100mΩ 1 1.8V
12V
=115mΩ
The VIN current during 1MHz force continuous operation
with no load is about 8mA, which includes switching and
internal biasing current loss, transition loss, inductor core
loss and other losses in the application. Therefore, the
total power dissipated by the part is:
PD = IOUT2 RSW + VIN IIN(Q)
= 2A2 115mΩ + 12V 8mA
= 556mW
The DFN 3mm × 3mm package junction-to-ambient thermal
resistance, θJA, is around 43°C/W. Therefore, the junction
temperature of the regulator operating in a 25°C ambient
temperature is approximately:
TJ = TA + Trise = 25°C + 0.556W 43°C/W = 49°C
Remembering that the above junction temperature is
obtained from an RDS(ON) at 25°C, we might recalculate
the junction temperature based on a higher RDS(ON) since
it increases with temperature. Redoing the calculation
assuming that RSW increased 5% at 49°C yields a new
junction temperature of 50°C. If the application calls for
a higher ambient temperature and/or higher switching
frequency, care should be taken to reduce the temperature
rise of the part by using a heat sink or forced air flow.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3624/LTC3624-2 (refer to Figure 3). Check the
following in your layout:
1. Do the capacitors CIN connect to the VIN and GND as
close as possible? These capacitors provide the AC
current to the internal power MOSFETs and their drivers.
2. Are COUT and L closely connected? The (–) plate of
COUT returns current to GND and the (–) plate of CIN.
3. The resistive divider, R1 and R2, must be connected
between the (+) plate of COUT and a ground line ter-
minated near GND. The feedback signal VFB should be
routed away from noisy components and traces, such
as the SW line, and its trace length should be minimized.
Keep R1 and R2 close to the IC.
4. Solder the exposed pad (Pin 9) on the bottom of the
package to the GND plane. Connect this GND plane to
other layers with thermal vias to help dissipate heat
from the LTC3624/LTC3624-2.
5. Keep sensitive components away from the SW pin. The
input capacitor, CIN, feedback resistors, and INTVCC
bypass capacitors should be routed away from the SW
trace and the inductor.
6. A ground plane is preferred.
7. Flood all unused areas on all layers with copper, which
reduces the temperature rise of power components.
These copper areas should be connected to GND.
applicaTions inForMaTion
LTC3624/LTC3624-2
16
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For more information www.linear.com/LTC3624
Design Example
As a design example, consider using the LTC3624/LTC3624-2
in an application with the following specifications:
VIN = 10.8V to 13.2V
VOUT = 3.3V
IOUT(MAX) = 2A
IOUT(MIN) = 0A
fSW = 2.25MHz
Because efficiency and quiescent current are important at
both 500mA and 0A current states, Burst Mode operation
will be utilized.
Given the internal oscillator of 2.25MHz, we can calcu-
late the inductor value for about 40% ripple current at
maximum VIN:
L = 3.3V
2.25MHz 0.8A
1– 3.3V
13.2V
=1.38µH
Given this, a 1.5µH inductor would suffice.
COUT will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, a
47µF ceramic capacitor will be used.
CIN should be sized for a maximum current rating of:
IRMS = 2A 3.3V
13.2V
13.2V
3.3V 1
1/2
=0.86A
Bypassing the VIN pin to ground with 10µF ceramic capaci-
tors is adequate for most applications.
applicaTions inForMaTion
Figure 3a. Sample PCB Layout-Top Side Figure 3b. Sample PCB Layout-Bottom Side
TOP LAYER
GND
GND
36242 F03a
GND
CIN
CIN
VIN
VOUT
COUT
C_INTVCC
L1
LTC3624
BOTTOM LAYER
GND
36242 F03b
GND
GND
CIN
VIN
VOUT
COUT
(OPT)
COUT
(OPT)
LTC3624/LTC3624-2
17
36242fd
For more information www.linear.com/LTC3624
package DescripTion
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
14
85
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD8) DFN 0509 REV C
0.25 ±0.05
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
1.65 ±0.05
(2 SIDES)2.10 ±0.05
0.50
BSC
0.70 ±0.05
3.5 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
Please refer to http://www.linear.com/product/LTC3624#packaging for the most recent package drawings.
LTC3624/LTC3624-2
18
36242fd
For more information www.linear.com/LTC3624
package DescripTion
MSOP (MSE12) 0213 REV G
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.22 –0.38
(.009 – .015)
TYP
0.86
(.034)
REF
0.650
(.0256)
BSC
12
12 11 10 9 8 7
7
DETAIL “B”
16
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
RECOMMENDED SOLDER PAD LAYOUT
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
0.1016 ±0.0508
(.004 ±.002)
1 2 3 4 5 6
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.406 ±0.076
(.016 ±.003)
REF
4.90 ±0.152
(.193 ±.006)
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.12 REF
0.35
REF
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
0.42 ±0.038
(.0165
±.0015)
TYP
0.65
(.0256)
BSC
MSE Package
12-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1666 Rev G)
Please refer to http://www.linear.com/product/LTC3624#packaging for the most recent package drawings.
LTC3624/LTC3624-2
19
36242fd
For more information www.linear.com/LTC3624
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 04/14 Added fixed output options.
Clarified Ordering Information.
Clarified Electrical Specifications.
Clarified Pin Functions.
1
2
3, 4
7
B 08/14 Clarified Typical Application
Clarified Pin Functions
Clarified VFB and VOUT in Electrical Specifications
Clarified Note 4
Clarified Applications Information and Figure 1
Figure 2 is now Figure 3
Bottom Typical Application clarified
1
2
3
4
10
14, 15
18
C 06/15 Added MSOP package options and H-grade options
Added H-grade electrical parameters and 150°C to Note 2
Updated IQ vs Temperature graph to 150°C
Updated Oscillator Frequency and VREF graphs vs temperature to 150˚C
Updated Pin Functions for MSOP package versions
Added MSOP Package Description and drawing
2, 3
4
5
6
7
18
D 04/16 Corrected a typographical error 1
LTC3624/LTC3624-2
20
36242fd
For more information www.linear.com/LTC3624
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
LINEAR TECHNOLOGY CORPORATION 2014
LT 0416 REV D • PRINTED IN USA
(408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTC3624
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LTC3621 17V, 1A, 2.25MHz/1MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 2.7V to 17V, VOUT(MIN) = 0.6V, IQ = 3.5µA, ISD < 1µA,
2mm × 3mm DFN-6, MSOP-8E Packages
LTC3600 15V, 1.5A, 4MHz Synchronous Rail-to-Rail Single
Resistor Step-Down Regulator
95% Efficiency, VIN: 4V to 15V, VOUT(MIN) = 0V, IQ = 700µA, ISD < 1µA,
3mm × 3mm DFN-12, MSOP-12E Packages
LTC3601 15V, 1.5A (IOUT) 4MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 3.6V to 15V, VOUT(MIN) = 0.6V, IQ = 300µA, ISD < 14µA,
3mm × 3mm QFN-16, MSOP-16E Packages
LTC3603 15V, 2.5A (IOUT) 3MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 75µA, ISD < 1µA,
4mm × 4mm QFN-20, MSOP-16E Packages
LTC3633/LTC3633A 15V/20V, Dual 3A (IOUT) 4MHz Synchronous
Step-Down DC/DC Converter
95% Efficiency, VIN: 3.6V to 15V/20V, VOUT(MIN) = 0.6V, IQ = 500µA,
ISD < 15µA, 4mm × 5mm QFN-28, TSSOP-28E Packages
LTC3605/LTC3605A 15V/20V, 5A (IOUT) 4MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 4V to 15V/20V, VOUT(MIN) = 0.6V, IQ = 2mA, ISD < 15µA,
4mm × 4mm QFN-24 Package
LTC3604 15V, 2.5A (IOUT) 4MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 3.6V to 15V, VOUT(MIN) = 0.6V, IQ = 300µA, ISD < 14µA,
3mm × 3mm QFN-16, MSOP-16E Packages
4.2VOUT, 1MHz, Burst Mode Operation
1.2VOUT, Synced to 500kHz, Forced Continuous Mode
12V Step-Down with 2A Output Current Limit, 2.25MHz
32.4k
15pF
2.2µF
COUT
47µF
36242 TA04
L1
1.5µH
L1: COILCRAFT XAL4020-152ME
VOUT
12V
619k
VIN
RUN
SW
VIN
13V TO 17V
LTC3624-2
GND
FB
MODE/SYNC
INTVCC
CIN
10µF
100k
22pF
2.2µF
COUT
47µF
36242 TA02
L1
2.2µH
L1: COILCRAFT XAL4020 -222ME
VOUT
4.2V
2A MAX
604k
VIN
RUN
SW
VIN
5V TO 17V
LTC3624
GND
FB
MODE/SYNC
INTVCC
CIN
10µF
22pF
2.2µF
COUT
47µF
36242 TA03
L1
2.2µH
604k
500kHz CLK
VIN
RUN
SW
LTC3624
GND
FB
MODE/SYNC
INTVCC
CIN
10µF
VIN
2.7V TO 17V
VOUT
1.2V
2A MAX
604k
L1: COILCRAFT XAL4020 -222ME