SN54LVC04A, SN74LVC04A
HEX INVERTERS
SCAS281J – JANUARY 1993 – REVISED MARCH 2002
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description
The SN54LVC04A hex inverter contains six
independent inverters designed for 2.7-V to 3.6-V
VCC operation, and the SN74LVC04A hex inverter
contains six independent inverters designed for
1.65-V to 3.6-V VCC operation.
The ’LVC04A devices perform the Boolean
function Y = A.
Inputs can be driven from either 3.3-V or 5-V
devices. This feature allows the use of these
devices as translators in a mixed 3.3-V/5-V
system environment.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
SOIC D
Tube SN74LVC04AD
LVC04A
SOIC
–
D
Tape and reel SN74LVC04ADR
LVC04A
–40°C to 85°CSOP – NS Tape and reel SN74LVC04ANSR LVC04A
SSOP – DB Tape and reel SN74LVC04ADBR LC04A
TSSOP – PW Tape and reel SN74LVC04APWR LC04A
CDIP – J Tube SNJ54LVC04AJ SNJ54LVC04AJ
–55°C to 125°CCFP – W Tube SNJ54LVC04AW SNJ54LVC04AW
LCCC – FK Tube SNJ54LVC04AFK SNJ54LVC04AFK
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
AOUTPUT
Y
H L
L H
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
SN54LVC04A ...J OR W PACKAGE
SN74LVC04A . . . D, DB, NS, OR PW PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
1Y
1A
NC
4Y
4A V
6A
3Y
GND
NC
SN54LVC04A . . . FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54LVC04A, SN74LVC04A
HEX INVERTERS
SCAS281J – JANUARY 1993 – REVISED MARCH 2002
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram, each inverter (positive logic)
AY
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 3): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
SN54LVC04A SN74LVC04A
UNIT
MIN MAX MIN MAX
UNIT
VCC
Su
pp
ly voltage
Operating 2 3.6 1.65 3.6
V
V
CC
Supply
voltage
Data retention only 1.5 1.5
V
VCC = 1.65 V to 1.95 V 0.65 ×VCC
VIH High-level input voltage VCC = 2.3 V to 2.7 V 1.7 V
VCC = 2.7 V to 3.6 V 2 2
VCC = 1.65 V to 1.95 V 0.35 ×VCC
VIL Low-level input voltage VCC = 2.3 V to 2.7 V 0.7 V
VCC = 2.7 V to 3.6 V 0.8 0.8
VIInput voltage 0 5.5 0 5.5 V
VOOutput voltage 0 VCC 0 VCC V
VCC = 1.65 V –4
IOH
High level out
p
ut current
VCC = 2.3 V –8
mA
I
OH
High
-
level
output
current
VCC = 2.7 V –12 –12
mA
VCC = 3 V –24 –24
VCC = 1.65 V 4
IOL
Low level out
p
ut current
VCC = 2.3 V 8
mA
I
OL
Low
-
level
output
current
VCC = 2.7 V 12 12
mA
VCC = 3 V 24 24
TAOperating free-air temperature –55 125 –40 85 °C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN54LVC04A, SN74LVC04A
HEX INVERTERS
SCAS281J – JANUARY 1993 – REVISED MARCH 2002
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
SN54LVC04A SN74LVC04A
UNIT
PARAMETER
TEST
CONDITIONS
V
CC MIN TYP†MAX MIN TYP†MAX
UNIT
IOH = 100 µA
1.65 V to 3.6 V VCC–0.2
I
OH = –
100
µ
A
2.7 V to 3.6 V VCC–0.2
IOH = –4 mA 1.65 V 1.2
VOH IOH = –8 mA 2.3 V 1.7 V
IOH = 12 mA
2.7 V 2.2 2.2
I
OH = –
12
mA
3 V 2.4 2.4
IOH = –24 mA 3 V 2.2 2.2
IOL = 100 µA
1.65 V to 3.6 V 0.2
I
OL =
100
µ
A
2.7 V to 3.6 V 0.2
VOL
IOL = 4 mA 1.65 V 0.45
V
V
OL IOL = 8 mA 2.3 V 0.7
V
IOL = 12 mA 2.7 V 0.4 0.4
IOL = 24 mA 3 V 0.55 0.55
IIVI = 5.5 V or GND 3.6 V ±5±5µA
ICC VI = VCC or GND, IO = 0 3.6 V 10 10 µA
∆ICC One input at VCC – 0.6 V,
Other inputs at VCC or GND 2.7 V to 3.6 V 500 500 µA
CiVI = VCC or GND 3.3 V 5 5 pF
†All typical values are at VCC = 3.3 V, TA = 25°C.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
SN54LVC04A
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCC = 2.7 V VCC = 3.3 V
± 0.3 V UNIT
MIN MAX MIN MAX
tpd A Y 5.5 0.5 4.5 ns
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
SN74LVC04A
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCC = 1.8 V VCC = 2.5 V
± 0.2 V VCC = 2.7 V VCC = 3.3 V
± 0.3 V UNIT
TYP MIN MAX MIN MAX MIN MAX
tpd A Y 13.5 1 7.5 5.5 1 4.5 ns
tsk(o) 1 ns
operating characteristics, TA = 25°C
TEST VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V
UNIT
CONDITIONS TYP TYP TYP
UNIT
Cpd Power dissipation capacitance per inverter f = 10 MHz 6 7 8 pF
SN54LVC04A, SN74LVC04A
HEX INVERTERS
SCAS281J – JANUARY 1993 – REVISED MARCH 2002
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VM
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1 VLOAD
Open
GND
RL
RL
Data Input
Timing Input VI
0 V
VI
0 V
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VI
0 V
Input
Output
W aveform 1
S1 at VLOAD
(see Note B)
Output
W aveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VLOAD/2
0 V
VOL + V∆
VOH – V∆≈0 V
VI
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VMVM
VMVM
VMVM
VM
VMVM
VM
VM
VM
VI
VM
VM
1.8 V ±0.15 V
2.5 V ±0.2 V
2.7 V
3.3 V ±0.3 V
1 kΩ
500 Ω
500 Ω
500 Ω
VCC RL
2 × VCC
2 × VCC
6 V
6 V
VLOAD CL
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V∆
VCC
VCC
2.7 V
2.7 V
VI
VCC/2
VCC/2
1.5 V
1.5 V
VM
tr/tf
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
INPUTS
Figure 1. Load Circuit and Voltage Waveforms
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