FDC640PD87Z - Fairchild Semiconductor Corporation

Januar y 2001

2001 Fairc hild S emi c onduc tor International FDC640P Rev E(W)

FDC640P

P-Channel 2.5V PowerTrench



 Specified MOSFET

General Description

This P-Channel 2.5V specif ied MOSFET uses a rugged

gate version of Fairchild’s advanced PowerTrench

process. It has been optimized for power management

applications with a wide range of gate drive voltage

(2.5V – 12V).

Applications

• Battery management

• Load switch

• Battery protection

Features

• –4.5 A, –20 V RDS(ON) = 0.053 Ω @ VGS = –4.5 V

RDS(ON) = 0.080 Ω @ VGS = –2.5 V

• Rugged gate rating (±12V)

• Fast switching speed

• High performanc e trenc h technology for extremely

low RDS(ON)

SuperSOT -6

Absolute Maximum Ratings TA=25oC unless otherwise noted

Symbol Parameter Ratings Units

VDSS Drain-Sourc e V oltage –20 V

VGSS Gate-Source Voltage ±12 V

IDDrain Current – Continuous (Note 1a) –4.5 A

– Pulsed –20

Maximum Power Dissipation (Note 1a) 1.6 WPD

(Note 1b) 0.8

TJ, TSTG Operating and Storage Junction Temperature Range –55 to +150 °C

Thermal Characteristics

RθJA Thermal Resistance, Junction-to-Am bient (Note 1a) 78 °C/W

RθJC Thermal Resistance, Junction-to-Cas e (Note 1) 30 °C/W

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

.640 FDC640P 7’’ 8mm 3000 units

FDC640P

FDC640P Rev E(W)

Electrical Characteristics TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BVDSS Drain–Source B reakdown Volt age VGS = 0 V, ID = –250 µA–20 V

∆BVDSS

∆TJ

Breakdown Voltage Temperature

Coefficient ID = –250 µA, Referenced to 25°C–14 mV/°C

IDSS Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1 µA

IGSSF Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA

IGSSR Gate–Body Leak age, Reverse VGS = –12 V, VDS = 0 V –100 nA

On Characteristics (Note 2)

VGS(th) Gate Threshold Voltage VDS = VGS, ID = –250 µA–0.6 –1.0 –1.5 V

∆VGS(th)

∆TJ

Gate Threshold Voltage

Temperature Coeffic i ent ID = –250 µA, Referenced to 25°C3mV/°C

RDS(on) Static Drain–S ource

On–Resistance VGS = –4.5 V, ID = –4.5 A

VGS = –2.5 V, ID = –3.6 A

VGS = –4.5 V, ID = –4.5A,TJ=125°C

0.039

0.062

0.053

0.080

0.077

Ω

ID(on) On–Stat e Drain Current VGS = –4.5 V, VDS = –5 V –20 A

gFS Forward Transconductance VDS = –5 V, ID = –4.5 A 16 S

Dynam ic Ch ara cteristics

Ciss Input Capacitance 890 pF

Coss Output Capacitance 244 pF

Crss Reverse Transfer Capaci t ance

VDS = –10 V, V GS = 0 V,

f = 1.0 MHz 123 pF

Switching Characteristics (Note 2)

td(on) Turn–On Delay Time 12 22 ns

trTurn–On Rise Time 9 18 ns

td(off) Turn–Of f Delay Time 24 38 ns

tfTurn–Off Fall Time

VDD = –10 V, ID = –1 A,

VGS = –4.5 V, RGEN = 6 Ω

13 23 ns

QgTotal Gate Charge 9 13 nC

Qgs Gate–Source Charge 2 nC

Qgd Gate–Drain Charge

VDS = –10 V, ID = –4.5 A,

VGS = –4.5 V

3nC

Drain–Source Diode Characteristics and Maximum Ratings

ISMaximum Continuous Drai n–S ource Diode Forward Current –1.3 A

VSD Drain–Source Di ode Forward

Voltage VGS = 0 V, IS = –1.3 A (Note 2) –0.7 –1.2 V

Notes:

1. RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain

pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.

a. 78°C/W when mounted on a 1in2 pad of 2oz copper on FR-4 board.

b. 156°C/W when mounted on a minimum pad.

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%

FDC640P

FDC640P Rev E(W)

Typical Characteristics

00.511.522.5

-VDS, DRAIN -S O URCE VO LTAGE (V)

-I

, DRAIN CURRENT (A)

-3.0V -2.5V

-2.0V

VGS = -4.5V

-3.5V

0.5

1.5

2.5

03691215

-ID, DRAIN CURRE NT (A)

DS(ON)

, NORMALIZED

DRAIN-SOURCE ON-RESISTANCE

VGS = -2.0V

-3.5V

-3.0V -4.0V -4.5V

-2.5V

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

0.7

0.8

0.9

1.1

1.2

1.3

1.4

1.5

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

DS(ON)

, NORMALIZED

DRAIN-SOURCE ON-RESISTANCE

ID = -4.5 A

VGS = -4.5 V

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

1.522.533.544.55

-VGS, GATE TO SOURCE VOLTAGE (V)

DS(ON)

, ON-RESISTANCE (OHM)

ID = -2.25 A

TA = 125oC

TA = 25oC

Figure 3. On-Resistance Variation with

Temperature. Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

0.511.522.53

-VGS, GATE TO SOURCE VOLTAGE (V)

-I

, DRAIN CURRENT (A)

TA = -55oC

125oC

VDS = -5V 25oC

0.0001

0.001

0.01

0.1

0 0.2 0.4 0.6 0.8 1 1.2

-VSD, BODY DIO DE FORWARD V O LTAGE (V)

-I

, REVERSE DRAIN CURRENT (A

)

TA = 125oC

25oC

-55oC

VGS = 0V

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDC640P

FDC640P Rev E(W)

Typical Characteristics

024681012

Qg, GATE CHARGE (nC)

-V

, GATE-SOURCE VOLTAGE (V)

ID = -4.5A VDS = -5V

-15V

-10V

200

400

600

800

1000

1200

0 5 10 15 20

-VDS, DRAIN TO SOURCE VOLTAGE (V)

CAPACITANCE (pF)

CISS

CRSS

COSS

f = 1MHz

VGS = 0 V

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

0.01

0.1

100

0.1 1 10 100

-VDS, DRAIN-SOUR CE V O LTAGE (V)

-I

, DRAIN CURRENT (A)

10s1s

100ms

100

RDS(ON) LIMIT

VGS = -4.5V

SINGLE PULSE

RθJA = 156oC/W

TA = 25oC

10ms1ms

0.1 1 10 100 1000

t1, TIME (sec)

P(pk), PEAK TRANSIENT POWER (W)

SINGLE PULSE

RθJA = 156°C/W

TA = 25°C

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

0.001

0.01

0.1

0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

r(t), NORMAL IZED EFF ECTIVE

TRANSIENT THERMAL RESISTANCE

RθJA(t) = r(t) + RθJA

RθJA = 156°C/W

TJ - TA = P * RθJA(t)

Duty Cycle, D = t1 / t2

)

t1t2

SINGLE PULSE

0.01

0.02

0.05

0.1

0.2

D = 0.5

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1b

Transient thermal response will change depending on the circuit board design.

FDC640P

Embossed

Carrier Tape

SSOT-6 Packaging

Configuration: Fi

ure 1.0

Component s Leader Tape

500mm minimum or

125 empt

pockets

Trailer Tape

300mm minimum or

75 empt

pockets

SSOT-6 Tape Leader and Trailer

Configuration: Fi

ure 2.0

Cover Tape

Carrier Tape

Note/Comments

Packaging Option

SSOT-6 Packaging Information

Standard

(no flow c ode) D87Z

Packaging type

Reel Size

TNR

7" Dia

TNR

13"

Qty per Reel/Tube/Bag 3,000 10,000

Box Dimension (mm) 184x187x47 343x343x64

Max qty per Box 9,000 30,000

Weight per unit (gm) 0.0158 0.0158

Weight per Reel (kg) 0.1440 0.4700

F63TNR

Label

Customize Label

Antistatic Cover Tape

184mm x 187mm x 47mm

Pizza Box for Standard Option

F63TNR

Label

F63TNR Label

F63TNR Label sample

343mm x 342mm x 64mm

Int ermed ia te box for D87Z Opt i on

F63TNR

Label

SSOT-6 Unit Orientation

631

631631

631 631

Pi n 1

LOT: CBVK741B0 19

FSID: FDC633N

D/C1: D9842 QTY1: SPEC REV:

SPEC:

QTY: 3000

D/C2: QTY2: CPN: N/F: F (F63TNR)3

Packaging Description:

SSOT-6 parts are shipped in tape. The carrier tape is

made from a dissipative (carbon filled) polycarbonate

resin. The cover tape is a multilayer film (Heat Activated

Adhesive in nature) primarily composed of polyester film,

adhesive layer, sealant, and anti-static sprayed agent.

These reeled parts in standard option are shipped with

3,0 00 uni ts p er 7" or 17 7cm di amet er re el. The re els are

dark blue in color and is made of polystyrene plastic (anti-

static coated). Other option comes in 10,000 units per 13"

or 330 cm diam eter r eel. T his a nd some othe r opti ons ar e

described in the Packaging Information table.

These full reels are individually barcode labeled and

placed in s ide a piz za box (ill ustr ated in f igur e 1.0) made of

recyclable corrugated brown paper with a Fairchild logo

printing. One pizza box contains three reels maximum.

And these pizza boxes are placed inside a barcode

labeled shipping box which comes in different sizes

depending on the number of parts shipped.

SuperSOTTM-6 Tape and Reel Data

August 1999, Rev. C

 1998 Fairchild Semiconductor Corporation

A0 D1

Dimensions are in inches and millimeters

Tape Size Reel

Option Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

8mm 7" Dia 7.00

177.8 0.059

1.5 512 +0. 020/-0.008

13 +0.5/-0.2 0.795

20.2 2.165

55 0.331 +0.059/-0.000

8.4 +1.5/0 0.567

14.4 0.311 – 0.429

7.9 – 10.9

8m m 13" Dia 13.00

330 0.059

1.5 512 +0. 020/-0.008

13 +0.5/-0.2 0.795

20.2 4.00

100 0.331 +0.059/-0.000

8.4 +1.5/0 0.567

14.4 0.311 – 0.429

7.9 – 10.9

See detail AA

Dim A

max

13" Diameter Option

7" Diameter Option

Dim A

Max

See detail AA

W2 max Measured at Hub

W1 Measured at Hub

Dim N

Dim D

min

Dim C

B Min

DETAIL AA

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec R S-481

rotational and lateral movement requirements (see sketches A, B, and C).

20 deg maximum component rotation

0.5mm

maximum

0.5mm

maximum

Sketch C (Top View)

Component lateral movement

Typical

component

cavity

center line

20 deg maximum

Typical

component

center line

Sketch B (Top View)

Component Rotation

Sketch A (Side or Front Sectional View)

Component Rotation

User Direction of Feed

SSOT-6 Embossed Carrier Tape

Configuration: Fi

ure 3.0

SSOT-6 Reel Configuration: Fi

ure 4.0

Dimensions are in millimeter

Pkg type A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

SSOT-6

(8mm) 3.23

+/-0.10 3.18

+/-0.10 8.0

+/-0.3 1.55

+/-0.05 1.125

+/-0.125 1.75

+/-0.10 6.25

min 3.50

+/-0.05 4.0

+/-0.1 4.0

+/-0.1 1.37

+/-0.10 0.255

+/-0.150 5.2

+/-0.3 0.06

+/-0.02

SuperSOTTM-6 Tape and Reel Data, continued

July 1999, Rev. C

SuperSOT-6 (FS PKG Code 31, 33)

SuperSOTTM-6 Package Dimensions

September 1998, Rev. A

1:1

Scale 1:1 on letter size paper

Dimensions shown belo w are in:

inches [millimeters]

Part Weight per unit (gram): 0.0158

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT ST A TUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Formative or

In Design

First Production

Full Production

Not In Production

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

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