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MM74HCT04 Hex Inverter Features General Description TTL, LS pin-out and threshold compatible The MM74HCT04 is a logic function fabricated by using advanced silicon-gate CMOS technology which provides the inherent benefits of CMOS--low quiescent power and wide power supply range. This device is input and output characteristic as well as pin-out compatible with standard 74LS logic families. The MM74HCT04, triple buffered, hex inverters, features low power dissipation and fast switching times. All inputs are protected from static discharge by internal diodes to VCC and ground. Fast switching: tPLH, tPHL=12 ns (typ) Low power: 10 W at DC, 3.7 mW at 5 MHz High fanout: 10 LS loads Inverting, triple buffered MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs. Ordering Information Order Number Package Number Package Description MM74HCT04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HCT04SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT04MTC MM74HCT04N MTC14 N14A 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. (c)1984 Fairchild Semiconductor Corporation MM74HCT04 Rev. 1.3.0 www.fairchildsemi.com MM74HCT04 -- Hex Inverter February 2008 MM74HCT04 -- Hex Inverter Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View (c)1984 Fairchild Semiconductor Corporation MM74HCT04 Rev. 1.3.0 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Rating VCC Supply Voltage VIN DC Input Voltage -1.5 to VCC+1.5V DC Output Voltage -0.5 to VCC+0.5V VOUT IIK, IOK -0.5 to +7.0V Clamp Diode Current 20mA IOUT DC Output Current, per pin 25mA ICC DC VCC or GND Current, per pin 50mA TSTG PD Storage Temperature Range -65C to +150C Power Dissipation Note 2 600mW S.O. Package only TL 500mW Lead Temperature (Soldering 10 seconds) 260C Notes: 1. Unless otherwise specified all voltages are referenced to ground. 2. Power Dissipation temperature derating -- plastic "N" package: -12mW/C from 65C to 85C. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC VIN, VOUT TA t r, t f Parameter Supply Voltage DC Input or Output Voltage Operating Temperature Range Input Rise or Fall Times (c)1984 Fairchild Semiconductor Corporation MM74HCT04 Rev. 1.3.0 Min. Max. Units 4.5 5.5 V 0 VCC V -40 +85 C 500 ns www.fairchildsemi.com 3 MM74HCT04 -- Hex Inverter Absolute Maximum Ratings(1) VCC = 5V 10% (unless otherwise specified) TA = -40C to 85C TA = 25C Symbol Parameter Conditions Typ. TA = -55C to 125C Guaranteed Limits Units VIH Minimum HIGH Level Input Voltage 2.0 2.0 2.0 V VIL Maximum LOW Level Input Voltage 0.8 0.8 0.8 V VOH Minimum HIGH Level Output Voltage V VOL Maximum LOW Level Voltage VIN = VIH or VIL, |IOUT| = 20A VCC VCC - 0.1 VCC - 0.1 VCC - 0.1 VIN = VIH or VIL, |IOUT| = 4.0mA, VCC = 4.5V 4.2 3.98 3.84 3.7 VIN = VIH or VIL, |IOUT| = 4.8mA, VCC = 5.5V 5.2 4.98 4.84 4.7 0 0.1 0.1 0.1 VIN = VIH, |IOUT| = 4.0mA, VCC = 4.5V 0.2 0.26 0.33 0.4 VIN = VIH, |IOUT| = 4.8mA, VCC = 5.5V 0.2 0.26 0.33 0.4 VIN = VIH, |IOUT| = 20A V IIN Maximum Input Current VIN = VCC or GND, VIH or VIL 0.1 1.0 1.0 A ICC Maximum Quiescent Supply Current VIN = VCC or GND, IOUT = 0A 2.0 20 40 A VIN = 2.4V or 0.5V(3) 0.3 0.4 0.5 mA Note: 3. This is measured per input with all other inputs held at VCC or ground. (c)1984 Fairchild Semiconductor Corporation MM74HCT04 Rev. 1.3.0 www.fairchildsemi.com 4 MM74HCT04 -- Hex Inverter DC Electrical Characteristics VCC = 5.0V, tr = tr = 6ns, CL = 15pF, TA = 25C (unless otherwise noted) Symbol tPLH, tPHL Parameter Conditions Typ. Guaranteed Limit Units 10 18 ns Maximum Propagation Delay AC Electrical Characteristics VCC = 5.0V 10%, tr = tf = 6ns, CL = 50pF (unless otherwise noted) TA = 25C Parameter tPLH, tPHL Maximum Propagation Delay 14 20 25 30 ns tTHL, tTLH Maximum Output Rise and Fall Time 8 15 19 22 ns Power Dissipation Capacitance CIN Input Capacitance (4) Typ. TA = -55C to 125C Symbol CPD Conditions TA = -40C to 85C Guaranteed Limits 20 5 Units pF 10 10 10 pF Note: 4. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. (c)1984 Fairchild Semiconductor Corporation MM74HCT04 Rev. 1.3.0 www.fairchildsemi.com 5 MM74HCT04 -- Hex Inverter AC Electrical Characteristics 0.65 A 0.43TYP 14 8 B 6.4 6.10 3.2 1 PIN#1 IDENT 0.2 C B A 7 TOP VIEW 1.65 ALL LEAD TIPS 0.45 RECOMMENDED LAND PATTERN 1.2 MAX 0.30 0.19 ALL LEAD TIPS 0.1 C 0.65 SEE DETAIL A 0.90+0.15 -0.10 0.13 A B 0.20 0.09 C C FRONT VIEW 0.09 MIN NOTES: A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 2009. E. LANDPATTERN STANDARD: SOP65P640X110-14M. F. DRAWING FILE NAME: MKT-MTC14rev7. GAGE PLANE 0.09 MIN 1.00 0.25 SEATING PLANE DETAIL A 8.75 8.50 A 7.62 14 8 14 B 0.65 8 4.00 3.80 6.00 1 PIN #1 IDENT. 1.27 (0.33) TOP VIEW 5.60 7 0.51 0.35 0.25 M C B A 1.75 MAX 1.70 1 1.27 LAND PATTERN RECOMMENDATION A C 1.50 1.25 FRONT VIEW 0.25 0.10 0.50 0.25 x 45 R0.10 GAGE PLANE R0.10 0.36 8 0 0.90 0.50 (1.04) 0.10 C 0.25 0.19 SIDE VIEW NOTES: A. CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C B. ALL DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS D. LAND PATTERN STANDARD: SOIC127P600X145-14M E. CONFORMS TO ASME Y14.5M, 2009 D. DRAWING FILENAME: MKT-M14Arev14 SEATING PLANE DETAIL A SCALE 16 : 1 7 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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"Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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