IPD50P04P4L-11
OptiMOS®-P2 Power-Transistor
Features
• P-channel - Logic Level - Enhancement mode
• AEC qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green Product (RoHS compliant)
• 100% Avalanche tested
• Intended for reverse battery protection
Maximum ratings, at Tj=25 °C, unless otherwise specified
Parameter Symbol Conditions Unit
Continuous drain current IDTC=25°C,
VGS=-10V1) -50 A
TC=100°C,
VGS=-10V2) -40
Pulsed drain current2) ID,pulse TC=25°C -200
Avalanche energy, single pulse EAS ID= -25A 18 mJ
Avalanche current, single pulse IAS --50 A
Gate source voltage VGS -±163) V
Power dissipation Ptot TC=25°C 58 W
Operating and storage temperature Tj,Tstg - -55 ... +175 °C
IEC climatic category; DIN IEC 68-1 - - 55/175/56
Value
VDS -40
V
RDS(on),max 10.6 mW
ID-50 A
Product Summary
PG-TO252-3-313
Type Package Marking
IPD50P04P4L-11 PG-TO252-3-313 4P04L11
Rev. 1.0 page 1 06.08.2010
IPD50P04P4L-11
Parameter Symbol Conditions Unit
min. typ. max.
Thermal characteristics2)
Thermal resistance, junction - case RthJC - - - 2.6 K/W
SMD version, device on PCB RthJA minimal footprint - - 62
6 cm2cooling area4) - - 40
Electrical characteristics, at Tj=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage V(BR)DSS VGS=0V, ID= -1mA -40 - - V
Gate threshold voltage VGS(th) VDS=VGS,ID=-85µA -1.2 -1.7 -2.2
Zero gate voltage drain current IDSS VDS=-32V, VGS=0V,
Tj=25°C - -0.03 -1 µA
VDS=-32V, VGS=0V,
Tj=125°C2) - -7 -70
Gate-source leakage current IGSS VGS=-16V, VDS=0V - - -100 nA
Drain-source on-state resistance RDS(on) VGS=-4.5V, ID=-30A - 12.3 17.2 mW
VGS=-10V, ID=-50A - 8.2 10.6
Values
Rev. 1.0 page 2 06.08.2010
IPD50P04P4L-11
Parameter Symbol Conditions Unit
min. typ. max.
Dynamic characteristics
2)
Input capacitance Ciss - 3000 3900 pF
Output capacitance Coss - 1100 1400
Reverse transfer capacitance Crss - 37 74
Turn-on delay time td(on) - 12 - ns
Rise time tr- 9 -
Turn-off delay time td(off) - 46 -
Fall time tf- 39 -
Gate Charge Characteristics
2)
Gate to source charge Qgs - 11 14 nC
Gate to drain charge Qgd - 8 16
Gate charge total Qg- 45 59
Gate plateau voltage Vplateau - -3.6 - V
Reverse Diode
Diode continous forward current2) IS- - -50 A
Diode pulse current2) IS,pulse - - -200
Diode forward voltage VSD VGS=0V, IF=-50A,
Tj=25°C - -1 -1.3 V
Reverse recovery time2) trr VR=-20V, IF=50A,
diF/dt=-100A/µs - 40 - ns
Reverse recovery charge2) Qrr -- 32 - nC
TC=25°C
Values
VGS=0V, VDS=-25V,
f=1MHz
VDD=-20V,
VGS=-10V, ID=-50A,
RG=3.5W
VDD=-32V, ID=-50A,
VGS=0 to -10V
2) Specified by design. Not subject to production test.
4)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3) VGS=+5V/-16V according AEC; VGS=+16V for max 168h at TJ=175°C
1) Current is limited by bondwire; with an RthJC = 2.6K/W the chip is able to carry 60A at 25°C.
Rev. 1.0 page 3 06.08.2010
IPD50P04P4L-11
1 Power dissipation 2 Drain current
Ptot = f(TC); VGS ≤ -6V ID= f(TC); VGS ≤ -6V
3 Safe operating area 4 Max. transient thermal impedance
ID= f(VDS); TC= 25 °C; D= 0 ZthJC = f(tp)
parameter: tpparameter: D=tp/T
1 µs
10 µs
100 µs
1 ms
1
10
100
1000
0.1 1 10 100
-VDS [V]
-ID[A]
single pulse
0.01
0.05
0.1
0.5
10-6 10-5 10-4 10-3 10-2 10-1 100
10-3
10-2
10-1
100
101
tp[s]
ZthJC [K/W]
0
10
20
30
40
50
60
70
0 50 100 150 200
TC[°C]
Ptot [W]
0
10
20
30
40
50
60
0 50 100 150 200
TC[°C]
-ID[A]
Rev. 1.0 page 4 06.08.2010
IPD50P04P4L-11
5 Typ. output characteristics 6 Typ. drain-source on-state resistance
ID= f(VDS); Tj= 25°C RDS(on) = f(ID); Tj= 25°C
parameter: VGS parameter: VGS
7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance
ID= f(VGS); VDS = -6V RDS(on) = f(Tj); ID= -50A; VGS = -10V
parameter: Tj
5
6
7
8
9
10
11
12
13
14
-60 -20 20 60 100 140 180
Tj[°C]
RDS(on) [mW]
-3 V
-3.5 V
-4 V
-4.5 V
-5 V
-10 V
0
20
40
60
80
100
120
140
160
180
200
0123456
-VDS [V]
-ID[A]
-4V
-4.5V
-5V
-10V
5
10
15
20
0 30 60 90 120 150 180
-ID[A]
RDS(on) [mW]
-55 °C
25 °C
175 °C
0
20
40
60
80
100
120
140
160
1 2 3 4 5
-VGS [V]
-ID[A]
Rev. 1.0 page 5 06.08.2010
IPD50P04P4L-11
9 Typ. gate threshold voltage 10 Typ. capacitances
VGS(th) = f(Tj); VGS =VDS C= f(VDS); VGS = 0 V; f= 1 MHz
parameter: ID
11 Typical forward diode characteristicis 12 Drain-source breakdown voltage
IF = f(VSD)VBR(DSS) =f(Tj); ID= -1mA
parameter: Tj
25 °C
175 °C
100
101
102
103
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
-VSD [V]
-IF[A]
-85µA
-850µA
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
-60 -20 20 60 100 140 180
Tj[°C]
-VGS(th) [V]
Ciss
Coss
Crss
101
102
103
104
0 5 10 15 20 25 30
-VDS [V]
C[pF]
35
36
37
38
39
40
41
42
43
44
45
-60 -20 20 60 100 140 180
Tj[°C]
-VBR(DSS) [V]
Rev. 1.0 page 6 06.08.2010
IPD50P04P4L-11
13 Typ. gate charge 14 Gate charge waveforms
VGS = f(Qgate ); ID= -50A pulsed
parameter: VDD
32V
8V
0
1
2
3
4
5
6
7
8
9
10
0 10 20 30 40 50
Qgate [nC]
-VGS [V]
VGS
Qgate
Vgs(th)
Qg(th)
Qgs Qgd
Qsw
Qg
Rev. 1.0 page 7 06.08.2010
IPD50P04P4L-11
Published by
81726 Munich, Germany
©
Infineon Technologies AG 2010
All Rights Reserved.
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or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
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For further information on technology, delivery terms and conditions and prices, please contact
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www.infineon.com
).
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For information on the types in question, please contact the nearest Infineon Technologies Office.
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If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0 page 8 06.08.2010
IPD50P04P4L-11
Revision History
Version
Revision 1.0
Changes
Final Data Sheet
Date
6/8/2010
Rev. 1.0 page 9 06.08.2010