LMC6041 LMC6041 CMOS Single Micropower Operational Amplifier Literature Number: SNOS610D LMC6041 CMOS Single Micropower Operational Amplifier General Description Features Ultra-low power consumption and low input-leakage current are the hallmarks of the LMC6041. Providing input currents of only 2 fA typical, the LMC6041 can operate from a single supply, has output swing extending to each supply rail, and an input voltage range that includes ground. The LMC6041 is ideal for use in systems requiring ultra-low power consumption. In addition, the insensitivity to latch-up, high output drive, and output swing to ground without requiring external pull-down resistors make it ideal for singlesupply battery-powered systems. n n n n n Other applications for the LMC6041 include bar code reader amplifiers, magnetic and electric field detectors, and handheld electrometers. This device is built with National's advanced Double-Poly Silicon-Gate CMOS process. Low supply current: 14 A (Typ) Operates from 4.5V to 15.5V single supply Ultra low input current: 2 fA (Typ) Rail-to-rail output swing Input common-mode range includes ground Applications n n n n n n n Battery monitoring and power conditioning Photodiode and infrared detector preamplifier Silicon based transducer systems Hand-held analytic instruments pH probe buffer amplifier Fire and smoke detection systems Charge amplifier for piezoelectric transducers See the LMC6042 for a dual, and the LMC6044 for a quad amplifier with these features. Connection Diagram 8-Pin DIP/SO 01113601 Low-Leakage Sample and Hold 01113614 (c) 2004 National Semiconductor Corporation DS011136 www.national.com LMC6041 CMOS Single Micropower Operational Amplifier August 2000 LMC6041 Absolute Maximum Ratings (Note 1) Current at Power Supply Pin Differential Input Voltage Power Dissipation (Note 3) Supply Voltage Supply Voltage (V+ - V-) 16V Output Short Circuit to V- (Note 2) Output Short Circuit to V+ (Note 11) Operating Ratings Temperature Range -40C TJ +85C LMC6041AI, LMC6041I Lead Temperature (Soldering, 10 sec.) Storage Temperature Range (V ) + 0.3V, (V-) - 0.3V Voltage at Input/Output Pin If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. 35 mA + 260C Junction Temperature Power Dissipation 110C ESD Tolerance (Note 4) 5 mA 18 mA Current at Output Pin (Note 9) Thermal Resistance (JA) (Note 10) 500V Current at Input Pin 4.5V V+ 15.5V Supply Voltage -65C to +150C 8-Pin DIP 101C/W 8-Pin SO 165C/W Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA = TJ = 25C. Boldface limits apply at the temperature extremes. V+ = 5V, V- = 0V, VCM = 1.5V, VO = V+/2, and RL > 1M unless otherwise specified. Symbol VOS TCVOS Parameter Conditions Input Offset Voltage Typical LMC6041AI LMC6041I Units (Note 5) Limit Limit (Limit) (Note 6) (Note 6) 1 Input Offset Voltage 3 6 mV 3.3 6.3 max 1.3 V/C Average Drift IB Input Bias Current 0.002 4 4 pA max IOS Input Offset Current RIN Input Resistance CMRR Common Mode 0V VCM 12.0V Rejection Ratio V+ = 15V Positive Power Supply 5V V+ 15V Rejection Ratio VO = 2.5V Negative Power Supply 0V V- -10V Rejection Ratio VO = 2.5V Input Common-Mode V+ = 5V and 15V Voltage Range for CMRR 50 dB 0.001 2 2 pA max +PSRR -PSRR CMR > 10 Tera 75 68 62 dB 66 60 min 68 62 dB 66 60 min 94 84 74 dB 83 73 min -0.4 -0.1 -0.1 V 0 0 max V+ - 2.3V V+ - 2.3V V V - 2.5V V+ - 2.4V min 400 300 V/mV 300 200 min 180 90 V/mV 120 70 min 100 V/mV 75 V+ - 1.9V + AV Large Signal RL = 100 k (Note 7) Sourcing 1000 Voltage Gain Sinking RL = 25 k (Note 7) www.national.com 500 Sourcing 1000 200 160 80 min Sinking 250 100 50 V/mV 60 40 min 2 (Continued) Unless otherwise specified, all limits guaranteed for TA = TJ = 25C. Boldface limits apply at the temperature extremes. V+ = 5V, V- = 0V, VCM = 1.5V, VO = V+/2, and RL > 1M unless otherwise specified. Symbol VO Parameter Output Swing Conditions V+ = 5V Typical LMC6041AI LMC6041I Units (Note 5) Limit Limit (Limit) (Note 6) (Note 6) 4.970 4.940 V 4.950 4.910 min 4.987 RL = 100 k to V+/2 0.004 V+ = 5V 4.980 RL = 25 k to V+/2 0.010 V+ = 15V 14.970 + RL = 100 k to V /2 0.007 V+ = 15V 14.950 RL = 25 k to V+/2 0.022 ISC Output Current Sourcing, VO = 0V 22 V+ = 5V ISC Output Current V max 4.920 4.870 V 4.870 4.820 min 0.080 0.130 V 0.130 0.180 max 14.920 14.880 V 14.880 14.820 min 0.030 0.060 V 0.050 0.090 max 14.900 14.850 V 14.850 14.800 min 0.100 0.150 V 0.150 0.200 max 16 13 mA 10 8 min 13 mA min 21 16 8 8 Sourcing, VO = 0V 40 15 15 mA 10 10 min 39 24 21 mA 8 8 min 14 20 26 A 24 30 max 26 34 A 31 39 max Sinking, VO = 13V (Note 11) Supply Current 0.060 0.090 Sinking, VO = 5V V+ = 15V IS 0.030 0.050 VO = 1.5V V+ = 15V 18 AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA = TJ = 25C. Boldface limits apply at the temperature extremes. V+ = 5V, V- = 0V, VCM = 1.5V, VO = V+/2, and RL > 1M unless otherwise specified. Symbol Parameter Conditions (Note 8) Typ LMC6041AI LMC6041I Units (Note 5) Limit Limit (Limit) (Note 6) (Note 6) 0.015 0.010 0.010 0.007 SR Slew Rate 0.02 V/s GBW Gain-Bandwidth Product 75 kHz m Phase Margin 60 Deg en Input-Referred F = 1 kHz 83 nV/Hz F = 1 kHz 0.0002 pA/Hz 0.01 % min Voltage Noise in Input-Referred Current Noise T.H.D. Total Harmonic F = 1 kHz, AV = -5 Distortion RL = 100 k, VO = 2 Vpp 5V Supply 3 www.national.com LMC6041 Electrical Characteristics LMC6041 AC Electrical Characteristics (Continued) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating conditions indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 110C. Output currents in excess of 30 mA over long term may adversely affect reliability. Note 3: The maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - TA)/JA. Note 4: Human body model, 1.5 k in series with 100 pF. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed at room temperature (standard type face) or at operating temperature extremes (bold face type). Note 7: V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 2.5V VO 7.5V. Note 8: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified in the slower of the positive and negative slew rates. Note 9: For operating at elevated temperatures the device must be derated based on the thermal resistance JA with PD = (TJ - TA)/JA. Note 10: All numbers apply for packages soldered directly into a PC board. Note 11: Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected. Typical Performance Characteristics VS = 7.5V, TA = 25C unless otherwise specified Offset Voltage vs Temperature of Five Representative Units Supply Current vs Supply Voltage 01113619 01113620 Input Bias Current vs Input Common-Mode Voltage Input Bias Current vs Temperature 01113621 www.national.com 01113622 4 Input Common-Mode Voltage Range vs Temperature (Continued) Output Characteristics Current Sinking 01113623 01113624 Output Characteristics Current Sourcing Input Voltage Noise vs Frequency 01113625 01113626 Power Supply Rejection Ratio vs Frequency CMRR vs Frequency 01113627 01113628 5 www.national.com LMC6041 Typical Performance Characteristics VS = 7.5V, TA = 25C unless otherwise specified LMC6041 Typical Performance Characteristics VS = 7.5V, TA = 25C unless otherwise specified Open-Loop Voltage Gain vs Temperature CMRR vs Temperature 01113629 01113630 Gain and Phase Responses vs Load Capacitance Open-Loop Frequency Response 01113631 01113632 Gain and Phase Responses vs Temperature Gain Error (VOS vs VOUT) 01113634 01113633 www.national.com (Continued) 6 Common-Mode Error vs Common-Mode Voltage of Three Representative Units (Continued) Non-Inverting Slew Rate vs Temperature 01113635 01113636 Non-Inverting Large Signal Pulse Response (AV = +1) Inverting Slew Rate vs Temperature 01113637 01113638 Non-Inverting Small Signal Pulse Response Inverting Large-Signal Pulse Response 01113640 01113639 7 www.national.com LMC6041 Typical Performance Characteristics VS = 7.5V, TA = 25C unless otherwise specified LMC6041 Typical Performance Characteristics VS = 7.5V, TA = 25C unless otherwise specified (Continued) Stability vs Capacitive Load (AV = +1) Inverting Small Signal Pulse Response 01113641 01113642 Stability vs Capacitive Load (AV = 10) 01113643 achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors and even small values of input capacitance, due to transducers, photodiodes, and circuits board parasitics, reduce phase margins. When high input impedance are demanded, guarding of the LMC6041 is suggested. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. (See Printed-Circuit-Board Layout for High Impedance Work.) Applications Hints AMPLIFIER TOPOLOGY The LMC6041 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional micropower op-amps. These features make the LMC6041 both easier to design with, and provide higher speed than products typically found in this ultra-low power class. COMPENSATING FOR INPUT CAPACITANCE It is quite common to use large values of feedback resistance with amplifiers with ultra-low input current, like the LMC6041. Although the LMC6041 is highly stable over a wide range of operating conditions, certain precautions must be met to www.national.com 8 LMC6041 Applications Hints (Continued) 01113605 FIGURE 1. Cancelling the Effect of Input Capacitance The effect of input capacitance can be compensated for by adding a capacitor. Adding a capacitor, Cf, around the feedback resistor (as in Figure 1 ) such that: 01113606 FIGURE 2. LMC6041 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads In the circuit of Figure 2, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. Capacitive load driving capability is enhanced by using a pull up resistor to V+ (Figure 3 ). Typically a pull up resistor conducting 10 A or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics). or R1 CIN R2 Cf Since it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and the LMC662 for a more detailed discussion on compensating for input capacitance. CAPACITIVE LOAD TOLERANCE Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created by the combination of the op-amp's output impedance and the capacitive load. This pole induces phase lag at the unity-gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 2. 01113618 FIGURE 3. Compensating for Large Capacitive Loads with a Pull Up Resistor PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC6041, typically less than 2fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6041's inputs and the 9 www.national.com LMC6041 Applications Hints (Continued) terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp's inputs, as in Figure 4. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifer inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 100 times degradation from the LMC6041's actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011 would cause only 0.05 pA of leakage current. See Figure 5 for typical connections of guard rings for standard op-amp configurations. 01113608 Inverting Amplifier 01113609 Follower 01113610 Non-Inverting Amplifier FIGURE 5. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don't insert the amplifier's input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 6. 01113607 FIGURE 4. Example of Guard Ring in P.C. Board Layout 01113611 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board.) FIGURE 6. Air Wiring www.national.com 10 + (V = 5.0 VDC) The extremely high input impedance, and low power consumption, of the LMC6041 make it ideal for applications that require battery-powered instrumentation amplifiers. Examples of these type of applications are hand-held pH probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure transducers. Rejection of the common-mode component of the input is accomplished by making the ratio of R1/R2 equal to R3/R4. So that where, A suggested design guideline is to minimize the difference of value between R1 through R4. This will often result in improved resistor tempco, amplifier gain, and CMRR over temperature. If RN = R1 = R2 = R3 = R4 then the gain equation can be simplified: 01113612 FIGURE 7. Two Op-Amp Instrumentation Amplifier The circuit in Figure 7 is recommended for applications where the common-mode input range is relatively low and the differential gain will be in the range of 10 to 1000. This two op-amp instrumentation amplifier features an independent adjustment of the gain and common-mode rejection trim, and a total quiescent supply current of less than 28 A. To maintain ultra-high input impedance, it is advisable to use ground rings and consider PC board layout an important part of the overall system design (see Printed-Circuit-Board Lay- Due to the "zero-in, zero-out" performance of the LMC6041, and output swing rail-rail, the dynamic range is only limited to the input common-mode range of 0V to VS-2.3V, worst case at room temperature. This feature of the LMC6041 makes it an ideal choice for low-power instrumentation systems. A complete instrumentation amplifier designed for a gain of 100 is shown in Figure 8. Provisions have been made for low sensitivity trimming of CMRR and gain. 01113613 FIGURE 8. Low-Power Two-Op-Amp Instrumentation Amplifier 01113614 FIGURE 9. Low-Leakage Sample and Hold 11 www.national.com LMC6041 out for High Impedance Work). Referring to Figure 7, the input voltages are represented as a common-mode input VCM plus a differential input VD. Typical Single-Supply Applications LMC6041 Typical Single-Supply Applications (V+ = 5.0 VDC) (Continued) 01113615 FIGURE 10. Instrumentation Amplifier 01113616 FIGURE 11. 1 Hz Square-Wave Oscillator 01113617 FIGURE 12. AC Coupled Power Amplifier www.national.com 12 LMC6041 Ordering Information Temperature Range Package Industrial NSC Drawing Transport Media M08A Rail -40C to +85C 8-Pin LMC6041AIM, LMC6041AIMX Small Outline LMC6041IM, LMC6041IMX 8-Pin LMC6041AIN Molded DIP LM6041IN Tape and Reel N08E 13 Rail www.national.com LMC6041 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin Small Outline Order Number LMC6041AIM, LMC6041AIMX, LMC6041IM or LMC6041IMX NS Package Number M08A 8-Pin Molded DIP Order Number LMC6041AIN or LMC6041IN NS Package Number N08E www.national.com 14 LMC6041 CMOS Single Micropower Operational Amplifier Notes National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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