FIN1018MX_NL - Fairchild Semiconductor

March 2001

Revised April 2002

FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver

FIN1018

3.3V LVDS 1-Bit High Speed Differential Receiver

General Description

This single receiver is designed for high speed intercon-

nects utilizing Low Voltage Differential Signaling (LVDS)

technology. The receiver translates LVDS levels, with a typ-

ical differe ntial input th reshold of 100 mV, to LV TTL signal

levels. LVDS provides low EMI at ultra low power dissipa-

tion even at high frequen cies. This device is id eal for high

speed transfer of clock or data.

The FIN1018 can be pa ired with its companion driver, the

FIN1017, or with any other LVDS driver.

Features

■Greater than 400Mbs data rate

■3.3V power supply operation

■0.4ns maximum pulse skew

■2.5ns maximum propagation delay

■Low power dissipa ti on

■Power-Off protection

■Fail safe protection for open-circuit, shorted and termi-

nated condi tion s

■Meets or exceeds the TIA/EIA-644 LVDS standard

■Flow-th rou gh pinout simplif ie s PCB lay out

■8-Lead SOIC and US-8 packages save space

Ordering Code:

Pin Descriptions

Function Table

H = HIGH Logic Level

L = LOW Logic Le v el

Fail Safe = Open, Shorted, Terminated

Connection Diagrams

8-Lead SOIC

Pin Assignment for US-8 Package

TOP VIEW

Order Number Package Number Package Description

FIN1018M M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

[TUBE]

FIN1018MX M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

[TAPE and REEL]

FIN1018K8X MAB08A 8-Lead U S8, JEDEC M O-187, Variation CA 3.1mm Wide

[TAPE and REEL]

Pin Name Description

ROUT LVTTL Data Output

RIN+Non-i n ver ting D river Input

RIN−Inver ting D rive r Input

VCC Power Supply

GND Ground

NC No Connect

Input Outputs

RIN+RIN−ROUT

LH L

HL H

Fail Safe Condition H

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FIN1018

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: The “Absolute Maximum Ratings”: are those values beyond which

damage to the device may occur. The databook specifications should be

met, without exception, to ensure that the system design is reliable over its

power supply, temperature and output/input loading variables. Fairchild

does no t re c om m end operation of circuit s o ut s ide data book specif ic ation.

DC Electrical Characteristi cs

Over supply voltage and operating temperature ranges, unless otherwise specified

Note 2: All typi c al values are at TA = 25°C and with VCC = 3.3V.

AC Electrical Characteristi cs

Over supply voltage and operating temperature ranges, unless otherwise specified

Note 3: All typi c al values are at TA = 25°C and with VCC = 3.3V.

Note 4: tSK(PP) is t he mag nit ude of t he difference in pro pagatio n delay t im es betwe en any sp ecified t erminals of t w o devices swit c hing in the sam e d ire c ti on

(eithe r LOW-to-H I GH or HIGH-t o-LOW ) w hen both devices operate w it h t he same s upply voltage, same tempe rature, and have identica l test circuits.

Supply Voltage ( VCC)−0.5V to +4.6V

DC Input Voltage (RIN+, RIN−)−0.5V to +4.7V

DC Output Voltage (DOUT)−0.5V to +6V

DC Output Current (IO)16 mA

Storage Temperature Range (TSTG)−65°C to +150°C

Max Junction Temperature (TJ)150°C

Lead Temperature (TL)

(Soldering, 10 seconds) 260°C

ESD (Human Body Model) ≥ 6500V

ESD (Bus Pins RIN−/RIN+ to GND) ≥ 9500V

ESD (Machine Model) ≥ 300V

Supply Voltage (VCC) 3.0V to 3.6V

Input Voltage (VIN) 0 to VCC

Magnitude of Differential Voltage

(|VID|) 100mV to VCC

Common-mode Input Voltage (VIC) 0.05V to 2.35 V

Operating Temperature (TA)−40°C to +85°C

Symbol Parameter Test Conditions Min Typ Max Units

(Note 2)

VTH Differential Input Threshold HIGH See Figure 1 and Table 1 100 mV

VTL Differential Input Threshold LOW See Figure 1 and Table 1 −100 mV

IIN Input Current VIN = 0V or VCC ±20 µA

II(OFF) Power-OFF Input Current VCC = 0V, VIN = 0V or 3.6V ±20 µA

VOH Output HIGH Voltage IOH = −100 µAV

CC −0.2 V

IOH = −8 mA 2.4 V

VOL Output LOW Voltage IOH = 100 µA0.2V

IOL = 8 mA 0.5 V

VIK Input Clamp Voltage IIK = −18 mA −1.5 V

ICC Power Supply Current Inputs Open, (RIN+ = 1V and RIN− = 1.4V), 7mA

or (RIN+ = 1.4V and RIN− = 1V)

CIN Input Capacitance 4pF

COUT Output Capacitance 6pF

Symbol Parameter Test Conditions Min Typ Max Units

(Note 3)

tPLH Propagati on Delay LOW-to -H IGH 0.9 2.5 ns

tPHL Propagation Delay HIGH-to -LOW 0.9 2.5 ns

tTLH Output Rise Time (20% to 80%) |VID| = 400 mV, CL = 10 pF 0.5 ns

tTHL Output Fall Time (80% to 20%) See Figure 1 and Figure 2 0.5 ns

tSK(P) Pulse Skew |tPLH - tPHL|0.4 ns

tSK(PP) Part-to-Part Skew (Note 4) 1.0 ns

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FIN1018

Note A: All input puls es have frequency = 10MHz, tR or tF = 1ns

Note B: CL includes all pr obe and fix t ure capac it ances

FIGURE 1. Dif ferential Receiver Voltage Definitions and Propagation Delay and T ransition Time Test Circuit

TABLE 1. Receiver Minimum and Maximum Input Threshold Test Voltages

FIGUR E 2. LV DS Inpu t to LVTTL Output A C Wavefor ms

Applied Voltages (V) Resulting Differential

Input Voltage (mV) Resulting Common Mode

Input Voltage (V)

VIA VIB VID VIC

1.25 1.15 100 1.2

1.15 1.25 −100 1.2

2.4 2.3 100 2.35

2.3 2.4 −100 2.35

0.1 0 100 0.05

00.1−100 0.05

1.5 0.9 600 1.2

0.9 1.5 −600 1.2

2.4 1.8 600 2.1

1.8 2.4 −600 2.1

0.6 0 600 0.3

00.6−600 0.3

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FIN1018

DC / AC Typical Performance Curves

FIGURE 3. Output High Voltage vs.

Power Supply Voltage FIGURE 4. Output Low Voltage vs.

Power Supply Voltage

FIGURE 5. Output Short Circuit Current vs.

Power Supply Voltage FIGURE 6. Power Supply Current vs.

Frequency

FIGURE 7. Power Supply Current vs.

Ambient Temperature FIGURE 8. Differential Propagation Delay

Power Supply Voltage

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FIN1018

DC / AC Typical Performance Curves (Continued)

FIGURE 9. Differential Propagation Delay vs.

Ambient Temperature FIGURE 10. Differential Skew vs.

Power Supply Volt age

FI GURE 11. Dif f erential Skew vs.

Ambient Temperature FIGURE 12. Differential Propagation Delay vs.

Differential Input Voltage

FIGURE 13. Differential Propagation Delay vs.

Common-Mode Voltage FIGURE 14. Transition Time vs.

Power Supply Volt age

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FIN1018

DC / AC Typical Performance Curves (Continued)

FIGURE 15. Transition Time vs.

Ambient Temperature FIGURE 16. Differential Propagation Delay vs.

Load

FIGURE 17. Differential Propagation Delay vs.

Load FIGURE 18. Transition Time vs.

Load

FIGURE 19. Transition Time vs.

Load

FIGURE 20. Power Supply Current vs.

Power Supply Voltage

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FIN1018

Physical Dimensions inches (millimeters) unless otherwise noted

8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M08A

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FIN1018 3.3V LVDS 1-Bit High Speed Differ ential Receiver

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide

Package Number MAB08A

Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r syste ms are devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a lif e supp ort

device or system whose failure to perform can be rea-

sonabl y ex pect ed to ca use the fa ilu re of the li fe su pp ort

device or system, or to affect its safety or effectiveness.