09/02/11
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AUIRFP1405
HEXFET® Power MOSFET
PD - 97724
Features
lAdvanced Planar Technology
lLow On-Resistance
lDynamic dV/dT Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
lRepetitive Avalanche Allowed
up to Tjmax
lLead-Free, RoHS Compliant
lAutomotive Qualified*
Description
Specifically designed for Automotive applications,
this Stripe Planar design of HEXFET® Power
MOSFETs utilizes the latest processing techniques
to achieve low on-resistance per silicon area. This
benefit combined with the fast switching speed
and ruggedized device design that HEXFET power
MOSFETs are well known for, provides the de-
signer with an extremely efficient and reliable
device for use in Automotive and a wide variety of
other applications.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in
the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Ambient temperature (TA) is 25°C, unless otherwise specified.
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
AUTOMOTIVE GRADE
GDS
Gate Drain Source
TO-247AC
AUIRFP1405
S
D
G
D
V
(BR)DSS
55V
R
DS(on)
typ. 4.2mΩ
max 5.3m
Ω
I
D (Silicon Limited)
160A
i
I
D (Package Limited)
95A
S
D
G
Parameter Units
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
I
D
@ T
C
= 100°C Continuous Drain Current, V
GS
@ 10V (Silicon Limited) A
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V (Package Limited)
I
DM
Pulsed Drain Current
c
P
D
@T
C
= 25°C Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
E
AS
Single Pulse Avalanche Energy (Thermally Limited)
d
mJ
E
AS
(tested ) Single Pulse Avalanche Energy Tested Value
h
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanche Energy
c
mJ
T
J
Operating Junction and
T
STG
Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case )
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
Junction-to-Case
j
––– 0.49
R
θCS
Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
R
θJA
Junction-to-Ambient ––– 40
-55 to + 175
300
10 lbf
y
in (1.1N
y
m)
310
2.0
± 20
Max.
160
i
110
i
640
95
1060
530
See Fig. 12a, 12b, 15, 16
AUIRFP1405
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S
D
G
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.12mH
RG = 25Ω, IAS = 95A, VGS =10V. Part not
recommended for use above this value.
Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population, starting
TJ = 25°C, L = 0.12mH, RG = 25Ω, IAS = 95A, VGS =10V.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 95A.
Rθ is measured at TJ of approximately 90°C.
S
D
G
Static Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Units
(BR)DSS
Drain-to-Source Breakdown Voltage
55
–––
–––
Δ
(BR)DSS
/
Δ
T
J
Breakdown Voltage Temp. Coefficient
–––
0.058
–––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
4.2
5.3
GS(th)
Gate Threshold Voltage
2.0
–––
4.0
gfs
Forward Transconductance
77
–––
–––
I
DSS
Drain-to-Source Leakage Current
–––
–––
20
μA
–––
–––
250
I
GSS
Gate-to-Source Forward Leakage
–––
–––
200
nA
Gate-to-Source Reverse Leakage
–––
–––
-200
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Units
Q
g
Total Gate Charge
–––
120
180
Q
gs
Gate-to-Source Charge
–––
30
–––
nC
Q
gd
Gate-to-Drain ("Miller") Charge
–––
53
–––
t
d(on)
Turn-On Delay Time
–––
12
–––
t
r
Rise Time
–––
160
–––
t
d(off)
Turn-Off Delay Time
–––
140
–––
ns
t
f
Fall Time
–––
150
–––
L
D
Internal Drain Inductance
–––
5.0
–––
Between lead,
nH 6mm (0.25in.)
L
S
Internal Source Inductance
–––
13
–––
from package
and center of die contact
C
iss
Input Capacitance
–––
5600
–––
C
oss
Output Capacitance
–––
1310
–––
pF
C
rss
Reverse Transfer Capacitance
–––
350
–––
C
oss
Output Capacitance
–––
6550
–––
C
oss
Output Capacitance
–––
920
–––
C
oss
eff.
Effective Output Capacitance
–––
1750
–––
Diode Characteristics
Parameter
Min.
Typ.
Max.
Units
I
S
Continuous Source Current
–––
–––
95
i
(Body Diode) A
I
SM
Pulsed Source Current
–––
–––
640
(Body Diode)
c
SD
Diode Forward Voltage
–––
–––
1.3
t
rr
Reverse Recovery Time
–––
70
110
ns
Q
rr
Reverse Recovery Charge
–––
170
260
nC
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
mΩ
V
DS
= 25V
Conditions
V
DS
= V
GS
, I
D
= 250μA
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
DS
= 25V, I
D
= 95A
f
I
D
= 95A
V
DS
= 44V
V
GS
= 20V
V
GS
= -20V
V
GS
= 10V
e
V
DS
= 55V, V
GS
= 0V
V
DS
= 55V, V
GS
= 0V, T
J
= 125°C
MOSFET symbol
V
DD
= 28V
I
D
= 95A
R
G
= 2.6
Ω
Conditions
V
GS
= 10V
e
V
GS
= 0V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 44V
f
V
GS
= 0V, V
DS
= 44V, ƒ = 1.0MHz
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 95A
e
T
J
= 25°C, I
F
= 95A, V
DD
= 28V
di/dt = 100A/μs
e
T
J
= 25°C, I
S
= 95A, V
GS
= 0V
e
showing the
integral reverse
p-n junction diode.
AUIRFP1405
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Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
Highest passing voltage.
Qualification Information
TO-247 N/A
Qualification Level
Automotive
(per AEC-Q101)
††
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
Charged Device
Model
Class C5 (+/- 2000V)
†††
AEC-Q101-005
Moisture Sensitivity Level
RoHS Compliant Yes
ESD
Machine Model Class M4 (+/- 700V)
†††
AEC-Q101-002
Human Body Model Class H2 (+/- 4000V)
†††
AEC-Q101-001
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Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
Vs. Drain Current
0 1 10 100
0.1 110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
60μs PULSE WIDTH
Tj = 175°C
4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
4.0 5.0 6.0 7.0 8.0 9.0 10.0
VGS, Gate-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (Α)
VDS = 25V
60μs PULSE WIDTH
TJ = 25°C
TJ = 175°C
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
60μs PULSE WIDTH
Tj = 25°C
4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0 20406080100
ID, Drain-to-Source Current (A)
0
20
40
60
80
100
120
140
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 10V
380μs PULSE WIDTH
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
0
2000
4000
6000
8000
10000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0 40 80 120 160 200
QG Total Gate Charge (nC)
0
4
8
12
16
20
VGS, Gate-to-Source Voltage (V)
VDS= 44V
VDS= 28V
ID= 95A
FOR TEST CIRCUIT
SEE FIGURE 13
0.2 0.6 1.0 1.4 1.8 2.2
VSD, Source-toDrain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
1 10 100 1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
DC
ance
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
50
100
150
200
ID , Drain Current (A)
LIMITED BY PACKAGE
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 95A
VGS = 10V
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
Thermal Response ( Z thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W) τi (sec)
0.2529 0.00080
0.2368 0.014283
τJ
τJ
τ1
τ1
τ2
τ2
R1
R1R2
R2
τ
τC
Ci i/Ri
Ci= τi/Ri
AUIRFP1405
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QG
QGS QGD
VG
Charge
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage Vs. Temperature
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
25 50 75 100 125 150 175
Starting TJ, Junction Temperature (°C)
0
500
1000
1500
2000
EAS, Single Pulse Avalanche Energy (mJ)
I D
TOP 16A
20A
BOTTOM 95A
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.5
2.0
2.5
3.0
3.5
4.0
VGS(th) Gate threshold Voltage (V)
ID = 250μA
1K
VCC
DUT
0
L
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Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
1
10
100
1000
10000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ΔTj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
500
600
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1% Duty Cycle
ID = 95A
AUIRFP1405
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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* V
GS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
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TO-247AC Part Marking Information
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
AUFP1405
YWWA
XX or XX
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
Part Number
IR Logo
Lot Code
AUIRFP1405
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Ordering Information
Base part
number
Package Type Standard Pack Complete Part Number
Form
Quantity
AUIRFP1405
TO-247
Tube
25
AUIRFP1405
AUIRFP1405
12 www.irf.com
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subsidiaries (IR) reserve the right to make corrections, modifications, enhancements, improvements, and
other changes to its products and services at any time and to discontinue any product or services without
notice. Part numbers designated with the AU prefix follow automotive industry and / or customer specific
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subject to IRs terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with IRs standard warranty. Testing and other quality control techniques are used to the extent
IR deems necessary to support this warranty. Except where mandated by government requirements, testing
of all parameters of each product is not necessarily performed.
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http://www.irf.com/technical-info/
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