SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
AVAILABLE AS MILITARY
SPECIFICATION
SMD 5962-956131,2
MIL STD-8831
FEATURES
Ultra Low Power with 2V Data Retention
(0.2mW MAX worst case Power-down standby)
Fully Static, No Clocks
Single +5V ±10% power supply
Easy memory expansion with CE\ and OE\ options
All inputs and outputs are TTL-compatible
Three state outputs
Operating temperature range:
Ceramic -55oC to +125oC & -40oC to +85oC
Plastic -40oC to +85oC3
1. Not applicable to plastic package
2. Applies to CW package only.
3. Contact factory for -55oC to +125oC
OPTIONS MARKING
Timing
55ns access -554
70ns access -70
85ns access -85
100ns access -100
Packages
Ceramic Dip (600 mil)
CW
No. 112
Ceramic SOJ5
ECJ
No. 502
Plastic TSOP DG No. 1002
PIN ASSIGNMENT
(T op View)
32-Pin DIP, 32-Pin SOJ
& 32-Pin TSOP
4. For DG package, contact factory
5. Contact Factory
NOTE: Not all combinations of operating temperature, speed, data retention and low power are
necessarily available. Please contact the factory for availability of specific part number
combinations.
512K x 8 SRAM
Ultra Low Power SRAM
For more products and information
please visit our web site at
www.austinsemiconductor.com
GENERAL DESCRIPTION
The AS5C4009LL is organized as 524,288 x 8 SRAM utilizing a
special ultra low power design process. ASI’s pinout adheres to the
JEDEC standard for pinout on 4 megabit SRAMs. The evolutionary 32
pin version allows for easy upgrades from the 1 meg SRAM design.
For flexibility in memory applications, ASI offers chip enable (CE\)
and output enable (OE\) capabilities. These features can place the
outputs in High-Z for additional flexibility in system design.
This devices operates from a single +5V power supply and all
inputs and outputs are fully TTL-compatible.
Writing to these devices is accomplished when write enable (WE\)
and CE\ inputs are both LOW. Reading is accomplished when WE\
remains HIGH and CE\ and OE\ go LOW. The device offers a re-
duced power standby mode when disabled, by lowering VCC to 2V and
maintaining CE\ = 2V. This allows system designers to meet ultra low
standby power requirements.
Pin Name
Function
WE\ Write Enable Input
CE\ Chip Select Input
OE\ Output Enable Input
A0 - A18 Address Inputs
I/O1 - I/O8 Data Inputs/Outputs
Vcc Power
Vss Ground
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/01
I/02
I/03
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
A17
WE\
A13
A8
A9
A11
OE\
A10
CE\
I/08
I/07
I/06
I/05
I/04
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
FUNCTIONAL BLOCK DIAGRAM
Clk. gen. Precharge circuit
Memory Array
1024 rows
512 x 8 columns
Row
select
I/O Circuit
Control
logic
CE\
WE\
OE\
I/O
1
I/O
8
A18
A16
A14
A12
A7
A6
A4
A1
A0
A5
Column Select
Data
cont
Data
cont
A9 A8 A13 A17 A15 A10 A11 A3 A2
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
ABSOLUTE MAXIMUM RATINGS*
Voltage on Vcc Supply Relative to Vss...................-.5V to +7.0V
Voltage on any pin Relative to Vss..........................-.5V to +7.0V
Storage Temperature ....................................-65 °C to +150°C
Operating T emperature Range.............................-55oC to +125oC
Soldering T emperature Range...............................................260oC
Maximum Junction T emperature**....................................+150°C
Power Dissipation...................................................................1.0W
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability .
** Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow .
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TA < 125oC; Vcc = 5V +10%)
PARAMETER/CONDITION MIN MAX UNITS NOTES
Input Leakage Current (V
IN
= V
SS
to V
CC
)-5 5 µΑ
Output Leakage Current
(CE\=V
IH
or OE\=V
IH
or WE\=V
IL
, V
IO
=V
SS
to V
CC
)-5 5 µΑ
Output Low Voltage (I
OL
= 2.1mA) -- 0.4 V 15
Output High Voltage (I
OH
= -1.0 mA) 2.4 -- V 15
Supply Voltage 4.5 5.5 V 15
Input High (Logic 1) Voltage 2.2 Vcc +0.5 V 1, 15
Input Low (Logic 0) Voltage -0.5 0.8 V 2, 15
V
IL
SYMBOL
I
LI
I
LO
V
OL
V
OH
V
CC
V
IH
CONDITIONS SYM -55 -70 -85 -100 UNITS
NOTES
Cycle Time = Min., 100%
Duty Cycle, I
IO
= 0mA,
CE\ = V
IL
, V
IN
= V
IH
or V
IL
I
cc1
100 90 80 70 mA 3
TTL CE\ = V
IH
,
Other inputs = V
IL
or V
IH
I
SB
6666mA
CMOS CE\ = Vcc -0.2V,
Other inputs = 0 ~ Vcc I
SB1
0.75 0.75 0.75 0.75 mA
MAX
Power Supply Current:
Operating
PARAMETER
Power Supply Current:
Standby
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(-55oC < TA < 125oC; Vcc = 5V +10%)
CAPACITANCE
PARAMETER SYMBOL MAXIMUM UNITS NOTES
Input Capacitance VIN=0V CIN 8pF4
Input/Output Capactiance VIO=0V CIO 10 pF 4
TA = 25oC, f = 1MHz
VCC = 5V
CONDITIONS
SYM MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
READ Cycle
READ cycle Time
t
RC
55 70 85 100 ns
Address access time
t
AA
55 70 85 100 ns
Chip Enable access time
t
ACE
55 70 85 100 ns
Output hold from address change
t
OH
10 10 10 10 ns
Chip Enable to output in Low-Z
t
LZCE
10 10 10 10 ns 4,6
Chip disable to output in High-Z
t
HZCE
20 25 30 30 ns 4,6
Chip Enable to power-up time
t
PU
0000ns4
Chip disable to power-down time
t
PD
55 70 85 100 ns 4
Output Enable access time
t
AOE
30 35 40 45 ns
Output Enable to output in Low-Z
t
LZOE
5555ns4,6
Output disable to output in High-Z
t
HZOE
20 25 30 30 ns 4,6
WRITE Cycle
WRITE cycle time
t
WC
55 70 85 100 ns
Chip Enable to end of write
t
CW
50 60 70 80 ns
Address valid to end of write
t
AW
50 60 70 80 ns
Address setup time
t
AS
0000ns
Address hold from end of write
t
AH
0000ns
WRITE pulse width
t
WP1
50 60 70 80 ns
Data setup time
t
DS
30 30 35 40 ns
Data hold time
t
DH
0000ns
Write disable to output in Low-Z
t
LZWE
5555ns4,6
Write Enable to output in High-Z
t
HZWE
25 25 30 30 ns 4,6
-100
DESCRIPTION -55 -70 -85
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
AC TEST CONDITIONS
Input pulse levels ................................... Vss to 3.0V
Input rise and fall times ....................................... 3ns
Input timing reference levels ............................. 1.5V
Output reference levels ..................................... 1.5V
Output load ......................................... See Figures 1
NOTES
1 . Overshoot: Vcc +3.0V for pulse width < 20ms.
2 . Undershoot: -3V for pulse width < 20ms.
3. ICC is dependent on output loading and cycle rates.
4. This parameter is guaranteed but not tested.
5. Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
6. At any given temperature and voltage condition,
tHZCE is less than tLZCE, and tHZWE is less than
tLZWE.
7 . WE\ is HIGH for READ cycle.
8. Device is continuously selected. Chip enables and
output enables are held in their active state.
9 . Address valid prior to, or coincident with, latest
occurring chip enable.
10. tRC = Read Cycle Time.
1 1. Chip enable and write enable can initiate and
terminate a WRITE cycle.
1 2. Output enable (OE\) is inactive (HIGH).
1 3 . Output enable (OE\) is active (LOW).
1 4. ASI does not warrant functionality nor reliability of
any product in which the junction temperature
exceeds 150°C. Care should be taken to limit power to
acceptable levels.
15. All voltage referenced to Vss (GND).
Fig. 1 Output Load Equivalent
DATA RETENTION ELECTRICAL CHARACTERISTICS
DESCRIPTION SYMBOL MIN MAX UNITS NOTES
V
CC
for Retention Data V
DR
2V
CE\ > (V
CC
- 0.2V) V
CC
= 2V I
CCDR
100 µA
V
IN
> (V
CC
- 0.2V) V
CC
= 3V I
CCDR
200 µA
Chip Deselect to Data
Retention Time t
CDR
0ns4
Operation Recovery Time t
R
5 m s 4, 10
Data Retention Current
CONDITIONS
167 ohms 1.73V
C=30pF
Q
C = 100pF
50 ohms
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
READ CYCLE NO. 1 1
(Address Controlled, CE\ = OE\ = VIL, WE\ = VIH)
READ CYCLE NO. 2 2
(WE\ = VIH)
LOW VCC DAT A RETENTION WAVEFORM
ADDRESS
tRC
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
12345678901
1
234567890
1
1
234567890
1
1
234567890
1
1
234567890
1
12345678901
12
12
12
12
12
12
12
12
12
12
12
12
tOH tAA
Previous Data Valid Data Valid
DAT A OUT
ADDRESS
tRC
tAA
CE\
123456
123456
123456
123456
12345678901234567890
1
234567890123456789
0
1
234567890123456789
0
12345678901234567890
1234567890123456789012
1
23456789012345678901
2
1
23456789012345678901
2
1234567890123456789012
12345678901234567890
1
234567890123456789
0
1
234567890123456789
0
12345678901234567890
123456789012345678901
1
2345678901234567890
1
1
2345678901234567890
1
123456789012345678901
tCO1
1234567890123
1234567890123
1234567890123
1234567890123
1234567890123
1
234567890123456789
0
1
234567890123456789
0
1
234567890123456789
0
12345678901234567890
1234567890123456789012
1
23456789012345678901
2
1
23456789012345678901
2
1234567890123456789012
123456789
123456789
123456789
123456789
123456789
12345678901234567890
1
234567890123456789
0
1
234567890123456789
0
1
234567890123456789
0
12345678901234567890
123456789012345678901
1
2345678901234567890
1
1
2345678901234567890
1
123456789012345678901
tOE
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234
123
4
123
4
123
4
123
4
1234
12
12
12
12
12
12
12
12
12
12
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234
1
23
4
1
23
4
1
23
4
1
23
4
1234
1
1
1
1
1
12
12
12
12
12
Data ValidHigh-Z
tOH
tHZ
tOHZ
tOLZ
tLZ
OE\
DAT A OUT
12345
1
234
5
1
234
5
1
234
5
12345
Don’t Care
Undefined
12345
1
234
5
1
234
5
1
234
5
1
234
5
12345
tSDR tRDR
Data Retention
VCC
4.5V
2.2V
VDR
GND
CE\ CE\ > Vcc - 0.2V
CE\ Controlled
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
WRITE CYCLE NO. 1
(WE Controlled)
WRITE CYCLE NO. 2
(Write Enabled Controlled)
NOTES: 1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels.
2. At any given temperature adn voltage condition, tHZ (MAX) is less than tLZ (MIN) both for a given device and from device to
device interconnection.
3. A write occurs during the overlap of a low CE\ adn a low WE\. A write begins at the latest transistion among CE\ going Low and
WE\ going Low: A write end at the earliest transistion among CE\ going High and WE\ going High, tWP is measured from the
beginning of write to the end of write.
4. tCW is measured from the CE\ going Low to end of write.
5. tAS is measured from the address valid to the beginning of write.
6. tWR is measure from the end of write to the address change. tWR applied in case a write ends are CE\ or WE\ going High.
ADDRESS
tWC
tCW(4)
CE\
123456789
123456789
123456789
123456789
123456789
123456789012345678901
1
2345678901234567890
1
1
2345678901234567890
1
1
2345678901234567890
1
123456789012345678901
1234567890123456789012
1
23456789012345678901
2
1
23456789012345678901
2
1234567890123456789012
123456
123456
123456
123456
123456
1234567890123456
1
23456789012345
6
1
23456789012345
6
1
23456789012345
6
1234567890123456
12345678901234567
1
234567890123456
7
1
234567890123456
7
12345678901234567
tAW
Data Valid
tWR(6)
tAS(5)
DAT A OUT
1234567
1234567
1234567
1234567
1234567
Data Undefined
tWP(3)
tDW tDH
tWHZ tOW
WE\
DAT A IN
123456789
123456789
123456789
123456789
1234567890123456789012345
1
23456789012345678901234
5
1
23456789012345678901234
5
1234567890123456789012345
12345678901234567890123456
1
234567890123456789012345
6
1
234567890123456789012345
6
12345678901234567890123456
1234567
1234567
1234567
1234567
123456789012345678
1
2345678901234567
8
1
2345678901234567
8
123456789012345678
123456789012345678
1
2345678901234567
8
1
2345678901234567
8
123456789012345678
ADDRESS
tWC
tCW(4)
CE\
tAW
Data Valid
tWR(6)
tAS(5)
DAT A OUT
tWP(3)
tDW tDH
WE\
DAT A IN
High-Z High-Z
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
ASI Case #112 (Package Designator CW)
eb
b1
L
L1
A
MECHANICAL DEFINITION*
D
Pin 1
E
E1 b2
MIN MAX
A 0.089 0.111
b 0.016 0.020
b1 0.045 0.055
b2 0.008 0.012
D 1.585 1.615
E 0.585 0.605
E1 0.590 0.610
e 0.090 0.110
L 0.040 0.060
L1 0.125 0.175
SYMBOL ASI PACKAGE
*All measurements are in inches.
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
ASI Case #502 (Package Designator ECJ)
MECHANICAL DEFINITION*
*All measurements are in inches.
L
E1
A
A1
e
b
D
E
D1
b2 b1
 
 
  
 

  
 
  
 
  
 
 
  
 
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
ASI Case #1002 (Package Designator DG)
MECHANICAL DEFINITION*
*All measurements are in inches.
0.463±0.008
0.400 TYP
0 - 8°
0.006 +0.004/-0.002
0.018 ~ 0.030
0.050 TYP
0.016 ± 0.004
0.037 TYP
0.841 MAX
0.825 ± 0.004
0.002 MIN
0.039 ± 0.004 0.047 MAX 0.004 MAX
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
ORDERING INFORMATION
*A V AILABLE PROCESSES
IT = Industrial T emperature Range -40oC to +85oC
XT = Extended T emperature Range -55oC to +125oC
883C = Full Military Processing -55oC to +125oC
**NOTE: All CSOJ devices, please consult factory. Not all combinations of
operating temperature, speed, data retention and low power are necessarily
available. Please contact the factory for availability of specific part number
combinations.
***NOTE: Plastic devices not available as 883. For XT or 55ns devices,
contact factory.
Device Number Package
Type Speed
ns Process Device Number Package
Type Speed
ns Process
AS5C4009LL CW -55 /* AS5C4009LL ECJ -55 /*
AS5C4009LL CW -70 /* AS5C4009LL ECJ -70 /*
AS5C4009LL CW -85 /* AS5C4009LL ECJ -85 /*
AS5C4009LL CW -100 /* AS5C4009LL ECJ -100 /*
Device Number Package
Type Speed
ns Process
AS5C4009LL DG -55 /*
AS5C4009LL DG -70 /*
AS5C4009LL DG -85 /*
AS5C4009LL DG -100 /*
EXAMPLE: AS5C4009LLDG-55/IT ***
EXAMPLE: AS5C4009LLECJ-55/883C **EXAMPLE: AS5C4009LLCW-55/883C **
SRAM
AS5C4009LL
Austin Semiconductor, Inc.
AS5C4009LL
Rev. 4.0 2/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
ASI TO DSCC PART NUMBER
CROSS REFERENCE
FOR 5962-95613
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
Package Designator CW
ASI Part # SMD Part
AS5C4009CW-120/H 5962-9561301HYA
AS5C4009CW-120L/H 5962-9561315HYA
AS5C4009CW-100/H 5962-9561302HYA
AS5C4009CW-100L/H 5962-9561316HYA
AS5C4009CW-85/H 5962-9561303HYA
AS5C4009CW-85L/H 5962-9561317HYA
AS5C4009CW-70/H 5962-9561304HYA
AS5C4009CW-70L/H 5962-9561318HYA
AS5C4009CW-120/H 5962-9561301HYC
AS5C4009CW-120L/H 5962-9561315HYC
AS5C4009CW-100/H 5962-9561302HYC
AS5C4009CW-100L/H 5962-9561316HYC
AS5C4009CW-85/H 5962-9561303HYC
AS5C4009CW-85L/H 5962-9561317HYC
AS5C4009CW-70/H 5962-9561304HYC
AS5C4009CW-70L/H 5962-9561318HYC