74LVC377 Octal D-type flip-flop with data enable; positive-edge trigger Rev. 05 -- 21 February 2005 Product data sheet 1. General description The 74LVC377 is a low-voltage, Si-gate CMOS device superior to most advanced CMOS compatible TTL families. The 74LVC377 has eight edge-triggered D-type flip-flops with individual inputs (D) and outputs (Q). A common clock input (CP) loads all flip-flops simultaneously when data enable input (E) is LOW. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. Input E must be stable only one set-up time prior to the LOW-to-HIGH transition for predictable operation. 2. Features Wide supply voltage range from 1.2 V to 3.6 V Inputs accept voltages up to 5.5 V CMOS low power consumption Direct interface with TTL levels Output drive capability 50 transmission lines at 125 C Complies with JEDEC standard: JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM EIA/JESD22-A114-B exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V Specified from -40 C to +85 C and from -40 C to +125 C 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 C. Symbol Parameter Conditions Min Typ Max Unit tPHL, tPLH propagation delay CP to VCC = 3.3 V; CL = 50 pF; Qn RL = 500 - 4.6 - ns CI input capacitance - 5.0 - pF fmax maximum clock frequency - 330 - MHz VCC = 3.3 V 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger Table 1: Quick reference data ...continued GND = 0 V; Tamb = 25 C. Symbol Parameter CPD Conditions power dissipation capacitance per flip-flop [1] [2] [1] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs. [2] The condition is VI = GND to VCC. Min Typ Max Unit - 22 - pF 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name Description Version 74LVC377D -40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 74LVC377DB -40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74LVC377PW -40 C to +125 C 5. Functional diagram 11 1 11 3 4 7 8 13 14 17 18 CP D0 Q0 D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 G1 2 5 3 2 2D 6 4 5 9 7 6 8 9 13 12 14 15 17 16 18 19 12 15 16 19 E 1 1C2 mna918 mna919 Fig 1. Logic symbol 9397 750 14589 Product data sheet Fig 2. IEC logic symbol (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 2 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger 6. Pinning information 6.1 Pinning E 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 Q2 6 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 GND 10 11 CP 16 Q6 377 15 Q5 mna917 Fig 3. Pin configuration SO20 and (T)SSOP20 6.2 Pin description Table 3: Pin description Symbol Pin Description E 1 data enable input (active LOW) Q0 2 flip-flop output 0 D0 3 data input 0 D1 4 data input 1 Q1 5 flip-flop output 1 Q2 6 flip-flop output 2 D2 7 data input 2 D3 8 data input 3 Q3 9 flip-flop output 3 GND 10 ground (0 V) CP 11 clock input (LOW-to-HIGH; edge-triggered) Q4 12 flip-flop output 4 D4 13 data input 4 D5 14 data input 5 Q5 15 flip-flop output 5 Q6 16 flip-flop output 6 D6 17 data input 6 D7 18 data input 7 Q7 19 flip-flop output 7 VCC 20 power supply 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 3 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger 7. Functional description 7.1 Function table Function table [1] Table 4: Operating mode Control Input Output CP E Dn Qn Load 1 I h H Load 0 I I L Hold h X no change Do nothing X H X no change [1] H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition; = LOW-to-HIGH CP transition; X = don t care. 8. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Max Unit VCC supply voltage -0.5 +6.5 V VI input voltage [1] -0.5 +5.5 V VO output voltage [1] -0.5 VCC + 0.5 V IIK input diode current VI < 0 V - -50 mA IO output source or sink current VO = 0 V to VCC - 50 mA IOK output diode current VO > VCC or VO < 0 V - 50 mA ICC, IGND VCC or GND current - 100 mA Tstg storage temperature -65 +150 C - 500 mW Ptot total power dissipation Tamb = -40 C to +125 C [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO20 packages: above 70 C derate linearly with 8 mW/K. For (T)SSOP20 packages: above 60 C derate linearly with 5.5 mW/K. 9397 750 14589 Product data sheet Min (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 4 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger 9. Recommended operating conditions Table 6: Recommended operating conditions Symbol Parameter VCC supply voltage Conditions Min Typ Max Unit maximum speed performance 2.7 - 3.6 V low-voltage applications 1.2 - 3.6 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature in free air -40 - +125 C tr, tf input rise and fall times VCC = 1.2 V to 2.7 V 0 - 20 ns/V VCC = 2.7 V to 3.6 V 0 - 10 ns/V 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0V). Symbol Parameter Tamb = -40 C to +85 VIH VIL VOH VOL Conditions Min Typ Max Unit C [1] HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 1.2 V VCC - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 1.2 V - - GND V VCC = 2.7 V to 3.6 V - - 0.8 V IO = -100 A; VCC = 2.7 V to 3.6 V VCC - 0.2 VCC - V IO = -12 mA; VCC = 2.7 V VCC - 0.5 - - V IO = -18 mA; VCC = 3.0 V VCC - 0.6 - - V IO = -24 mA; VCC = 3.0 V VCC - 0.8 - - V IO = 100 A; VCC = 2.7 V to 3.6 V - - 0.2 V IO = 12 mA; VCC = 2.7 V - - 0.4 V VI = VIH or VIL VI = VIH or VIL - - 0.55 V ILI input leakage current VCC = 3.6 V; VI = 5.5 V or GND IO = 24 mA; VCC = 3.0 V - 0.1 5 A ICC quiescent supply current VCC = 3.6 V; VI = VCC or GND; IO = 0 A - 0.1 10 A ICC additional quiescent supply VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V; current IO = 0 A - 5 500 A CI input capacitance - 5.0 - pF Tamb = -40 C to +125 C VIH VIL HIGH-level input voltage LOW-level input voltage VCC = 1.2 V VCC - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 1.2 V - - GND V VCC = 2.7 V to 3.6 V - - 0.8 V 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 5 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger Table 7: Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0V). Symbol Parameter Conditions VOH VI = VIH or VIL HIGH-level output voltage LOW-level output voltage VOL Min Typ Max Unit IO = -100 A; VCC = 2.7 V to 3.6 V VCC - 0.3 VCC - V IO = -12 mA; VCC = 2.7 V VCC - 0.65 - - V IO = -18 mA; VCC = 3.0 V VCC - 0.75 - - V IO = -24 mA; VCC = 3.0 V VCC - 1 - - V IO = 100 A; VCC = 2.7 V to 3.6 V - - 0.3 V IO = 12 mA; VCC = 2.7 V - - 0.6 V IO = 24 mA; VCC = 3.0 V - - 0.8 V VI = VIH or VIL ILI input leakage current VCC = 3.6 V; VI = 5.5 V or GND - - 20 A ICC quiescent supply current VCC = 3.6 V; VI = VCC or GND; IO = 0 A - - 40 A ICC additional quiescent supply VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V; current IO = 0 A - - 5 mA Min Typ Max Unit - 15.0 - ns 1.5 4.9 7.9 ns 1.5 4.6 7.6 ns - - - ns 5.0 1.6 - ns 4 1.0 - ns [1] All typical values are measured at VCC = 3.3 V and Tamb = 25 C. 11. Dynamic characteristics Table 8: Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter Conditions Tamb = -40 C to +85 C [1] tPHL, tPLH propagation delay CP to Qn see Figure 4 VCC= 1.2 V VCC = 2.7 V VCC = 3.0 V to 3.6 V tW clock pulse width HIGH or LOW [2] see Figure 4 VCC= 1.2 V VCC = 2.7 V VCC = 3.0 V to 3.6 V tsu [2] set-up time E to CP see Figure 5 VCC = 1.2 V - - ns VCC = 2.7 V 5.0 0.6 - ns 3 0.2 - ns VCC = 3.0 V to 3.6 V Dn to CP see Figure 5 VCC = 1.2 V - - - ns VCC = 2.7 V 3.0 1.0 - ns 2.0 0.7 - ns VCC = 3.0 V to 3.6 V 9397 750 14589 Product data sheet [2] [2] (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 6 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger Table 8: Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter th Conditions Dn to CP Unit VCC = 1.2 V - - - ns VCC = 2.7 V 0 -1.0 - ns 1.0 0 - ns maximum clock frequency skew [2] see Figure 5 VCC = 1.2 V - - - ns VCC = 2.7 V 0 -1.1 - ns VCC = 3.0 V to 3.6 V 0 -1.0 - ns see Figure 4 VCC = 1.2 V - - - MHz VCC = 2.7 V 150 - - MHz [2] 150 330 - MHz [3] - - 1.0 ns [4] [5] - 22 - pF VCC = 3.0 V to 3.6 V CPD Max see Figure 5 VCC = 3.0 V to 3.6 V tsk(0) Typ hold time E to CP E to CP fmax Min VCC = 3.0 V to 3.6 V power dissipation capacitance per flip-flop Tamb = -40 C to +125 C tPHL, tPLH tW tsu propagation delay CP to Qn clock pulse width HIGH or LOW see Figure 4 VCC= 1.2 V - - - ns VCC = 2.7 V 1.5 - 10 ns VCC = 3.0 V to 3.6 V 1.5 - 9.5 ns see Figure 4 VCC= 1.2 V - - - ns VCC = 2.7 V 5.0 - - ns VCC = 3.0 V to 3.6 V 4.0 - - ns - ns set-up time E to CP Dn to CP see Figure 5 VCC = 1.2 V - VCC = 2.7 V 5.0 - - ns VCC = 3.0 V to 3.6 V 3.0 - - ns VCC = 1.2 V - - - ns VCC = 2.7 V 3.0 - - ns VCC = 3.0 V to 3.6 V 2.0 - - ns see Figure 5 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 7 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger Table 8: Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter th Conditions Min Typ Max Unit hold time E to CP E to CP Dn to CP maximum clock frequency fmax see Figure 5 VCC = 1.2 V - - - ns VCC = 2.7 V 0 - - ns VCC = 3.0 V to 3.6 V 1.0 - - ns see Figure 5 VCC = 1.2 V - - - ns VCC = 2.7 V 0 - - ns VCC = 3.0 V to 3.6 V 0 - - ns see Figure 4 VCC = 1.2 V - - - MHz VCC = 2.7 V 150 - - MHz 150 - - MHz - - 1.5 ns VCC = 3.0 V to 3.6 V tsk(0) skew VCC = 3.0 V to 3.6 V [3] [1] Typical values are measured at Tamb = 25 C. [2] Typical value is measured at VCC = 3.3 V. [3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. [4] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs. [5] The condition is VI = GND to VCC. 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 8 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger 12. Waveforms 1/f max VI CP input VM GND tW t PHL t PLH VOH VM Qn output VOL mna894 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 4. Propagation delay clock (CP) to output (Qn), pulse width clock (CP) and maximum clock pulse frequency tW VCC VM CP input GND tsu VCC tsu tsu VM E input GND th th VCC VM Dn input GND mna921 Measurement points are given in Table 9. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 5. Data set-up and hold times of data input (Dn) and enable input (E) and pulse width of enable input (E) Table 9: Measurement points Supply voltage Input Output VCC VM VM 1.2 V 0.5 x VCC 0.5 x VCC 2.7 V 1.5 V 1.5 V 3.0 V to 3.6 V 1.5 V 1.5 V 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 9 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger VEXT VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL mna616 Test data is given in Table 10. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistor. VEXT = Test voltage for switching times. Fig 6. Load circuitry for switching times Table 10: Test data Supply voltage Input VCC VI Load tr, tf RL tPLH, tPHL 1.2 V VCC 2.5 ns 50 pF 500 2.7 V 2.7 V 2.5 ns 50 pF 500 open 3.0 V to 3.6 V 2.7 V 2.5 ns 50 pF 500 open [1] [1] open The circuit performs better when RL = 1000 . 9397 750 14589 Product data sheet CL VEXT (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 10 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger 13. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index Lp L 10 1 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 7. Package outline SOT163-1 (SO20) 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 11 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index Lp L 1 10 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8 o 0 o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 REFERENCES IEC JEDEC JEITA MO-150 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 8. Package outline SOT339-1 (SSOP20) 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 12 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A Lp L 1 10 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 9. Package outline SOT360-1 (TSSOP20) 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 13 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger 14. Revision history Table 11: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes 74LVC377_5 20050221 Product data sheet - 9397 750 14589 74LVC377_4 Modifications: * The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. * Table 8 "Dynamic characteristics": changed maximum values of propagation delay tPHL and tPLH at Tamb = -40 C to +125 C and 2.7 V from 7.9 ns into 10.0 ns and at 3.0 V to 3.6 V from 7.6 ns into 9.5 ns. 74LVC377_4 20040528 Product specification - 9397 750 10615 74LVC377_3 74LVC377_3 20021023 Product specification - 9397 750 10513 74LVC377_2 74LVC377_2 19980729 Product specification - 9397 750 04508 74LVC377_1 74LVC377_1 19960606 Product specification - - - 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 14 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger 15. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 16. Definitions 17. Disclaimers Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 18. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 14589 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 -- 21 February 2005 15 of 16 74LVC377 Philips Semiconductors Octal D-type flip-flop with data enable; positive-edge trigger 19. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information . . . . . . . . . . . . . . . . . . . . 15 (c) Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 21 February 2005 Document number: 9397 750 14589 Published in The Netherlands