1
FEATURES
1
2
3
4
8
7
6
5
GND
TRIG
OUT
RESET
VCC
DISCH
THRES
CONT
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
NC
DISCH
NC
THRES
NC
NC
TRIG
NC
OUT
NC
NC
GND
NC
CONT
NC VCC
NC
NC
RESET
NC
NC – No internal connection
NA555...D OR P PACKAGE
NE555...D, P, PS, OR PW PACKAGE
SA555...D OR P PACKAGE
SE555...D, JG, OR P PACKAGE
(TOP VIEW)
SE555...FK PACKAGE
(TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008www.ti.com
•Timing From Microseconds to Hours •Adjustable Duty Cycle•Astable or Monostable Operation •TTL-Compatible Output Can Sink or Source upto 200 mA
These devices are precision timing circuits capable of producing accurate time delays or oscillation. In thetime-delay or monostable mode of operation, the timed interval is controlled by a single external resistor andcapacitor network. In the astable mode of operation, the frequency and duty cycle can be controlledindependently with two external resistors and a single external capacitor.
The threshold and trigger levels normally are two-thirds and one-third, respectively, of V
CC
. These levels can bealtered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop isset, and the output goes high. If the trigger input is above the trigger level and the threshold input is above thethreshold level, the flip-flop is reset and the output is low. The reset (RESET) input can override all other inputsand can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset, and the output goeslow. When the output is low, a low-impedance path is provided between discharge (DISCH) and ground.
The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1973 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters areInstruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, productionnecessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
www.ti.com
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
ORDERING INFORMATION
(1)
V
THRES
MAXT
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKINGV
CC
= 15 V
PDIP – P Tube of 50 NE555P NE555PTube of 75 NE555DSOIC – D NE555Reel of 2500 NE555DR0°C to 70 °C 11.2 V
SOP – PS Reel of 2000 NE555PSR N555Tube of 150 NE555PWTSSOP – PW N555Reel of 2000 NE555PWRPDIP – P Tube of 50 SA555P SA555P– 40 °C to 85 °C 11.2 V Tube of 75 SA555DSOIC – D SA555Reel of 2000 SA555DRPDIP – P Tube of 50 NA555P NA555P– 40 °C to 105 °C 11.2 V Tube of 75 NA555DSOIC – D NA555Reel of 2000 NA555DRPDIP – P Tube of 50 SE555P SE555PTube of 75 SE555DSOIC – D SE555D– 55 °C to 125 °C 10.6 Reel of 2500 SE555DRCDIP – JG Tube of 50 SE555JG SE555JGLCCC – FK Tube of 55 SE555FK SE555FK
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
FUNCTION TABLE
TRIGGER THRESHOLD DISCHARGERESET OUTPUTVOLTAGE
(1)
VOLTAGE
(1)
SWITCH
Low Irrelevant Irrelevant Low OnHigh <1/3 V
CC
Irrelevant High OffHigh >1/3 V
CC
>2/3 V
CC
Low OnHigh >1/3 V
CC
<2/3 V
CC
As previously established
(1) Voltage levels shown are nominal.
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1
S
R
R1
TRIG
THRES
VCC
CONT
RESET
OUT
DISCH
GND
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
4
8
5
6
2
1
7
3
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
FUNCTIONAL BLOCK DIAGRAM
A. Pin numbers shown are for the D, JG, P, PS, and PW packages.B. RESET can override TRIG, which can override THRES.
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Absolute Maximum Ratings
(1)
Recommended Operating Conditions
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage
(2)
18 VV
I
Input voltage CONT, RESET, THRES, TRIG V
CC
VI
O
Output current ± 225 mAD package 97P package 85θ
JA
Package thermal impedance
(3) (4)
°C/WPS package 95PW package 149FK package 5.61θ
JC
Package thermal impedance
(5) (6)
°C/WJG package 14.5T
J
Operating virtual junction temperature 150 °CCase temperature for 60 s FK package 260 °CLead temperature 1, 6 mm (1/16 in) from case for 60 s JG package 300 °CT
stg
Storage temperature range – 65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltage values are with respect to GND.(3) Maximum power dissipation is a function of T
J
(max), θ
JA
, and T
A
. The maximum allowable power dissipation at any allowable ambienttemperature is P
D
= (T
J
(max) - T
A
)/ θ
JA.
Operating at the absolute maximum T
J
of 150 °C can affect reliability.(4) The package thermal impedance is calculated in accordance with JESD 51-7.(5) Maximum power dissipation is a function of T
J
(max), θ
JC
, and T
C
. The maximum allowable power dissipation at any allowable casetemperature is P
D
= (T
J
(max) - T
C
)/ θ
JC
. Operating at the absolute maximum T
J
of 150 °C can affect reliability.(6) The package thermal impedance is calculated in accordance with MIL-STD-883.
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
NA555, NE555, SA555 4.5 16V
CC
Supply voltage VSE555 4.5 18V
I
Input voltage CONT, RESET, THRES, and TRIG V
CC
VI
O
Output current ± 200 mANA555 – 40 105NE555 0 70T
A
Operating free-air temperature °CSA555 – 40 85SE555 – 55 125
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Electrical Characteristics
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
V
CC
= 5 V to 15 V, T
A
= 25 °C (unless otherwise noted)
NA555SE555 NE555PARAMETER TEST CONDITIONS UNITSA555
MIN TYP MAX MIN TYP MAX
V
CC
= 15 V 9.4 10 10.6 8.8 10 11.2THRES voltage level VV
CC
= 5 V 2.7 3.3 4 2.4 3.3 4.2THRES current
(1)
30 250 30 250 nA4.8 5 5.2 4.5 5 5.6V
CC
= 15 V
T
A
= – 55 °C to 125 °C 3 6TRIG voltage level V1.45 1.67 1.9 1.1 1.67 2.2V
CC
= 5 V
T
A
= – 55 °C to 125 °C 1.9TRIG current TRIG at 0 V 0.5 0.9 0.5 2 µA0.3 0.7 1 0.3 0.7 1RESET voltage level VT
A
= – 55 °C to 125 °C 1.1RESET at V
CC
0.1 0.4 0.1 0.4RESET current mARESET at 0 V – 0.4 – 1 – 0.4 – 1.5DISCH switch off-state
20 100 20 100 nAcurrent
9.6 10 10.4 9 10 11V
CC
= 15 V
T
A
= – 55 °C to 125 °C 9.6 10.4CONT voltage
V(open circuit)
2.9 3.3 3.8 2.6 3.3 4V
CC
= 5 V
T
A
= – 55 °C to 125 °C 2.9 3.80.1 0.15 0.1 0.25V
CC
= 15 V, I
OL
= 10 mA
T
A
= – 55 °C to 125 °C 0.20.4 0.5 0.4 0.75V
CC
= 15 V, I
OL
= 50 mA
T
A
= – 55 °C to 125 °C 12 2.2 2 2.5V
CC
= 15 V, I
OL
= 100 mALow-level output voltage T
A
= – 55 °C to 125 °C 2.7 VV
CC
= 15 V, I
OL
= 200 mA 2.5 2.5V
CC
= 5 V, I
OL
= 3.5 mA T
A
= – 55 °C to 125 °C 0.350.1 0.2 0.1 0.35V
CC
= 5 V, I
OL
= 5 mA
T
A
= – 55 °C to 125 °C 0.8V
CC
= 5 V, I
OL
= 8 mA 0.15 0.25 0.15 0.413 13.3 12.75 13.3V
CC
= 15 V, I
OL
= – 100 mA
T
A
= – 55 °C to 125 °C 12High-level output voltage V
CC
= 15 V, I
OH
= – 200 mA 12.5 12.5 V3 3.3 2.75 3.3V
CC
= 15 V, I
OL
= – 100 mA
T
A
= – 55 °C to 125 °C 2V
CC
= 15 V 10 12 10 15Output low, No load
V
CC
= 5 V 3 5 3 6Supply current mAV
CC
= 15 V 9 10 9 13Output high, No load
V
CC
= 5 V 2 4 2 5
(1) This parameter influences the maximum value of the timing resistors R
A
and R
B
in the circuit of Figure 12 . For example,when V
CC
= 5 V, the maximum value is R = R
A
+ R
B
≈3.4 M Ω, and for V
CC
= 15 V, the maximum value is 10 M Ω.
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Operating Characteristics
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
V
CC
= 5 V to 15 V, T
A
= 25 °C (unless otherwise noted)
NA555SE555 NE555TESTPARAMETER UNITSA555CONDITIONS
(1)
MIN TYP MAX MIN TYP MAX
Each timer, monostable
(3)
T
A
= 25 °C 0.5 1.5
(4)
1 3Initial error of timing
%interval
(2)
Each timer, astable
(5)
1.5 2.25Each timer, monostable
(3)
T
A
= MIN to MAX 30 100
(4)
50Temperature coefficient of ppm/timing interval °CEach timer, astable
(5)
90 150Each timer, monostable
(3)
T
A
= 25 °C 0.05 0.2
(4)
0.1 0.5Supply-voltage sensitivity of
%/Vtiming interval
Each timer, astable
(5)
0.15 0.3C
L
= 15 pF,Output-pulse rise time 100 200
(4)
100 300 nsT
A
= 25 °CC
L
= 15 pF,Output-pulse fall time 100 200
(4)
100 300 nsT
A
= 25 °C
(1) For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.(2) Timing interval error is defined as the difference between the measured value and the average value of a random sample from eachprocess run.(3) Values specified are for a device in a monostable circuit similar to Figure 9 , with the following component values: R
A
= 2 k Ωto 100 k Ω,C = 0.1 µF.(4) On products compliant to MIL-PRF-38535, this parameter is not production tested.(5) Values specified are for a device in an astable circuit similar to Figure 12 , with the following component values: R
A
= 1 k Ωto 100 k Ω,C = 0.1 µF.
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TYPICAL CHARACTERISTICS
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
TA = 125°C
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
TA = 25°C
IOL − Low-Level Output Current − mA
VCC = 5 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
TA = −55°C
0.1
0.04
0.01 1 2 4 7 10 20 40 70 100
0.07
1
0.4
0.7
10
4
7
0.02
0.2
2
− Low-Level Output Voltage − VVOL
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC = 10 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
− Low-Level Output Voltage − VVOL
IOL − Low-Level Output Current − mA
0.1
0.04
0.01 1 2 4 7 10 20 40 70 100
0.07
1
0.4
0.7
10
4
7
0.02
0.2
2
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
TA = 125°C
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
TA = 25°C
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
TA= −55°C
TA = 125°C
TA = 25°C
TA = −55°C
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
VCC = 15 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
− Low-Level Output Voltage − VVOL
IOL − Low-Level Output Current − mA
0.1
0.04
0.01 1 2 4 7 10 20 40 70 100
0.07
1
0.4
0.7
10
4
7
0.02
0.2
2
1
0.6
0.2
0
1.4
1.8
2.0
0.4
1.6
0.8
1.2
−
IOH − High-Level Output Current − mA
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
TA = 125°C
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
TA = 25°C
100704020107421
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
VCC = 5 V to 15 V
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
TA = −55°C
VCC VOH − V oltage Drop − V
)
(
DROP BETWEEN SUPPLY VOLTAGE AND OUTPUT
vs
HIGH-LEVEL OUTPUT CURRENT
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
Data for temperatures below 0 °C and above 70 °C are applicable for SE555 circuits only.
Figure 1. Figure 2.
Figure 3. Figure 4.
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5
4
2
1
0
9
3
5 6 7 8 9 10 11
− Supply Current − mA
7
6
8
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
10
12 13 14 15
TA = 25°C
TA = 125°C
TA = −55°C
Output Low,
No Load
CC
I
VCC − Supply Voltage − V
1
0.995
0.990
0.9850 5 10
1.005
1.010
NORMALIZED OUTPUT PULSE DURATION
(MONOSTABLE OPERATION)
vs
SUPPLY VOLTAGE
1.015
15 20
CC
VPulse Duration Relative to Value at = 10 V
VCC − Supply Voltage − V
1
0.995
0.990
0.985
−75 −25 25
1.005
1.010
NORMALIZED OUTPUT PULSE DURATION
(MONOSTABLE OPERATION)
vs
FREE-AIR TEMPERATURE
1.015
75 125
TA − Free-Air Temperature − °C
−50 0 50 100
VCC = 10 V
Pulse Duration Relative to Value at TA = 255C
0
100
200
300
400
500
600
700
800
900
1000
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
Lowest Level of Trigger Pulse – ×VCC
tPD – Propagation Delay Time – ns
TA= 125°C
TA= 70°C
TA= 25°C
TA= 0°C
TA= –55°C
PROPAGATION DELAY TIME
vs
LOWEST VOLTAGE LEVEL
OF TRIGGER PULSE
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS (continued)Data for temperatures below 0 °C and above 70 °C are applicable for SE555 circuits only.
Figure 5. Figure 6.
Figure 7. Figure 8.
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APPLICATION INFORMATION
Monostable Operation
VCC
(5 V to 15 V)
RARL
Output
GND
OUT
VCC
CONT
RESET
DISCH
THRES
TRIGInput
Î
Î
Î
58
4
7
6
2
3
1
Pin numbers shown are for the D, JG, P, PS, and PW packages.
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
For monostable operation, any of these timers can be connected as shown in Figure 9 . If the output is low,application of a negative-going pulse to the trigger (TRIG) sets the flip-flop ( Q goes low), drives the output high,and turns off Q1. Capacitor C then is charged through R
A
until the voltage across the capacitor reaches thethreshold voltage of the threshold (THRES) input. If TRIG has returned to a high level, the output of the thresholdcomparator resets the flip-flop ( Q goes high), drives the output low, and discharges C through Q1.
Figure 9. Circuit for Monostable Operation
Monostable operation is initiated when TRIG voltage falls below the trigger threshold. Once initiated, thesequence ends only if TRIG is high at the end of the timing interval. Because of the threshold level andsaturation voltage of Q1, the output pulse duration is approximately t
w
= 1.1R
A
C. Figure 11 is a plot of the timeconstant for various values of R
A
and C. The threshold levels and charge rates both are directly proportional tothe supply voltage, V
CC
. The timing interval is, therefore, independent of the supply voltage, so long as thesupply voltage is constant during the time interval.
Applying a negative-going trigger pulse simultaneously to RESET and TRIG during the timing interval dischargesC and reinitiates the cycle, commencing on the positive edge of the reset pulse. The output is held low as longas the reset pulse is low. To prevent false triggering, when RESET is not used, it should be connected to V
CC
.
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− Output Pulse Duration − s
C − Capacitance − µF
10
1
10−1
10−2
10−3
10−4
1001010.10.01
10−5
0.001
tw
RA = 10 MΩ
RA = 10 kΩ
RA = 1 kΩ
RA = 100 kΩ
RA = 1 MΩ
Voltage − 2 V/div
Time − 0.1 ms/div
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
Capacitor Voltage
Output Voltage
Input Voltage
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
RA = 9.1 kΩ
CL = 0.01 µF
RL = 1 kΩ
See Figure 9
Astable Operation
Voltage − 1 V/div
Time − 0.5 ms/div
tH
Capacitor Voltage
Output Voltage
tL
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
RA = 5 kW RL = 1 kW
RB = 3 kW See Figure 12
C = 0.15 µF
GND
OUT
VCC
CONT
RESET
DISCH
THRES
TRIG
C
RB
RA
Output
RL
0.01 µF
VCC
(5 V to 15 V)
(see Note A)
Î
Î
Î
NOTE A: Decoupling CONT voltage to ground with a capacitor can
improve operation. This should be evaluated for individual
applications.
Open
5 8
4
7
6
2
3
1
Pin numbers shown are for the D, JG, P, PS, and PW packages.
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
Figure 10. Typical Monostable Waveforms Figure 11. Output Pulse Duration vs Capacitance
As shown in Figure 12 , adding a second resistor, R
B
, to the circuit of Figure 9 and connecting the trigger input tothe threshold input causes the timer to self-trigger and run as a multivibrator. The capacitor C charges throughR
A
and R
B
and then discharges through R
B
only. Therefore, the duty cycle is controlled by the values of R
A
andR
B
.
This astable connection results in capacitor C charging and discharging between the threshold-voltage level(≈0.67 ×V
CC
) and the trigger-voltage level ( ≈0.33 ×V
CC
). As in the monostable circuit, charge and dischargetimes (and, therefore, the frequency and duty cycle) are independent of the supply voltage.
Figure 12. Circuit for Astable Operation Figure 13. Typical Astable Waveforms
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tH+0.693 (RA)RB) C
tL+0.693 (RB) C
Other useful relationships are shown below.
period +tH)tL+0.693 (RA)2RB) C
frequency [1.44
(RA)2RB) C
Output driver duty cycle +tL
tH)tL+RB
RA)2RB
Output waveform duty cycle
+tL
tH+RB
RA)RB
Low-to-high ratio
+tH
tH)tL+1– RB
RA)2RB
f − Free-Running Frequency − Hz
C − Capacitance − µF
100 k
10 k
1 k
100
10
1
1001010.10.01
0.1
0.001
RA + 2 RB = 10 MΩ
RA + 2 RB = 1 MΩ
RA + 2 RB = 100 kΩ
RA + 2 RB = 10 kΩ
RA + 2 RB = 1 kΩ
Missing-Pulse Detector
Time − 0.1 ms/div
Voltage − 2 V/div
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
VCC = 5 V
RA = 1 kΩ
C = 0.1 µF
See Figure 15
Capacitor Voltage
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
Output Voltage
Input Voltage
VCC (5 V to 15 V)
DISCH
OUT
VCC
RESET
RLRA
A5T3644
C
THRES
GND
CONT
TRIG
Input
0.01 µF
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Output
4 8
3
7
6
2
5
1
Pin numbers shown are shown for the D, JG, P, PS, and PW packages.
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
Figure 12 shows typical waveforms generated during astable operation. The output high-level duration t
H
andlow-level duration t
L
can be calculated as follows:
Figure 14. Free-Running Frequency
The circuit shown in Figure 15 can be used to detect a missing pulse or abnormally long spacing betweenconsecutive pulses in a train of pulses. The timing interval of the monostable circuit is retriggered continuously bythe input pulse train as long as the pulse spacing is less than the timing interval. A longer pulse spacing, missingpulse, or terminated pulse train permits the timing interval to be completed, thereby generating an output pulseas shown in Figure 16 .
Figure 15. Circuit for Missing-Pulse Detector Figure 16. Completed Timing Waveforms forMissing-Pulse Detector
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Frequency Divider
Voltage − 2 V/div
Time − 0.1 ms/div
Capacitor Voltage
Output Voltage
Input Voltage
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC = 5 V
RA = 1250 Ω
C = 0.02 µF
See Figure 9
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
By adjusting the length of the timing cycle, the basic circuit of Figure 9 can be made to operate as a frequencydivider. Figure 17 shows a divide-by-three circuit that makes use of the fact that retriggering cannot occur duringthe timing cycle.
Figure 17. Divide-by-Three Circuit Waveforms
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Pulse-Width Modulation
THRES
GND C
RA
RL
VCC (5 V to 15 V)
Output
DISCH
OUT
VCC
RESET
TRIG
CONT
Modulation
Input
(see Note A)
Clock
Input
NOTE A: The modulating signal can be direct or capacitively coupled
to CONT. For direct coupling, the effects of modulation source
voltage and impedance on the bias of the timer should be
considered.
4 8
3
7
6
2
5
Pin numbers shown are for the D, JG, P, PS, and PW packages.
1
Voltage − 2 V/div
Time − 0.5 ms/div
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
Capacitor Voltage
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
Output Voltage
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
Clock Input Voltage
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
RA = 3 kΩ
C = 0.02 µF
RL = 1 kΩ
See Figure 18
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
Modulation Input Voltage
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
The operation of the timer can be modified by modulating the internal threshold and trigger voltages, which isaccomplished by applying an external voltage (or current) to CONT. Figure 18 shows a circuit for pulse-widthmodulation. A continuous input pulse train triggers the monostable circuit, and a control signal modulates thethreshold voltage. Figure 19 shows the resulting output pulse-width modulation. While a sine-wave modulationsignal is shown, any wave shape could be used.
Figure 18. Circuit for Pulse-Width Modulation Figure 19. Pulse-Width-Modulation Waveforms
Copyright © 1973 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): NA555 NE555 SA555 SE555
www.ti.com
Pulse-Position Modulation
Voltage − 2 V/div
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
RA = 3 kΩ
RB = 500 Ω
RL = 1 kΩ
See Figure 20
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
Capacitor Voltage
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
Output Voltage
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
Modulation Input Voltage
Time − 0.1 ms/div
RB
Modulation
Input
(see Note A) CONT
TRIG
RESET VCC
OUT
DISCH
VCC (5 V to 15 V)
RLRA
C
GND
THRES
NOTE A: The modulating signal can be direct or capacitively coupled
to CONT. For direct coupling, the effects of modulation
source voltage and impedance on the bias of the timer
should be considered.
Pin numbers shown are for the D, JG, P, PS, and PW packages.
4 8
3
7
6
2
5
Output
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
As shown in Figure 20 , any of these timers can be used as a pulse-position modulator. This applicationmodulates the threshold voltage and, thereby, the time delay, of a free-running oscillator. Figure 21 shows atriangular-wave modulation signal for such a circuit; however, any wave shape could be used.
Figure 20. Circuit for Pulse-Position Modulation Figure 21. Pulse-Position-Modulation Waveforms
14 Submit Documentation Feedback Copyright © 1973 – 2008, Texas Instruments Incorporated
Product Folder Link(s): NA555 NE555 SA555 SE555
www.ti.com
Sequential Timer
S
VCC
RESET VCC
OUT
DISCH
GND
CONT
TRIG
4 8
3
7
6
1
5
2
THRES
RC
CC
0.01
CC = 14.7 µF
RC = 100 kΩOutput C
RESET VCC
OUT
DISCH
GND
CONT
TRIG
4 8
3
7
6
1
5
2
THRES
RB33 kΩ
0.001
0.01
µF
CB = 4.7 µF
RB = 100 kΩ
Output BOutput A
RA = 100 kΩ
CA = 10 µF
µF
0.01
µF
0.001
33 kΩ
RA
THRES
2
5
1
6
7
3
84
TRIG
CONT
GND
DISCH
OUT
VCC
RESET
µF
µF
CB
CA
Pin numbers shown are for the D, JG, P, PS, and PW packages.
NOTE A: S closes momentarily at t = 0.
Voltage − 5 V/div
t − Time − 1 s/div
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
See Figure 22
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
Output A
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
Output B
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
Output C
ÏÏÏ
ÏÏÏ
ÏÏÏ
ÏÏÏ
t = 0
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
twC = 1.1 RCCC
ÏÏ
ÏÏ
ÏÏ
twC
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
twB = 1.1 RBCB
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
twA = 1.1 RACA
ÏÏÏ
ÏÏÏ
ÏÏÏ
ÏÏÏ
twA
ÏÏÏ
ÏÏÏ
ÏÏÏ
ÏÏÏ
twB
NA555 , NE555 , SA555 , SE555PRECISION TIMERS
SLFS022G – SEPTEMBER 1973 – REVISED MARCH 2008
Many applications, such as computers, require signals for initializing conditions during start-up. Otherapplications, such as test equipment, require activation of test signals in sequence. These timing circuits can beconnected to provide such sequential control. The timers can be used in various combinations of astable ormonostable circuit connections, with or without modulation, for extremely flexible waveform control. Figure 22shows a sequencer circuit with possible applications in many systems, and Figure 23 shows the outputwaveforms.
Figure 22. Sequential Timer Circuit
Figure 23. Sequential Timer Waveforms
Copyright © 1973 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): NA555 NE555 SA555 SE555
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
JM38510/10901BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
NA555D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NA555DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NA555DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NA555DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NA555P ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
NA555PE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
NE555D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555DE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555DRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555P ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
NE555PE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
NE555PSLE OBSOLETE SO PS 8 TBD Call TI Call TI
NE555PSR ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555PSRE4 ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555PSRG4 ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555PW ACTIVE TSSOP PW 8 150 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555PWE4 ACTIVE TSSOP PW 8 150 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555PWG4 ACTIVE TSSOP PW 8 150 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555PWR ACTIVE TSSOP PW 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555PWRE4 ACTIVE TSSOP PW 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555PWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
NE555Y OBSOLETE 0 TBD Call TI Call TI
PACKAGE OPTION ADDENDUM
www.ti.com 8-Jan-2010
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SA555D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SA555DE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SA555DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SA555DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SA555DRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SA555DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SA555P ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SA555PE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SE555D ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
SE555DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SE555DR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
SE555DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SE555FKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SE555JG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SE555JGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SE555N OBSOLETE PDIP N 8 TBD Call TI Call TI
SE555P ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
PACKAGE OPTION ADDENDUM
www.ti.com 8-Jan-2010
Addendum-Page 2
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Jan-2010
Addendum-Page 3
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
NA555DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
NA555DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
NE555DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
NE555DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
NE555PSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
NE555PWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
SA555DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
NA555DR SOIC D 8 2500 340.5 338.1 20.6
NA555DR SOIC D 8 2500 346.0 346.0 29.0
NE555DR SOIC D 8 2500 346.0 346.0 29.0
NE555DR SOIC D 8 2500 340.5 338.1 20.6
NE555PSR SO PS 8 2000 346.0 346.0 33.0
NE555PWR TSSOP PW 8 2000 346.0 346.0 29.0
SA555DR SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
80,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
MECHANICAL DATA
MLCC006B – OCTOBER 1996
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
4040140/D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MINMAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
12
1314151618 17
11
10
8
9
7
5
432
0.020 (0,51)
0.010 (0,25)
6
12826 27
19
21
B SQ
A SQ 22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE
8
4
0.015 (0,38)
Gage Plane
0.325 (8,26)
0.300 (7,62)
0.010 (0,25) NOM
MAX
0.430 (10,92)
4040082/D 05/98
0.200 (5,08) MAX
0.125 (3,18) MIN
5
0.355 (9,02)
0.020 (0,51) MIN
0.070 (1,78) MAX
0.240 (6,10)
0.260 (6,60)
0.400 (10,60)
1
0.015 (0,38)
0.021 (0,53)
Seating Plane
M
0.010 (0,25)
0.100 (2,54)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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