NTE937M
Integrated Circuit
JFET Input Operational Amplifier
Description:
The NTE937M is a monolithic JFET input operational amplifier in an 8–Lead DIP type package incor-
porating well–matched, high voltage JFET’s on the same chip with standard bi–polar transistors. This
amplifier features low input bias and offset currents, low offset voltage and of fset voltage drift, coupled
with offset adjust which does not degrade drift or common–mode rejection. It is also designed for high
slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f
noise corner.
Advantages:
DReplaces Expensive Hybrid and Module FET OP Amps
DRugged JFET’s Allow Blow–Out Free Handling Compared with MOSFET Input Device
DExcellent for Low Noise Applications using either High or Low Source Impedance – Very Low
1/f Corner
DOffset Adjust does not Degrade Drift or Common–Mode Rejection as in Most Monolithic Amplifiers
DNew Output Stage Allows use of Large Capacitive Loads (10,000pF) without Stability Problems
DInternal Compensation and Large Differential Input Voltage Capability
Applications:
DPrecision High Speed Integrators
DFast D/A and A/D Converters
DHigh Impedance Buffers
DWideband, Low Noise, Low Drift Amplifiers
DLogarithmic Amplifiers
DPhotocell Amplifiers
DSample and Hold Circuits
Absolute Maximum Ratings:
Supply Voltage ±18V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation (at +25°C, Note 1), Pd500mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential Input Voltage ±30V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage Range (Note 2) ±16V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Short–Circuit Duration Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Operating Junction Temperature (Note 1), TJmax +100°C. . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, Tstg –65° to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (During Soldering, 10sec), TL+300°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance, Junction–to–Ambient (Note 1), RthJC +155°C/W. . . . . . . . . . . . . . . . . . . . . . . . .
Note 1. The maximum power dissipation for this device must be derated at elevated temperatures
and is dictated by TJmax, RthJC, and the ambient temperature, TA. The maximum available
power dissipation at any temperature is Pd = (TJmax – TA)/RthJC or the +25°C Pdmax, which-
ever is less.
Note 2. Unless otherwise specified, the absolute maximum negative input voltage is equal to the
negative power supply voltage.