PD - 97127 IRFP3206PbF HEXFET(R) Power MOSFET Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G D Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free S VDSS RDS(on) typ. max. ID (Silicon Limited) 60V 2.4m: 3.0m: 200A c ID (Package Limited) 120A D G D S TO-247AC G D S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. Units ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) 200c ID @ TC = 100C Continuous Drain Current, VGS @ 10V (Silicon Limited) 140c ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 120 IDM Pulsed Drain Current d 840 PD @TC = 25C Maximum Power Dissipation 280 W A Linear Derating Factor 1.9 VGS Gate-to-Source Voltage 20 W/C V dv/dt TJ Peak Diode Recovery f 5.0 V/ns Operating Junction and -55 to + 175 TSTG Storage Temperature Range C 300 Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw 10lbxin (1.1Nxm) Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy e IAR Avalanche Currentd EAR Repetitive Avalanche Energy g 170 mJ See Fig. 14, 15, 22a, 22b, A mJ Thermal Resistance Typ. Max. RJC Symbol Junction-to-Case j --- 0.54 RCS Case-to-Sink, Flat Greased Surface 0.24 --- RJA Junction-to-Ambient j --- 40 www.irf.com Parameter Units C/W 1 3/3/08 IRFP3206PbF Static @ TJ = 25C (unless otherwise specified) Symbol Parameter V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance RG Min. Typ. Max. Units 60 --- --- 2.0 --- --- --- --- --- --- 0.07 2.4 --- --- --- --- --- 0.7 --- --- 3.0 4.0 20 250 100 -100 --- Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 5mAd m VGS = 10V, ID = 75A g V VDS = VGS, ID = 150A A VDS =60V, VGS = 0V VDS = 48V, VGS = 0V, TJ = 125C nA VGS = 20V VGS = -20V Dynamic @ TJ = 25C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Min. Typ. Max. Units Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) 210 --- --- --- --- Turn-On Delay Time --- Rise Time --- Turn-Off Delay Time --- Fall Time --- Input Capacitance --- Output Capacitance --- Reverse Transfer Capacitance --- Effective Output Capacitance (Energy Related) --- Effective Output Capacitance (Time Related)h --- --- 120 29 35 85 19 82 55 83 6540 720 360 1040 1230 --- 170 --- --- --- --- --- --- --- --- --- --- --- S nC ns pF Conditions VDS = 50V, ID = 75A ID = 75A VDS =30V VGS = 10V g ID = 75A, VDS =0V, VGS = 10V VDD = 30V ID = 75A RG =2.7 VGS = 10V g VGS = 0V VDS = 50V = 1.0MHz, See Fig.5 VGS = 0V, VDS = 0V to 48V i, See Fig.11 VGS = 0V, VDS = 0V to 48V h Diode Characteristics Symbol Parameter IS Continuous Source Current ISM (Body Diode) Pulsed Source Current VSD trr (Body Diode)d Diode Forward Voltage Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time Min. Typ. Max. Units --- --- --- 840 Conditions A MOSFET symbol A showing the integral reverse D G p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 75A, VGS = 0V g VR = 51V, --- 33 50 ns TJ = 25C = 125C I T --- 37 56 J F = 75A di/dt = 100A/s g --- 41 62 nC TJ = 25C TJ = 125C --- 53 80 --- 2.1 --- A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.023mH RG = 25, IAS = 120A, VGS =10V. Part not recommended for use above this value . 2 --- 200c S ISD 75A, di/dt 360A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.. R is measured at TJ approximately 90C www.irf.com IRFP3206PbF 1000 1000 BOTTOM 100 4.5V BOTTOM 100 4.5V 60s PULSE WIDTH Tj = 175C 60s PULSE WIDTH Tj = 25C 10 10 0.1 1 10 0.1 100 Fig 1. Typical Output Characteristics 10 100 Fig 2. Typical Output Characteristics 1000 2.5 100 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current() 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) TJ = 175C 10 TJ = 25C 1 VDS = 25V 60s PULSE WIDTH 0.1 2.0 3.0 4.0 5.0 6.0 7.0 ID = 75A VGS = 10V 2.0 1.5 1.0 0.5 8.0 -60 -40 -20 VGS, Gate-to-Source Voltage (V) 12000 VGS, Gate-to-Source Voltage (V) Coss = Cds + Cgd 8000 Ciss 6000 4000 Coss 2000 Crss 10 100 VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com ID= 75A VDS = 48V 16 VDS= 30V VDS= 12V 12 8 4 0 0 1 20 40 60 80 100 120 140 160 180 Fig 4. Normalized On-Resistance vs. Temperature 20 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd 10000 0 TJ , Junction Temperature (C) Fig 3. Typical Transfer Characteristics C, Capacitance (pF) VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V 0 40 80 120 160 200 QG Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 IRFP3206PbF 10000 ID, Drain-to-Source Current (A) ISD , Reverse Drain Current (A) 1000 TJ = 175C 100 TJ = 25C 10 1 OPERATION IN THIS AREA LIMITED BY R DS (on) 1000 1msec 100 10msec 10 1 Tc = 25C Tj = 175C Single Pulse VGS = 0V 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0.1 2.0 LIMITED BY PACKAGE ID , Drain Current (A) 200 160 120 80 40 0 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage 240 50 10 100 Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 25 1 VDS, Drain-toSource Voltage (V) VSD, Source-to-Drain Voltage (V) 80 ID = 5mA 75 70 65 60 55 -60 -40 -20 TC , Case Temperature (C) 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage 2.0 EAS, Single Pulse Avalanche Energy (mJ) 800 1.5 Energy (J) DC 0.1 0.1 1.0 0.5 0.0 ID 21A 33A BOTTOM 120A TOP 600 400 200 0 0 10 20 30 40 50 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 100sec 60 25 50 75 100 125 150 175 Starting TJ, Junction Temperature (C) Fig 12. Maximum Avalanche Energy Vs. DrainCurrent www.irf.com IRFP3206PbF 1 Thermal Response ( Z thJC ) D = 0.50 0.20 0.10 0.1 0.05 0.02 0.01 0.01 J SINGLE PULSE ( THERMAL RESPONSE ) 0.001 R1 R1 J 1 R2 R2 R3 R3 Ri (C/W) C 2 1 3 2 Ci= i/Ri Ci= i/Ri 3 (sec) 0.11493 0.0001 0.218028 0.001262 0.206197 0.011922 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 100 0.01 0.05 0.10 10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 200 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1% Duty Cycle ID = 120A 160 120 80 40 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (C) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRFP3206PbF 18 ID = 1.0A 4.0 16 ID = 1.0mA ID = 250A 3.5 14 ID = 150A 12 IRRM - (A) VGS(th) Gate threshold Voltage (V) 4.5 3.0 2.5 10 8 6 2.0 IF = 30A VR = 51V 4 1.5 TJ = 125C TJ = 25C 2 1.0 0 -75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000 TJ , Temperature ( C ) dif / dt - (A / s) Fig 16. Threshold Voltage Vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt 18 350 16 300 14 250 QRR - (nC) IRRM - (A) 12 10 8 6 4 2 0 IF = 45A VR = 51V 200 150 IF = 30A VR = 51V 100 50 TJ = 125C TJ = 25C TJ = 125C TJ = 25C 0 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000 dif / dt - (A / s) dif / dt - (A / s) Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt 350 300 QRR - (nC) 250 200 150 100 50 0 IF = 45A VR = 51V TJ = 125C TJ = 25C 100 200 300 400 500 600 700 800 900 1000 dif / dt - (A / s) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFP3206PbF Driver Gate Drive D.U.T - - - * D.U.T. ISD Waveform Reverse Recovery Current + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple 5% * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V DRIVER L VDS tp D.U.T RG + V - DD IAS VGS 20V A 0.01 tp I AS Fig 22a. Unclamped Inductive Test Circuit LD Fig 22b. Unclamped Inductive Waveforms VDS VDS + 90% VDD - 10% D.U.T VGS VGS Pulse Width < 1s Duty Factor < 0.1% td(on) Fig 23a. Switching Time Test Circuit tr td(off) Fig 23b. Switching Time Waveforms Id Current Regulator Same Type as D.U.T. Vds Vgs 50K 12V tf .2F .3F D.U.T. + V - DS Vgs(th) VGS 3mA IG ID Current Sampling Resistors Fig 24a. Gate Charge Test Circuit www.irf.com Qgs1 Qgs2 Qgd Qgodr Fig 24b. Gate Charge Waveform 7 IRFP3206PbF TO-247AC Package Outline Dimensions are shown in millimeters (inches) TO-247AC Part Marking Information EXAMPLE: T HIS IS AN IRFPE30 WIT H AS S EMBLY LOT CODE 5657 AS S EMBLED ON WW 35, 2001 IN T HE AS S EMBLY LINE "H" Note: "P" in as s embly line position indicates "Lead-Free" INTERNAT IONAL RECT IFIER LOGO PART NUMBER IRFPE30 56 135H 57 AS S EMBLY LOT CODE DAT E CODE YEAR 1 = 2001 WEEK 35 LINE H TO-247AC packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 03/08 8 www.irf.com