PSMNR90-40YLH N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology 26 April 2019 Product data sheet 1. General description 300 Amp, logic level gate drive N-channel enhancement mode MOSFET in 175 C LFPAK56E package using advanced TrenchMOS Superjunction technology. This product has been designed and qualified for high performance power switching applications. 2. Features and benefits * * * * * * * * * * 300 A continuous ID(max) Avalanche rated, 100% tested NextPower-S3 technology delivers 'superfast switching with soft body-diode recovery' Low QRR, QG and QGD for high system efficiency and low EMI designs Schottky-Plus body-diode, gives soft switching without the associated high IDSS leakage Strong linear-mode / SOA rating Optimised for 4.5 V gate drive utilising NextPower-S3 Superjunction technology High reliability LFPAK (Power SO8) package, with copper-clip and solder die attach, qualified to 175 C Exposed leads can be wave soldered, visual solder joint inspection and high quality solder joints for ultimate reliability Low parasitic inductance and resistance 3. Applications * * * * * * High-performance synchronous rectification DC-to-DC converters High performance and high efficiency server power supply Brushless DC motor control Battery protection Load-switch and eFuse 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions VDS drain-source voltage 25 C Tj 175 C ID drain current VGS = 10 V; Tmb = 25 C; Fig. 2 Ptot total power dissipation Tmb = 25 C; Fig. 1 Tj junction temperature Min Typ Max Unit - - 40 V - - 300 A - - 333 W -55 - 175 C VGS = 4.5 V; ID = 25 A; Tj = 25 C; Fig. 10 - 0.97 1.2 m VGS = 10 V; ID = 25 A; Tj = 25 C; Fig. 10 - 0.76 0.94 m [1] Static characteristics RDSon drain-source on-state resistance Dynamic characteristics PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology Symbol Parameter Conditions Min Typ Max Unit QGD gate-drain charge - 13 26 nC QG(tot) total gate charge ID = 25 A; VDS = 20 V; VGS = 4.5 V; Fig. 12; Fig. 13 - 54 76 nC [1] 300A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 S source 2 S source 3 S source G 4 G gate mbb076 mb D mounting base; connected to drain D 1 2 3 S 4 LFPAK56E; PowerSO8 (SOT1023) 6. Ordering information Table 3. Ordering information Type number Package PSMNR90-40YLH Name Description Version LFPAK56E; Power-SO8 plastic, single-ended surface-mounted package (LFPAK56); 4 leads; 1.27 mm pitch SOT1023 7. Marking Table 4. Marking codes Type number Marking code PSMNR90-40YLH H90L40J 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 C Tj 175 C - 40 V VDSM peak drain-source voltage tp 20 ns; f 500 kHz; EDS(AL) 200 nJ; pulsed - 45 V VDGR drain-gate voltage 25 C Tj 175 C; RGS = 20 k - 40 V VGS gate-source voltage -20 20 V Ptot total power dissipation Tmb = 25 C; Fig. 1 - 333 W ID drain current VGS = 10 V; Tmb = 25 C; Fig. 2 - 300 A - 285 A VGS = 10 V; Tmb = 100 C; Fig. 2 PSMNR90-40YLH Product data sheet All information provided in this document is subject to legal disclaimers. 26 April 2019 [1] (c) Nexperia B.V. 2019. All rights reserved 2 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology Symbol Parameter Conditions Min Max Unit IDM peak drain current pulsed; tp 10 s; Tmb = 25 C; Fig. 3 - 1613 A Tstg storage temperature -55 175 C Tj junction temperature -55 175 C Tsld(M) peak soldering temperature - 260 C Source-drain diode IS source current Tmb = 25 C - 278 A ISM peak source current pulsed; tp 10 s; Tmb = 25 C - 1613 A Avalanche ruggedness EDS(AL)S IAS [1] [2] ID = 83 A; Vsup 40 V; RGS = 50 ; non-repetitive drainsource avalanche energy VGS = 10 V; Tj(init) = 25 C; unclamped; tp = 0.27 ms [2] - 577 mJ ID = 25 A; Vsup 40 V; RGS = 50 ; VGS = 10 V; Tj(init) = 25 C; unclamped; tp = 4.1 ms [2] - 2706 mJ [2] - 190 A non-repetitive avalanche Vsup 40 V; VGS = 10 V; Tj(init) = 25 C; current RGS = 50 300A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. Protected by 100% test 03aa16 120 Pder (%) aaa-028650 500 ID (A) 400 80 300 (1) 200 40 100 0 Fig. 1. 0 50 100 150 Tmb (C) 0 200 Fig. 2. Product data sheet 25 50 75 100 125 150 175 Tmb (C) 200 VGS 10 V (1) 300A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. Normalized total power dissipation as a function of mounting base temperature PSMNR90-40YLH 0 Continuous drain current as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 3 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology ID (A) aaa-028651 104 Limit RDSon = VDS / ID 103 tp = 10 s 102 100 s DC 10 1 ms 10 ms 100 ms 1 10-1 1 10 102 VDS (V) Tmb = 25 C; IDM is a single pulse Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Min Typ Max Unit Rth(j-mb) thermal resistance from Fig. 4 junction to mounting base Conditions - 0.33 0.45 K/W Rth(j-a) thermal resistance from Fig. 5 junction to ambient Fig. 6 - 42 - K/W - 85 - K/W aaa-028225 1 Zth(j-mb) (K/W) = 0.5 10-1 0.2 0.1 0.05 10-2 0.02 P single shot = Fig. 4. 10-5 10-4 10-3 10-2 T t tp 10-3 10-6 tp T 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMNR90-40YLH Product data sheet All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 4 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology aaa-027935 aaa-027933 Copper square 25.4 mm x 25.4 mm; 70 m thick on FR4 board Fig. 5. PCB layout for thermal resistance from junction to ambient 70 m thick copper on FR4 board Fig. 6. PCB layout with minimum footprint for thermal resistance from junction to ambient 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 A; VGS = 0 V; Tj = 25 C 40 - - V ID = 250 A; VGS = 0 V; Tj = -55 C 36 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS=VGS; Tj = 25 C 1.35 1.7 2.05 V VGS(th)/T gate-source threshold voltage variation with temperature 25 C Tj 150 C - -4.9 - mV/K IDSS drain leakage current VDS = 32 V; VGS = 0 V; Tj = 25 C - - 1 A VDS = 32 V; VGS = 0 V; Tj = 125 C - 11 - A VGS = 16 V; VDS = 0 V; Tj = 25 C - 2 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 25 C; Fig. 10 - 0.76 0.94 m VGS = 10 V; ID = 25 A; Tj = 175 C; Fig. 11 - - 2 m VGS = 4.5 V; ID = 25 A; Tj = 25 C; Fig. 10 - 0.97 1.2 m VGS = 4.5 V; ID = 25 A; Tj = 175 C; Fig. 11 - - 2.6 m f = 1 MHz; Tj = 25 C 0.4 1 2.6 ID = 25 A; VDS = 20 V; VGS = 4.5 V; Fig. 12; Fig. 13 - 54 76 nC ID = 25 A; VDS = 20 V; VGS = 10 V; Fig. 12; Fig. 13 - 120 168 nC ID = 0 A; VDS = 0 V; VGS = 10 V - 63 - nC ID = 25 A; VDS = 20 V; VGS = 4.5 V; Fig. 12; Fig. 13 - 20 30 nC - 12 18 nC Static characteristics V(BR)DSS IGSS RDSon RG gate leakage current drain-source on-state resistance gate resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gatesource charge PSMNR90-40YLH Product data sheet All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 5 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology Symbol Parameter Conditions Min Typ Max Unit QGS(th-pl) post-threshold gatesource charge - 8 12 nC QGD gate-drain charge VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 20 V; Fig. 12; Fig. 13 - 13 26 nC - 2.7 - V Ciss input capacitance Coss output capacitance VDS = 20 V; VGS = 0 V; f = 1 MHz; Tj = 25 C; Fig. 14 - 9052 12673 pF Crss reverse transfer capacitance - 1702 2383 pF - 347 764 pF td(on) turn-on delay time - 45 - ns tr rise time - 46 - ns td(off) tf turn-off delay time - 59 - ns fall time - 33 - ns Qoss output charge VGS = 0 V; VDS = 20 V; f = 1 MHz; Tj = 25 C - 57 - nC VDS = 20 V; RL = 0.8 ; VGS = 4.5 V; RG(ext) = 5 Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 C; Fig. 15 - 0.76 1.2 V trr reverse recovery time - 45 - ns Qr recovered charge IS = 25 A; dIS/dt = -100 A/s; VGS = 0 V; VDS = 20 V; Fig. 16 [1] - 53 - nC ta reverse recovery rise time - 25 - ns tb reverse recovery fall time - 19 - ns [1] includes capacitive recovery aaa-027342 400 ID (A) RDSon (m) 3.5 V 320 3 4.5 V 240 aaa-027343 4 10 V VGS = 3 V 2 160 2.8 V 80 0 Fig. 7. 1 2.6 V 0 1 2 3 VDS (V) 0 4 0 2 4 6 8 10 12 14 VGS (V) 16 Tj = 25 C Tj = 25 C; ID = 25 A Output characteristics; drain current as a Fig. 8. function of drain-source voltage; typical values Drain-source on-state resistance as a function of gate-source voltage; typical values PSMNR90-40YLH Product data sheet All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 6 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology aaa-028654 400 ID (A) aaa-027345 10 RDSon (m) 3V 8 300 6 3.5 V 200 4 VGS = 10 V 100 175C 0 0 0.5 1 1.5 2 2 Tj = 25C 2.5 3 3.5 VGS (V) 0 4 VDS = 8 V Fig. 9. a 4.5 V 0 50 100 150 200 250 300 350 ID (A) 400 Tj = 25 C Transfer characteristics; drain current as a function of gate-source voltage; typical values Fig. 10. Drain-source on-state resistance as a function of drain current; typical values aaa-029298 2.4 VGS (V) 2.1 aaa-028652 10 8 1.8 6 32 V 1.5 20 V 4 1.2 VDS = 8 V 2 0.9 0.6 -60 -30 0 30 60 90 120 150 Tj (C) 0 180 0 20 40 60 80 100 120 QG (nC) 140 Tj = 25 C; ID = 25 A Fig. 11. Normalized drain-source on-state resistance factor as a function of junction temperature PSMNR90-40YLH Product data sheet Fig. 12. Gate-source voltage as a function of gate charge; typical values All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 7 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology aaa-027347 105 C (pF) VDS ID 104 VGS(pl) Ciss VGS(th) VGS QGS2 QGS1 QGS Coss 103 QGD QG(tot) Crss 003aaa508 102 10-1 Fig. 13. Gate charge waveform definitions 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig. 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values IS (A) 003aal160 aaa-028653 103 ID (A) trr 102 ta tb 0 175C 10 Tj = 25C 0.25 IRM IRM 1 0 0.2 0.4 0.6 0.8 1 VSD (V) t (s) 1.2 VGS = 0 V Fig. 16. Reverse recovery timing definition Fig. 15. Source-drain (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMNR90-40YLH Product data sheet All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 8 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology 11. Package outline Plastic single-ended surface-mounted package (LFPAK56E); 4 leads A E SOT1023 E1 A b1 b2 (3x) c1 mounting base H D1 D L 1 2 3 4 b e A1 w A X c C Lp detail X 0 2.5 mm 5 mm scale Dimensions Unit y C A A1 b b1 b2 c c1 D(1) D1(1) E(1) E1(1) max 1.10 0.15 0.50 4.41 0.25 0.30 4.70 4.45 5.30 nom 0.85 min 0.95 0.00 0.35 3.62 0.19 0.24 4.45 4.95 3.7 3.5 e 1.27 H L Lp 6.2 1.3 0.85 5.9 0.8 0.40 w y 0.25 0.1 8 0 Note 1. Plastic or metal protrusions of 0.15 mm per side are not included. Outline version sot1023_po References IEC JEDEC JEITA European projection Issue date 13-03-05 17-07-31 SOT1023 Fig. 17. Package outline LFPAK56E; Power-SO8 (SOT1023) PSMNR90-40YLH Product data sheet All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 9 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology 12. Soldering 4.7 4.2 0.25 (2x) 0.9 (3x) 0.25 (2x) 0.6 (4x) 3.45 0.6 (3x) 2 3.5 2.55 0.25 (2x) SR opening = Cu + 0.075 1.1 2.15 3.3 SP opening = Cu - 0.050 0.7 (4x) 1.27 3.81 solder lands solder paste 125 m stencil solder resist occupied area sot1023_fr Fig. 18. Reflow soldering footprint for LFPAK56E; Power-SO8 (SOT1023) PSMNR90-40YLH Product data sheet All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 10 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology 13. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Data sheet status Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. 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Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia's warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia's specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia's standard warranty and Nexperia's product specifications. Translations -- A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 11 / 12 PSMNR90-40YLH Nexperia N-channel 40 V, 0.94 m, 300 A logic level MOSFET in LFPAK56E using NextPower-S3 Schottky-Plus technology Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 2 9. Thermal characteristics............................................... 4 10. Characteristics............................................................ 5 11. Package outline.......................................................... 9 12. Soldering................................................................... 10 13. Legal information......................................................11 (c) Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 26 April 2019 PSMNR90-40YLH Product data sheet All information provided in this document is subject to legal disclaimers. 26 April 2019 (c) Nexperia B.V. 2019. All rights reserved 12 / 12