November 2014 Rev. 1.2 www.microsemi.com 1
© 2014 Microsemi Corporation- Analog Mixed Signal Group
Current Mode PWM Controller
Block Diagram
VIN VREF
VC
CT
RT
SYNC
-CURRENT
SENSE
+CURRENT
SENSE -
-
+
--
++
-
+X3
OSC
N.I.
INV.
COMP
E.A.
0.5 V
COMP
S
SR
Q
Q
T
Q
U.V.LOCKOUT
GND
B OUT
A OUT
SG1846
Output Stoge
CURRENT LIMITADJUST
SHUTDOWN
6K
350 mV
5.1 V
REFERENCE
REGULATOR
0.5 mA
Figure 1 · Block Diagram
Features
Automatic Feed-forward Compensation
Programmable Pulse by Pulse Current Limiting
Automatic Symmetry Correction in Push-pull
Configuration
Enhanced Load Response Characteristics
Parallel Operation Capability for Modular Power
Systems
Differential Current Sense Amplifier with Wide
Common-mode Range
Double Pulse Suppression
200mA Totem-pole Outputs
± 1% Bandgap Reference
Under-voltage Lockout
Soft-start and Shutdown Capability
500kHz Operation
High Reliability Features
Available To MIL-STD-883 883, ¶ 1.2.1
Available to DSCC
Standard Microcircuit Drawing (SMD)
SGR1846 Rad-Tolerant Version Available
Description
The SG1846 family of control ICs provides the required
features to implement Fixed Frequency, Current mode
control schemes while maintaining a minimum external
parts count. The advanced performance of this
technique can be measured in improved line regulation,
enhanced load response characteristics, and a simpler,
easier-to-design control loop. Topological advantages
include, inherent pulse-by-pulse current limiting
capability, automatic symmetry correction for push-pull
converters, and the ability to parallel “power modules
while maintaining equal current sharing.
Protection circuitry includes built-in under-voltage
lockout and programmable current limit in addition to
soft start capability. A shutdown function is also
available which can initiate either a complete shutdown
with automatic restart, or latch the supply off.
Other features include fully latched operation, double-
pulse suppression, dead-time adjust capability, and a
±1% trimmed bandgap reference.
SG1846/SG2846/SG3846
Current Mode PWM Controller
2
Connection Diagrams and Ordering Information
Absolute Maximum Ratings
Parameter
Value
Units
Supply Voltage (+VIN)
40
V
Collector Supply Voltage(VC)
40
V
Analog Inputs (Pins 3, 4, 5, 6, and 16)
-0.3V to +VIN
V
Logic Input
-0.3V to 5.5V
V
Source/Sink Load current (continuous)
200
mA
Source/Sink Load Current (peak, 200 ns)
500
mA
Reference Load Current
30
mA
Soft Start Sink Current
50
mA
Sync Output Current
5
mA
Error Amplifier Output Current
5
mA
Oscillator Charging current (Pin 9)
5
mA
Type
Package
Part Number
Packaging
Type
Connection Diagram
J
16-PIN
CERAMIC
DUAL INLINE
PACKAGE
SG1846J-883B
CERDIP
C.L./SOFTSTART SHUTDOWN
(-) C.S.
(+) C.S.
(+) ERROR AMP
(-) ERROR AMP
OUTPUT B
OUTPUT A
GROUND
SYNC
N Package: RoHS Complaint / Pb-free Transition DC: 0503
N Package: RoHS / Pb-free 100% Matte Tin Lead Finish
VREF
VC
CTRT
+VIN
1
3
2
4
5
7
6
89
11
10
12
13
15
14
16
COMPENSATION
SG1846J-DESC
SG1846J
N
16-PIN
PLASTIC DIP
PACKAGE
SG2846N
PDIP
SG3846N
DW
16-PIN
WIDEBODY
PLASTIC
SOIC
PACKAGE4
SG2846DW
SOWB
C.L./SOFTSTART SHUTDOWN
(-) C.S.
(+) C.S.
(+) ERROR AMP
(-) ERROR AMP
OUTPUT B
OUTPUT A
GROUND
SYNC
DW Package: RoHS Complaint / Pb-free Transition DC: 0516
DW Package: RoHS / Pb-free 100% Matte Tin Lead Finish
VREF
VC
CTRT
+V
IN
1
3
2
4
5
7
6
89
11
10
12
13
15
14
16
COMPENSATION
SG3846DW
F
16-PIN
CERAMIC
FLAT PACK
PACKAGE3
SG1846F-DESC
FLATPAK
C.L./SOFTSTART SHUTDOWN
(-) C.S.
(+) C.S.
(+) ERROR AMP
(-) ERROR AMP
OUTPUT B
OUTPUT A
GROUND
SYNC
VREF
VC
CTRT
+V
IN
1
3
2
4
5
7
6
89
11
10
12
13
15
14
16
COMPENSATION
L
20-PIN
CERAMIC
LLC
PACKAGE3
SG1846L-883B
CLCC
13 2
4
5
7
6
8
9 1110 12 13
15
14
16
17
18
1920
1. N.C. 11. N.C.
6. N.C. 16. N.C.
2. C.L./SOFTSTART
20. SHUTDOWN
4. (-) C.S.
5. (+) C.S.
7. (+) ERROR AMP
8. (-) ERROR AMP 18. OUTPUT B
14. OUTPUT A
15. GROUND
13. SYNC
3. V REF
17. VC
10. CT
12. RT
19. VIN
9. COMPENSATION
SG1846L-DESC
SG1846L
Notes:
1. Contact factory for DESC part availability.
2. All parts are viewed from the top.
3. Consult factory for product availability.
4. The SG2846 & SG3846 is available shipped as tape & reel with the addition of a TR suffix.
5. Hermetic Packages J, F, & L use Pb37/Sn63 hot solder lead finish, contact factory for availability of RoHS versions.
Thermal Data
3
Parameter
Value
Units
Operating Junction Temperature Hermetic (J, L, F Packages)
150
°C
Operating Junction Temperature Plastic (N, DW Package)
150
°C
Storage Temperature Range
-65 to 150
°C
Lead Temperature (Soldering, 10 Seconds)
300
°C
RoHS Peak Package Solder Reflow Temp. (40 sec. max. exp.)
260 (+0, -5)
°C
1. Values beyond which damage may occur.
2. Pin numbers refer to ceramic J package.
Thermal Data
Parameter
Value
Units
J Package:
Thermal Resistance-Junction to Case, θJC
30
°C/W
Thermal Resistance-Junction to Ambient, θJA
80
°C/W
N Package:
Thermal Resistance-Junction to Case, θJC
40
°C/W
Thermal Resistance-Junction to Ambient, θJA
65
°C/W
DW Package:
Thermal Resistance-Junction to Case, θJC
40
°C/W
Thermal Resistance-Junction to Ambient, θJA
95
°C/W
F Package:
Thermal Resistance-Junction to Case, θJC
70
°C/W
Thermal Resistance-Junction to Ambient, θJA
115
°C/W
L Package:
Thermal Resistance-Junction to Case, θJC
35
°C/W
Thermal Resistance-Junction to Ambient, θJA
120
°C/W
Notes:
1. Junction Temperature Calculation: TJ = TA + (PD x θJA).
2. The above numbers for θJC are maximums for the limiting thermal resistance of the package in a standard mounting
configuration. The θJA numbers are meant to be guidelines for the thermal performance of the device/PCBoard system. All of
the above assume no ambient airflow.
Recommended Operating Conditions
Parameter
Value
Units
Supply Voltage Range
8 to 40
V
Collector Supply Voltage Range
4.5 to 40
V
Source/Sink Output Current (continuous)
100
mA
Source/Sink Output Current (peak 200ns)
200
mA
Reference Load Current
0 to 10
mA
Oscillator Frequency Range
1 to 500
kHz
Oscillator Timing Resistor (RT)
2 to 100
k
Oscillator Timing Capacitor (CT)
1 to 100
nF
Operating Ambient Temperature Range
SG1846
55 to 125
°C
SG2846
25 to 85
°C
SG3846
0 to 70
°C
Note: Range over which the device is functional.
Current Mode PWM Controller
4
Electrical Characteristics
Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1846
with -55°C TA 125°C, SG2846 with -25°C TA 85°C, SG3846 with 0°C TA 70°C, +VIN = 15V. Low
duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the
ambient temperature.
Symbol
Parameter
Test Condition
SG1846
SG2846
SG3846
Units
Min
Typ
Max
Min
Typ
Max
Reference Section
VREF
Output Voltage
TJ = 25°C, IO = 1mA
5.05
5.10
5.15
5.00
5.10
5.20
V
VREG
Line Regulation
VIN = 8V to 40V
5
20
5
20
mV
IREG
Load Regulation
IL = 1mA to 10mA
3
15
3
15
mV
Temperature Stability1
0.4
0.4
mV/°C
Total Output Variation1
Line, Load and Temperature
5.00
5.20
4.95
5.25
V
Output Noise Voltage1
10Hz f 10kHz. TJ = 25°C
100
100
µV
Long Term Stability1
TJ = 125°C, 1000Hrs.
5
5
mV
VREFISC
Short Circuit Output
Current
VREF = 0V
-10
-45
-10
-45
mA
Oscillator Section6
OSC
Initial Accuracy
TJ = 25°C
39
43
47
39
43
47
kHz
OSCVS
Voltage Stability
VIN = 8V to 40V
1
2
1
2
%
OSCTS
Temperature Stability1
Over Operating Range
1
1
%
VOH
Sync Output High Level
3.9
4.35
3.9
4.35
V
VOL
Sync Output Low Level
2.3
2.5
2.3
2.5
V
VIH
Sync Input High Level
Pin 8 = 0V
3.9
3.9
V
VIL
Sync Input Low Level
Pin 8 = 0V
2.5
2.5
V
IIL
Sync Input Current
Sync Voltage = 5.25V, Pin 8
= 0V
1.2
1.5
1.2
1.5
mA
Electrical Characteristics
5
Symbol
Parameter
Test Condition
SG1846
SG2846
SG3846
Units
Min
Typ
Max
Min
Typ
Max
Error AMP Section
EAVOS
Input Offset Voltage
0.5
5
0.5
10
mV
EAIIB
Input Bias Current
-0.6
-1
-0.6
-2
µA
EAIOS
Input Offset Current
40
250
40
250
nA
EACM
Common Mode Range
VIN = 8V to 40V
0
VIN-
2V
0
VIN-2V
V
EAAV
Open Loop Voltage Gain
VO = 1.2V to 3V, VCM = 2V
80
105
80
105
dB
EAUGB
Unity Gain Bandwidth1
TJ = 25°C
0.7
1.0
0.7
1.0
MHz
EACMRR
CMRR
VCM = 0V to 38V, VIN = 40V
75
100
75
100
dB
EAPSRR
PSRR
VIN = 8V to 40V
80
105
80
105
dB
EASNK
Output Sink Current
VID = - 15mV to -5V, VPIN 7 =
1.2V
2
6
2
6
mA
EASRC
Output Source Current
VID = 15mV to 5V, VPIN 7 =
2.5V
-0.4
-0.5
-0.4
-0.5
mA
EAVOH
High Level Output
Voltage
RL = 15kΩ (Pin 7)
4.3
4.6
4.3
4.6
V
EAVOL
Low Level Output Voltage
RL = 15kΩ (Pin 7)
0.7
1
0.7
1
V
Current Sense Amplifier Section
CSAV
Amplifier Gain2 &3
VPIN 3 = 0V, Pin 1 Open
2.5
2.75
3.0
2.5
2.75
3.0
V
Maximum Differential3
Input Signal2 (VPIN 4 - VPIN
3)
Pin 1 Open RL = 15kΩ (Pin 7)
1.1
1.2
1.1
1.2
V
Input Offset Voltage2
VPIN 1 = 0.5V, Pin 7 Open
5
25
5
25
mV
CSCMRR
CMRR
VCM = 1V to 12V
60
83
60
83
dB
CSPSRR
PSRR
VIN = 8V to 40V
60
84
60
84
dB
CSIIB
Input Bias Current2
VPIN 1 = 0.5V, Pin 7 Open
-2.5
-10
-2.5
-10
µA
CSIOC
Input Offset Current2
VPIN 1 = 0.5V, Pin 7 Open
0.08
1
0.08
1
µA
CSCM
Input Common Mode
Range
0
VIN -
3
0
VIN -3
V
Delay to Outputs1
TJ = 25°C
200
500
200
500
ns
Current Limit Adjust Section
Current Limit Offset
Voltage2
VPIN 3 = 0, VPIN 4 = 0V, Pin 7
Open
0.45
0.5
0.55
0.45
0.5
0.55
V
CLIIB
Input Bias Current
VPIN 5 = VREF, VPIN 6 = 0V
-10
-30
-10
-30
µA
Current Mode PWM Controller
6
Symbol
Parameter
Test Condition
SG1846
SG2846
SG3846
Units
Min
Typ
Max
Min
Typ
Max
Shutdown Terminal Section
SD
Threshold Voltage
250
350
400
250
350
400
mV
Input Voltage Range
0
VIN
0
VIN
V
SDLC
Minimum Latching
Current; (IPIN 1)4
3.0
1.5
3.0
1.5
mA
Maximum Non-Latching
Current; (IPIN 1)5
1.5
0.8
1.5
0.8
mA
SDDELAY
Delay to Outputs1
TJ = 25°C
300
600
300
600
ns
Output Section
Collector Emitter
Voltage
40
40
V
Collector Leakage
Current
VC = 40V
200
200
µA
Output Low Level
ISINK = 20mA
0.1
0.4
0.1
0.4
V
ISINK = 100mA
0.4
2.1
0.4
2.1
V
Output High Level
ISOURCE = 20mA
13
13.5
13
13.5
V
ISOURCE = 100mA
12
13.5
12
13.5
V
Rise Time1
CL = 1nF, TJ = 25°C
50
300
50
300
ns
Fall Time1
CL = 1nF, TJ = 25°C
50
300
50
300
ns
Under-Voltage Lockout Section
Start-Up Threshold
7.7
8.0
7.7
8.0
V
Threshold Hysteresis
0.75
0.75
V
Total Standby Current
IQ
Supply Current
17
21
17
21
mA
Notes:
1. These parameters, although guaranteed over the recommended operating conditions, are not tested in the production.
2. Parameter measured at trip point of latch with VPIN 5 = VREF , VPIN 6 = 0V.
3. Amplifier gain defined as :



 VPIN 4 = 0V to 1.0V
4. Current into Pin 1 guaranteed to latch circuit in shutdown state.
5. Current into Pin 1 guaranteed not to latch circuit in shutdown state.
6. RT = 10k, CT = 4.7nF
Characteristic Curves
7
Characteristic Curves
5.15
5.10
5.05
4.95
4.90
5.00
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (O
C)
REFERENCE VOLTAGE - (V)
Figure 2 · Reference Voltage Vs.
Temperature
100
90
80
70
60
50
40
30
20
10
0-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
SHORT CIRCUIT CURRENT - (mA)
VREF
Figure 3 · VREF Short Circuit
Current Vs. Temperature
C.S. VOLTAGE DIFFENTIAL - (V)
1.5
1.0
0.5
00.5 1.5 2.5
2.0 4.5 5.04.0
1.0 3.5
3.0
ERROR AMPLIFIER OUTPUT VOLTAGE - (V)
T = 125 C
JO
T = 55 C
JO
Figure 4 · Current Sense Threshold
Vs. Error Amplifier Output
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
CURRENT SENSE GAIN - (V/V)
2.80
2.76
2.78
2.68
2.74
2.70
2.72
2.82
2.84
Figure 5 · Current Sense Gain Vs.
Temperature
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
1.30
1.10
1.20
1.40
1.50
OSCILLATOR VALLEY VOLTAGE - (V)
Figure 6 · Oscillator Valley Voltage
Vs. Temperature
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
3.00
2.80
2.90
3.10
3.20
OSCILLATOR PEAK VOLTAGE - (V)
Figure 7 · Oscillator Peak Voltage
Vs. Temperature
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
1.8
1.6
1.4
1.2
1.0
2.6
2.4
2.2
2.0
LATCH CURRENT THRESHOLD - (mA)
V = 15 V
IN
Figure 8 · Minimum SCR Latch
Current
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
170
160
150
180
190
CURRENT SENSE DELAY - (ns)
(10% ABOVE THRESHOLD)
Figure 9 · Current Sense Delay Vs.
Temperature
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
120
160
140
180
220
200
SHUTDOWN DELAY - (ns)
(10% ABOVE THRESHOLD)
Figure 10 · Shutdown Delay To
Output Vs. Temperature
Current Mode PWM Controller
8
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
1.40
1.30
1.50
1.60
INPUT OFFSET VOLTAGE - (mV)
Figure 11 · Error Amplifier Input
Offset Voltage Vs. Temperature
-55 75
50
-25 25 125
100
0
JUNCTION TEMPERATURE - (OC)
6.0
5.0
4.0
12.0
10.0
9.0
8.0
7.0
11.0
ERROR AMP SINK CURRENT - (mA)
Figure 12 · Error AMP Sink Current
Vs. Temperature
100 200 300 400 500
0
0
OUTPUT CURRENT - (mA)
2.0
1.0
5.0
3.0
4.0
SATURATION VOLTAGE - (V)
T = -55°C
J
T = 25°C
J
T = 125°C
J
Figure 13 · Output Transistor
Saturation Voltage Vs. Output
Current (Sink Transistor)
100 200 300 400 500
0
0
OUTPUT CURRENT - (mA)
2.0
1.0
5.0
6.0
3.0
4.0
SATURATION VOLTAGE - (V)
T = -55°C
J
T = 25°C
J
T = 125°C
J
Figure 14 · Output Transistor
Saturation Voltage Vs. Output
Current (Source Transistor)
-55 75
50
-25 25 125
1000
JUNCTION TEMPERATURE - (OC)
60
40
20
180
140
120
100
80
160
SYNC PULSEWIDTH - (ns)
C = 0.001µF
T
R = 8 kΩ
T
Figure 15 · Sync Pulsewidth Vs.
Temperature
-55 7550-25 25 1251000
JUNCTION TEMPERATURE - (°C)
1400
1300
1200
2000
1800
1700
1600
1500
1900
SYNC PULSEWIDTH - (ns)
C = 0.01µF
T
R = 8 kΩ
T
Figure 16 · Sync Pulsewidth Vs.
Temperature
-55 75
50
-25 25 125
1000
JUNCTION TEMPERATURE - (OC)
26.5
26.0
25.5
25.0
OSCILLATOR FREQUENCY - (kHz)
R = 8 kΩ
T
C = 0.01µF
T
Figure 17 · Oscillator Frequency Vs.
Temperature
-55 7550-25 25 1251000
JUNCTION TEMPERATURE - (OC)
2.85
2.75
2.65
OSCILLATOR FREQUENCY - (kHz)
R = 8 kΩ
T
C = 0.1µF
T
Figure 18 · Oscillator Frequency
Vs. Temperature
-55 75
50-25 25 125
1000
JUNCTION TEMPERATURE - (OC)
46
44
45
43
41
40
39
38
42
DUTY CYCLE - (%)
R = 8 kΩ
T
C = 0.001µF
T
Figure 19 · Duty Cycle Vs.
Temperature
Application Information
9
Application Information
100k
50k
20k
10k
5k
2k
1k 10µsec 100µsec 1000µsec
OSCILLATOR PERIOD (µs)
C = 1 nF
T
C = 5 nF
T
C = 10 nF
T
C = 20 nF
T
C = 50 nF
C = .1 µF
T
T
C = 2 nF
T
R ()
T
Figure 20 · Oscillator Frequency Curves
5 V
3 V
1.2 V
RT
(T )
D
CT
Id
IR
IR3.7 V
SAWTOOTH(Pin 8)
OSC(Pin 10)
OUTPUT DEADTIME
T RT C
T
~ 2.2
Oscillator frequency is approximated by the formula: f ~
Figure 21 · Oscillator Circuit
Current Mode PWM Controller
10
-
+
VREF
VREF
Zs
ZfIf< 0.5 mA
0.5 mA
COMP
6
5
7
Figure 22 · Error Amp Output Configuration (Error amplifier can source up to 0.5 mA)
-
+
CURRENT
SENSE
3
R
C
4
IS
RS
Figure 23 · Current Sense AMP Connections
A small RC filter may be required in some applications to reduce switch transients. Differential input allows
remote noise free switching.
Application Information
11
-
-
-
+
+
+
16
12
14
11
13
15
10
3
4
7
2
8
9
6
5
1
SYNC
COMP
COMP
NI
INV
FEEDBACK SFT/ST
EA
0.5 mA
0.5 V
REF
OSC
GND
F/F
S/D
I/A
PWM
LATCH
NOR
NOR
350 mV
SH/DN
+ SENSE
- SENSE
B OUT
A OUT
VREF
CT
RT
ILIMIT
VC
VOUT
VIN
+VIN
SG1846
Figure 24 · Single Ended Boost Configuration
-
-
-
+
+
+
16
12
14
11
13
15
10
3
4
7
2
8
9
6
5
1
SYNC
COMP
COMP
NI
INV
FEEDBACK SFT/ST
EA
0.5 mA
0.5 V
REF
OSC
GND
F/F
S/D
I/A
PWM
LATCH
NOR
NOR
350 mV
SH/DN
+ SENSE
- SENSE
B OUT
A OUT
VREF
CT
RT
ILIMIT
VC
VOUT
VIN
+VIN
SG1846
Figure 25 · Buck Converter with Current Sense Winding
Current Mode PWM Controller
12
-
-
-
+
+
+
16
12
14
11
13
15
10
3
4
7
2
8
9
6
5
1
SYNC
COMP
COMP
NI
INV
FEEDBACK SFT/ST
EA
0.5 mA
0.5 V
REF
OSC
GND
F/F
S/D
I/A
PWM
LATCH
NOR
NOR
350 mV
SH/DN
+ SENSE
- SENSE
B OUT
A OUT
VREF
VREF
CT
RT
ILIMIT
VC
+VIN
SG1846
Figure 26 · Push/Pull Converter with Slope Compensation
VREF
R1
R2
RS
ISENSE
IS
COMP
COMP
E/A
0.5 V
0.5 mA
CURRENT
LIMIT 1
(+) 4
(-) 3
x3
7
+ -
Peak Current (IS) is determined by the formula: IS =
R2VREF
R1+R2-0.5
3RS
Figure 27 · Pulse by Pulse Current Limiting
Application Information
13
VREF
V
REF
R1
R2
ISENSE
ISS E/A
350 mV
0.5
CURRENT
LIMIT 1 +
+
+
+
-
-
-
-
16
SHUT
DOWN
S
C
S
ʃ
Figure 28 · Soft Start and Shutdown/Restart Functions
~~~~
VREF
R
1
CURRENT LIMIT
(PIN 1)
0.5 V
0SHUTDOWN
(PIN 16)
ON
OFF
PWM
< 0.8 mA
Figure 29 · Shutdown with Auto-Restart
If

< 0.8 mA, the shutdown latch commutates.
when ISS < 0.8 mA, a restart cycle will be initiated.
~
~~
~
VREF
R1> 3 mA (LATCHED OFF)
Figure 30 · Shutdown without Auto-Restart (Latched)
If

> 3 mA, the device will latch off until power is recycled.
Current Mode PWM Controller
14
Package Outline Dimensions
Controlling dimensions are in inches, metric equivalents are shown for general information.
H
e
A 2
A 1
c
BL
E
D
18
9
16
SEATING PLANE
A
Dim
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
A
2.06
2.65
0.081
0.104
A1
0.10
0.30
0.004
0.012
A2
2.03
2.55
0.080
0.100
B
0.25
0.51
0.010
0.020
c
0.23
0.32
0.009
0.013
D
-
10.67
-
0.420
E
7.40
7.75
0.291
0.305
e
1.27 BSC
0.05 BSC
H
10.00
10.65
0.394
0.419
L
0.40
1.27
0.016
0.050
θ
*LC
-
0.10
-
0.004
*Lead co planarity
Note:
Dimensions do not include protrusions; these shall
not exceed 0.155mm (.006”) on any side. Lead
dimension shall not include solder coverage.
Figure 31 · DW 16-Pin SOWB Package Dimensions
A
E1
D
eb
L
E
c
θ
b1
SEATING PLANE
1
A2
A1
Dim
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
A
-
5.33
-
0.210
A1
0.38
-
0.015
-
A2
3.30 Typ.
0.130 Typ.
b
0.36
0.56
0.014
0.022
b1
1.14
1.78
0.045
0.070
c
0.20
0.36
0.008
0.014
D
18.67
19.69
0.735
0.775
e
2.54 BSC
0.100 BSC
E
7.62
8.26
0.300
0.325
E1
6.10
7.11
0.240
0.280
L
2.92
0.381
0.115
0.150
θ
-
15°
-
15°
Note:
Dimensions do not include protrusions; these shall
not exceed 0.155mm (.006”) on any side. Lead
dimension shall not include solder coverage.
Figure 32 · N 16-Pin Plastic Dual Inline Package Dimensions
PACKAGE OUTLINE DIMENSIONS
15
PACKAGE OUTLINE DIMENSIONS
θ
D
e
9
16
18
eA
b
H
b2
c
Seating Plane
E
A
Q
L
Dim
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
A
5.08
0.200
b
0.38
0.51
0.015
0.020
b2
1.04
1.65
0.045
0.065
c
0.20
0.38
0.008
0.015
D
19.30
19.94
0.760
0.785
E
5.59
7.11
0.220
0.280
e
2.54 BSC
0.100 BSC
eA
7.37
7.87
0.290
0.310
H
0.63
1.78
0.025
0.070
L
3.18
5.08
0.125
0.200
α
-
15°
-
15°
Q
0.51
1.02
0.020
0.040
Note:
Dimensions do not include protrusions; these shall not
exceed 0.155mm (.006”) on any side. Lead dimension
shall not include solder coverage.
Figure 33 · J 16-Pin Ceramic Dual Inline Package Dimensions
D
E3
L
L2
B1 eB3
A2
A1
A
1
3
8
13
18
h
E
Dim
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
D/E
8.64
9.14
0.340
0.360
E3
-
8.128
-
0.320
e
1.270 BSC
0.050 BSC
B1
0.635 TYP
0.025 TYP
L
1.02
1.52
0.040
0.060
A
1.626
2.286
0.064
0.090
h
1.016 TYP
0.040 TYP
A1
1.372
1.68
0.054
0.066
A2
-
1.168
-
0.046
L2
1.91
2.41
0.075
0.95
B3
0.203R
0.008R
Note:
All exposed metalized area shall be gold plated 60
micro-inch minimum thickness over nickel plated
unless otherwise specified in purchase order.
Figure 34 · L 20-Pin Ceramic Leadless Chip Carrier (LCC) Package Outline Dimensions
Current Mode PWM Controller
16
PACKAGE OUTLINE DIMENSIONS
Controlling dimensions are in inches, metric equivalents are shown for general information.
e
B
D
S1
L
C
E
L
E1
AQ
1
2
3
4
56
7
8
9
10
L
1
8
9
16
Dim
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
A
1.65
1.91
0.057
0.067
b
0.38
0.48
0.010
0.019
c
0.102
0.152
0.004
0.006
D
-
11.18
-
0.290
E
6.22
6.74
0.238
0.252
E1
-
7.62
-
0.272
e
1.27 BSC
0.050 BSC
L
6.35
9.40
0.250
0.370
Q
0.51
1.02
0.020
0.040
S1
0.20
0.008
Note:
1. Lead No. 1 is identified by tab on lead or dot on cover.
2. Leads are within 0.13mm (.0005”) radius of the true
position (TP) at maximum material condition.
3. Dimension “e” determines a zone within which all body
and lead irregularities lie.
Figure 35 · F 16-Pin Ceramic Flatpack Package Dimensions
Microsemi Corporate Headquarters
One Enterprise, Aliso Viejo,
CA 92656 USA
Within the USA
: +1 (800) 713-4113
Outside the USA: +1 (949) 380-6100
Sales
: +1 (949) 380-6136
Fax
: +1 (949) 215-4996
E-mail
:
sales.support@microsemi.com
© 2014 Microsemi Corporation. All
rights reserved. Microsemi and the
Microsemi logo are trademarks of
Microsemi Corporation. All other
trademarks and service marks are the
property of their respective owners.
SG1846.1.2/11.14
Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor
and system solutions for communications, defense & security, aerospace and industrial
markets. Products include high-performance and radiation-hardened analog mixed-signal
integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and
synchronization devices and precise time solutions, setting the world’s standard for time; voice
processing devices; RF solutions; discrete components; security technologies and scalable
anti-tamper products; Power-over-Ethernet ICs and midspans; as well as custom design
capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif., and has
approximately 3,400 employees globally. Learn more at www.microsemi.com.
Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or
the suitability of its products and services for any particular purpose, nor does Microsemi assume any
liability whatsoever arising out of the application or use of any product or circuit. The products sold
hereunder and any other products sold by Microsemi have been subject to limited testing and should not
be used in conjunction with mission-critical equipment or applications. Any performance specifications are
believed to be reliable but are not verified, and Buyer must conduct and complete all performance and
other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not
rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer’s
responsibility to independently determine suitability of any products and to test and verify the same. The
information provided by Microsemi hereunder is provided “as is, where is and with all faults, and the
entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly
or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such
information itself or anything described by such information. Information provided in this document is
proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this
document or to any products and services at any time without notice.