LTC1064
1
1064fb
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V
–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
10k
18.25k
10.7k
10k
12.1k
17.4k
R
H2
102k
13k
66.5k
R
L2
26.7k
41.2k
12.7k
14k
121k
10k
22.1k
V
IN
8V
(FROM
R
H2
, R
L2
)
5MHz
0.1µF
0.1µF
–8V
PIN 12
V
OUT
1064 TA01
8V
10k
49.9K
11.5K
FOR f
CLK
= 5MHz, ADD C1 = 10pF BETWEEN PINS 4, 1
C2 = 10pF BETWEEN PINS 21, 24
C3 = 27pF BETWEEN PINS 9, 12
WIDEBAND NOISE ≅ 140µV
RMS
■
Anti-Aliasing Filters
■
Wide Frequency Range Tracking Filters
■
Spectral Analysis
■
Loop Filters
■
Four Filters in a 0.3 Inch Wide Package
■
Maximum Center Frequency: 140kHz
■
Customized Version with Internal Resistors
Available
■
One Half the Noise of the LTC1059/LTC1060/
LTC1061 Devices
■
Maximum Clock Frequency: 7MHz
■
Clock-to-Center Frequency Ratio of 50:1 and 100:1
Simultaneously Available
■
Power Supplies: ±2.375V to ±8V
■
Low Offsets
■
Low Harmonic Distortion
■
Available in 24-Pin DIP and SO Wide Packages
The LTC
®
1064 consists of four high speed, low noise
switched-capacitor filter building blocks. Each filter build-
ing block, together with an external clock and three to five
resistors can provide various 2nd order functions like
lowpass, highpass, bandpass and notch. The center fre-
quency of each 2nd order function can be tuned with an
external clock, or a clock and resistor ratio. For Q ≤ 5, the
center frequency range is from 0.1Hz to 100kHz. For Q ≤
3, the center frequency range can be extended to 140kHz.
Up to 8th order filters can be realized by cascading all four
2nd order sections. Any classical filter realization (such as
Butterworth, Cauer, Bessel and Chebyshev) can be formed.
A customized monolithic version of the LTC1064 includ-
ing internal thin film resistors can be obtained for high
volume applications. Consult LTC Marketing for details.
APPLICATIO S
U
TYPICAL APPLICATIO
U
DESCRIPTIO
U
FEATURES
Low Noise, Fast, Quad
Universal Filter Building Block
Gain vs Frequency
Clock-Tunable 8th Order Cauer Lowpass Filter with fCUTOFF up to 100kHz
INPUT FREQUENCY (Hz)
1k
GAIN (dB)
10k 100k 1M
1064 TA02
0
–15
–30
–45
–60
–75
–90
–105
–120
–135
f
CLK
= 5MHz
RIPPLE = ±0.1dB
f
CLK
= 1MHz
RIPPLE = ±0.05dB
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
LTC1064
2
1064fb
Total Supply Voltage (V
+
to V
–
) ............................. 16V
Power Dissipation............................................. 500mW
Operating Temperature Range
LTC1064AC/LTC1064C.................... – 40°C to 85°C
LTC1064AM
LTC1064M (OBSOLETE) ............... – 55°C to 125°C
ELECTRICAL CHARACTERISTICS
(Internal Op Amps) The ● denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
PACKAGE/ORDER I FOR ATIO
UUW
SW PACKAGE
24-LEAD PLASTIC SO WIDE
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
LPB
SB
AGND
V+
SA
LPA
BPA
HPA/NA
INV A
INV C
HPC/NC
BPC
LPC
SC
V–
CLK
50/100
LPD
BPD
HPD
INV D
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
LPB
SB
AGND
V+
SA
LPA
BPA
HPA/NA
INV A
INV C
HPC/NC
BPC
LPC
SC
V–
CLK
50/100
LPD
BPD
HPD
INV D
N PACKAGE
24-LEAD PLASTIC DIP
PARAMETER CONDITIONS MIN TYP MAX UNITS
Operating Supply Voltage Range ±2.375 ±8V
Voltage Swings V
S
= ±5V, R
L
= 5k ±3.2 ±3.6 V
●±3.1 V
Output Short-Circuit Current (Source/Sink) V
S
= ±5V 3 mA
DC Open-Loop Gain V
S
= ±5V, R
L
= 5k 80 dB
GBW Product V
S
= ±5V 7 MHz
Slew Rate V
S
= ±5V 10 V/µs
ABSOLUTE AXI U RATI GS
W
WW
U
(Note 1)
T
JMAX
= 110°C, θ
JA
= 65°C/W
LTC1064ACN
LTC1064CN
LTC1064CSW
ORDER PART
NUMBER
ORDER PART
NUMBER
T
JMAX
= 100°C, θ
JA
= 85°C/ W
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
LTC1064ACJ
LTC1064CJ
LTC1064AMJ
LTC1064MJ
J PACKAGE 24-LEAD CERAMIC DIP
T
JMAX
= 150°C, θ
JA
= 100°C/W
OBSOLETE PACKAGE
Consider the 24-Lead N Package as an Alternate Source
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
LTC1064
3
1064fb
ELECTRICAL CHARACTERISTICS
(Complete Filter) The ● denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at VS = ±5V, TA = 25°C, TTL clock input level, unless otherwise specified.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Center Frequency Range, f
O
V
S
= ±8V, Q ≤ 3 0.1 to 140 kHz
Input Frequency Range 0 to 1 MHz
Clock-to-Center Frequency LTC1064 f
CLK
= 1MHz, f
O
= 20kHz, Pin 17 High 50 ± 0.3 %
Ratio, f
CLK
/f
O
LTC1064A (Note 2) Sides A, B, C: Mode 1, ●50 ± 0.8 %
R1 = R3 = 5k, R2 = 5k, Q = 10,
Sides D: Mode 3, R1 = R3 = 50k ●50 ± 0.9 %
R2 = R4 = 5k
LTC1064 Same as Above, Pin 17 Low, f
CLK
= 1MHz 100 ± 0.3 %
LTC1064A (Note 2) f
O
= 10kHz
Sides A, B, C ●100 ± 0.8 %
Side D ●100 ± 0.9
Clock-to-Center Frequency LTC1064 f
CLK
= 1MHz 0.4 %
Ratio, Side-to-Side Matching LTC1064A (Note 2) ●1%
Clock-to-Center Frequency LTC1064 f
CLK
= 4MHz, f
O
= 80kHz, Pin 17 High 50 ± 0.6 %
Ratio, f
CLK
/f
O
(Note 3) LTC1064A (Note 2) Sides A, B, C: Mode 1, V
S
= ±7.5V 50 ± 1.3 %
R1 = R3 = 50k, R2 = 5k, Q = 5
Side D: Mode 3, R1 = R3 = 50k
R2 = R4 = 5k, f
CLK
= 4MHz
LTC1064 Same as Above, Pin 17 Low 100 ± 0.6 %
LTC1064 A (Note 2) f
CLK
= 4MHz, f
O
= 40kHz 100 ± 1.3 %
Q Accuracy Sides A, B, C: Mode 1, Q = 10 ●±26 %
Side D: Mode 3, f
CLK
= 1MHz ●±38 %
f
O
Temperature Coefficient Mode 1, 50:1, f
CLK
< 2MHz ±1 ppm/°C
Q Temperature Coefficient Mode 1, 100:1, f
CLK
< 2MHz ±5 ppm/°C
Mode 3, f
CLK
< 2MHz ±5 ppm/°C
DC Offset Voltage V
OS1
(Table 1) f
CLK
= 1MHz, 50:1 or 100:1 ●215 mV
V
OS2
(Table 1) f
CLK
= 1MHz, 50:1 or 100:1 ●345 mV
V
OS3
(Table 1) f
CLK
= 1MHz, 50:1 or 100:1 ●345 mV
Clock Feedthrough f
CLK
< 1MHz 0.2 mV
RMS
Maximum Clock Frequency Mode 1, Q < 5, V
S
≥ ±5V 7 MHz
Power Supply Current 91223 mA
●26 mA
V
OSN
V
OSBP
V
OSLP
MODE PINS 2, 11, 14, 23 PINS 3, 10, 15, 22 PINS 4, 9, 16, 21
1V
OS1
[(1/Q) + 1 + ⏐⏐ H
OLP
⏐⏐ ] – V
OS3
/Q V
OS3
V
OSN
– V
OS2
1b V
OS1
[(1/Q) + 1 + (R2/R1)] – V
OS3
/Q V
OS3
~(V
OSN
– V
OS2
)[1 + (R5/R6)]
2V
OS1
[(1 + (R2/R1) + (R2/R3) + (R2/R4) – V
OS3
(R2/R3)] V
OS3
V
OSN
– V
OS2
× [R4/(R2 + R4)] + V
OS2
[R2/(R2 + R4)]
3V
OS2
V
OS3
V
OS1
[1 + (R4/R1) + (R4/R2) + (R4/R3)]
– V
OS2
(R4/R2) – V
OS3
(R4/R3)
Table 1. Output DC Offsets, One 2nd Order Section
Note 2: Contact LTC Marketing.
Note 3: Not tested, guaranteed by design.
LTC1064
4
1064fb
CENTER FREQUENCY (kHz)
100
Q ERROR (%)
CENTER FREQUENCY
ERROR (%)
20
15
10
5
0
–5
1.5
1.0
0.5
0
20 30 50
40 60 70 80 90
1064 G03
100 110 120
T
A
= 25°C
Q = 10
PIN 17 AT V
+
(R2/R4) = 3
V
S
= ±2.5V
C
C
= 15pF V
S
= ±5V
C
C
= 15pF
V
S
= ±2.5V V
S
= ±5V
CENTER FREQUENCY (kHz)
100
Q ERROR (%)
CENTER FREQUENCY
ERROR (%)
20
15
10
5
0
–5
1.5
1.0
0.5
0
20 30 50
40 60 70 80 90
1064 G02
100 110 120
T
A
= 25°C
Q = 5
Q = 10
V
S
= ±2.5V
V
S
= ±5V
V
S
= ±7.5V
V
S
= ±2.5V
T
A
= 25°C
Q = 5 OR 10
V
S
= ±7.5V
V
S
= ±5V
CENTER FREQUENCY (kHz)
100
Q ERROR (%)
CENTER FREQUENCY
ERROR (%)
20
15
10
5
0
–5
1.5
1.0
0.5
0
20 30 50
40 60 70 80 90
1064 G01
100 110 120
T
A
= 25°C
Q = 5
Q = 10
V
S
= ±2.5V
V
S
= ±5V
V
S
= ±7.5V
V
S
= ±5V
V
S
= ±2.5V
T
A
= 25°C
Q = 5 OR 10 V
S
= ±7.5V
–
+
+
∫
+
∫
+
∫
+
∫
+
∫
+
∫
50/100 (17)
CLK (18)
HPC/NC
(23)
BPC
(22)
LPC
(21)
HPB/NB
(2)
BPB
(3)
LPB
(4)
BPA
(10) LPA
(9)
INV A
(12)
AGND
(6)
INV C
(24)
1064 BD
HPA/NA
(11)
+
Σ
SA
(8)
–
+
–
+
–
+
–
+
INV D
(13)
INV B
(1)
HPD
(14)
Σ
–
SB
(5)
Σ
–
SC
(20)
+
+
∫
BPD
(15)
+
∫
LPD
(16)
V+ (7)
V– (19)
BY TYING PIN 17 TO V+, ALL SECTIONS
OPERATE WITH (fCLK/fO) = 50:1
BY TYING PIN 17 TO V–, ALL SECTIONS
OPERATE WITH (fCLK/fO) = 100:1
BY TYING PIN 17 TO AGND, SECTIONS B, C
OPERATE WITH (fCLK/fO) = 50:1 AND
SECTIONS A, D OPERATE AT 100:1
TYPICAL PERFORMANCE CHARACTERISTICS
UW
Mode 1, (fCLK/fO) = 50:1 Mode 1, (fCLK/fO) = 100:1 Mode 2, (fCLK/fO) = 25:1
BLOCK DIAGRA
W
LTC1064
5
1064fb
POWER SUPPLY VOLTAGE (V
+
– V
–
)
20
POWER SUPPLY CURRENT (mA)
48
44
40
36
32
28
24
20
16
12
8
4
0
46 10
8 12141618
1064 G10
20 22 24
–55°C
25°C
125°C
Q
20
WIDEBAND NOISE (µV/
RMS
)
240
220
200
180
160
140
120
100
80
60
40
20
0
46 10
8 12141618
1064 G09
20 22 24
ANY OUTPUT
R3 = R1
ONE SECOND ORDER
SECTION
MODE 1 OR 3
100:1 OR 50:1 ±7.5V
±5V
±2.5V
CENTER FREQUENCY (kHz)
100
Q ERROR (%)
CENTER FREQUENCY
ERROR (%)
20
15
10
5
0
–5
1.5
1.0
0.5
0
20 30 50
40 60 70 80 90
1064 G08
100 110 120
V
S
= ±7.5V
V
S
= ±7.5V
V
S
= ±2.5V
T
A
= 25°C
C
C
= 5pF
R2 = R4
Q = 10
V
S
= ±2.5V V
S
= ±5V
V
S
= ±5V
CENTER FREQUENCY (kHz)
100
Q ERROR (%)
CENTER FREQUENCY
ERROR (%)
20
15
10
5
0
–5
1.5
1.0
0.5
0
20 30 50
40 60 70 80 90
1064 G07
100 110 120
TA = 25°C
CC = 15pF
R2 = R4
VS = ±7.5V
Q = 2
Q = 1
VS = ±5V
VS = ±2.5V
VS = ±7.5V
CENTER FREQUENCY (kHz)
100
Q ERROR (%)
CENTER FREQUENCY
ERROR (%)
20
15
10
5
0
–5
1.5
1.0
0.5
0
20 30 50
40 60 70 80 90
1064 G06
100 110 120
V
S
= ±7.5V
V
S
= ±7.5V
V
S
= ±5V
V
S
= ±2.5V
T
A
= 25°C
C
C
= 5pF
R2 = R4
Q = 5
Q = 10
V
S
= ±2.5V
V
S
= ±5V
CENTER FREQUENCY (kHz)
100
Q ERROR (%)
CENTER FREQUENCY
ERROR (%)
20
15
10
5
0
–5
1.5
1.0
0.5
0
20 30 50
40 60 70 80 90
1064 G05
100 110 120
V
S
= ±7.5V
V
S
= ±7.5V
V
S
= ±5V
V
S
= ±2.5V
T
A
= 25°C
PIN 17 AT V
–
(R2/R4) = 3
Q = 5
Q = 10
V
S
= ±2.5V V
S
= ±5V
CENTER FREQUENCY (kHz)
200
Q ERROR (%)
CENTER FREQUENCY
ERROR (%)
20
15
10
5
0
–5
1.5
1.0
0.5
0
40 60 100
80 120140160180
1064 G04
200
TA = 25°C
VS = ±7.5V
PIN 17 AT V+
(R2/R4) = 3
Q = 5
CC = 22pF
Q = 5 Q = 2
Q = 2
CC = 39pF
TYPICAL PERFORMANCE CHARACTERISTICS
UW
Mode 2, (fCLK/fO) = 25:1 Mode 2, (fCLK/fO) = 50:1 Mode 3, (fCLK/fO) = 50:1
Mode 3, (fCLK/fO) = 50:1 Mode 3, (fCLK/fO) = 100:1 Wideband Noise vs Q
Power Supply Current vs
Supply Voltage
Harmonic Distortion, 8th Order
LP Butterworth, fC = 20kHz,
THD = 0.015% for 3VRMS Input
1064 G11
LTC1064
6
1064fb
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
V–
CLK
50/100
AGND
V+
ANALOG
GROUND
PLANE
NOTE: PINS 5, 8, 20, IF NOT USED, SHOULD BE CONNECTED TO PIN 6
CLOCK INPUT
V+ = 15V, TRIP VOLTAGE = 7V
V+ = 10V, TRIP VOLTAGE = 6.4V
V+ = 5V, TRIP VOLTAGE = 3V
TO DIGITAL
GROUND
V+LTC1064
0.1µF
5k
1064 F01
5k
1µF
V+/2
+
PIN FUNCTIONS
UUU
AGND (Pin 6): Analog Ground. When the LTC1064 oper-
ates with dual supplies, Pin 6 should be tied to system
ground. When the LTC1064 operates with a single positive
supply, the analog ground pin should be tied to 1/2 supply
and it should be bypassed with a 1µF solid tantalum in
parallel with a 0.1µF ceramic capacitor, Figure 1. The
positive input of all the internal op amps, as well as the
common reference of all the internal switches, are inter-
nally tied to the analog ground pin. Because of this, a very
“clean” ground is recommended.
50/100 (Pin 17): By tying Pin 17 to V
+
, all filter sections
operate with a clock-to-center frequency ratio internally
set at 50:1. When Pin 17 is at mid-supplies, sections B and
C operate with (f
CLK
/f
O
) = 50:1 and sections A and D
operate at 100:1. When Pin 17 is shorted to the negative
supply pin, all filter sections operate with (f
CLK
/f
O
) =
100:1.
V
+
, V
–
(Pins 7, 19): Power Supplies. They should be
bypassed with a 0.1µF ceramic capacitor. Low noise,
nonswitching power supplies are recommended. The de-
vice operates with a single 5V supply and with dual
supplies. The absolute maximum operating power supply
voltage is ±8V.
CLK (Pin 18): Clock. For ±5V supplies the logic threshold
level is 1.4V. For ±8V and 0V to 5V supplies the logic
threshold levels are 2.2V and 3V respectively. The logic
threshold levels vary ±100mV over the full military tem-
perature range. The recommended duty cycle of the input
clock is 50%, although for clock frequencies below 500kHz,
the clock “on” time can be as low as 200ns. The maximum
clock frequency for ±5V supplies is 4MHz. For ±7V
supplies and above, the maximum clock frequency is
7MHz.
Figure 1. Single Supply Operation
LTC1064
7
1064fb
ANALOG
GROUND
PLANE NOTE: CONNECT ANALOG AND DIGITAL
GROUND PLANES AT A SINGLE POINT AT
THE BOARD EDGE
FOR BEST HIGH FREQUENCY RESPONSE
PLACE RESISTORS PARALLEL TO DOUBLE-
SIDED COPPER CLAD BOARD AND LAY FLAT
(4 RESISTORS SHOWN HERE TYPICAL)
LTC1064
0.1µF
CERAMIC
PIN 1 IDENT
1064 F02
5k
–7.5V
7.5V
0.1µF CERAMIC
(SINGLE POINT
GROUND)
CLOCK
V
IN
1
2
3
4
5
6
7
8
9
10
11
12
DIGITAL
GROUND
PLANE
24
23
22
21
20
19
18
17
16
15
14
13
APPLICATIONS INFORMATION
WUUU
Figure 2. Example Ground Plane Breadboard Technique for LTC1064
ANALOG CONSIDERATIONS
Grounding and Bypassing
The LTC1064 should be used with separated analog and
digital ground planes and single point grounding
techniques.
Pin 6 (AGND) should be tied directly to the analog ground
plane.
Pin 7 (V
+
) should be bypassed to the ground plane with a
0.1µF ceramic capacitor with leads as short as possible.
Pin 19 (V
–
) should be bypassed with a 0.1µF ceramic
capacitor. For single supply applications, V
–
can be tied to
the analog ground plane.
For good noise performance, V
+
and V
–
must be free of
noise and ripple.
All analog inputs should be referenced directly to the
single point ground. The clock inputs should be shielded
from and/or routed away from the analog circuitry and a
separate digital ground plane used.
Figure 2 shows an example of an ideal ground plane
design for a 2-sided board. Of course this much ground
plane will not always be possible, but users should strive
to get as close to this as possible. Protoboards are not
recommended.
Buffering the Filter Output
When driving coaxial cables and 1× scope probes, the
filter output should be buffered. This is important espe-
cially when high Qs are used to design a specific filter.
Inadequate buffering may cause errors in noise, distor-
tion, Q and gain measurements
. When 10× probes are
used, buffering is usually not required. An inverting buffer
is recommended especially when THD tests are per-
formed. As shown in Figure 3, the buffer should be
adequately bypassed to minimize clock feedthrough.
LTC1064
8
1064fb
–
+
∫∫
LP
1064 F05
+Σ
AGND
1/4 LTC1064
NS
–
R1
R2
V
IN
R3
fO = ; fn = fO; HOLP = – ; HOBP = – ; HON1 = – ; Q =
fCLK
100(50)
R2
R1
R3
R1
R3
R2
R2
R1
BP
C2
0.1µF
C1
0.1µF
R1
1M
R2
1M
1064 F04
TO FILTER
FIRST SUMMING
NODE
C1 = C2 = LOW LEAKAGE FILM
(I.E., POLYPROPYLENE)
R1 = R2 = METAL FILM 1%
FROM
FILTER OUTPUT
R3
100k
–
+
LT1012
7
19
R21
R11
R31
4
7
LTC1064
0.1µF
1µF
VOUT
1064 F03
10k
R32
R22
R12
0.1µF
V+ TRACE FOR FILTER
0.1µF
VIN
–
+
10k
LT®318
LT1007
LT1056
NEGATIVE
SUPPLY
POSITIVE
SUPPLY
SEPARATE V+ POWER SUPPLY TRACE FOR BUFFER
1µF
0.1µF
+
+
APPLICATIONS INFORMATION
WUUU
Offset Nulling
Lowpass filters may have too much DC offset for some
users. A servo circuit may be used to actively null the
offsets of the LTC1064 or any LTC switched-capacitor
filter. The circuit shown in Figure 4 will null offsets to better
than 300µV. This circuit takes seconds to settle because of
the integrator pole frequency.
Noise
All the noise performance mentioned excludes the clock
feedthrough. Noise measurements will degrade if the
already described grounding bypassing and buffering
techniques are not practiced. The graph Wideband Noise
vs Q in the Typical Performance Characteristics section is
a very good representation of the noise performance of
this device.
Figure 3. Buffering the Output of a 4th Order Bandpass Realization Figure 4. Servo Amplifier
PRIMARY MODES
Mode 1
In Mode 1, the ratio of the external clock frequency to the
center frequency of each 2nd order section is internally
fixed at 50:1 or 100:1. Figure 5 illustrates Mode 1 provid-
ing 2nd order notch, lowpass and bandpass outputs.
Mode 1 can be used to make high order Butterworth
lowpass filters; it can also be used to make low Q notches
and for cascading 2nd order bandpass functions tuned at
the same center frequency with unity gain. Mode 1 is faster
than Mode 3. Note that Mode 1 can only be implemented
with three of the four LTC1064 sections because Section
D has no externally available summing node. Section D,
however, can be internally connected in Mode 1 upon
special request.
ODES OF OPERATIO
U
W
Figure 5. Mode 1: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
LTC1064
9
1064fb
1064 F07 Eq
f
O
= ; f
n
= f
O;
Q
= ;
f
CLK
100(50)
f
CLK
2
R3
R2
R2
R1
R6
R5 + R6
√
R6
R5 + R6
√
H
ON1
(f→ 0) = H
ON2
f→ = – ; H
OLP
= – ;
H
OBP
= – ; R5⏐⏐R6 ≤ 5k
R3
R1
()
R6
R5 + R6
R2
R1
–
+
∫∫
LP
+
Σ
AGND
NS
–
BP
R1
R2
V
IN
R3
1064 F07
R6 R5
1/4 LTC1064
1064 F06 Eq
NOTE: THE 50:1 EQUATIONS FOR MODE 3 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 3 OPERATIONS OF THE LTC1059, LTC1060 AND LTC1061. START WITH
f
O
, CALCULATE R2/R4, SET R4; FROM THE Q VALUE, CALCULATE R3:
f
O
= ; Q = ; H
OHP
= – ;
f
CLK
100
R2
R4
R3
R2
R2
R4
R2
R1
MODE 3 (100:1):
√ √
H
OBP
= – ; H
OLP
= –
R3
R1
R4
R1
f
O
= ; Q = ;
f
CLK
50
R2
R4
MODE 3 (50:1):
√
R2
R3
R2
16R4
R2
R4
1.005
√
–
R3 = ; THEN CALCULATE R1 TO SET
THE DESIRED GAIN.
+
R2
1.005
Q
√
R2
R4
R2
16R4
R3
R1
H
OHP
= – ; H
OBP
= – ; H
OLP
= –
R2
R1 R3
16R4
1 –
R4
R1
–
+
∫∫
LP
+Σ
AGND
HP S
1/4 LTC1064
–
BP
R1
R2
VIN
R3
R4
1064 F06
CC
Mode 3
Mode 3 is the second of the primary modes. In Mode 3, the
ratio of the external clock frequency to the center fre-
quency of each 2nd order section can be adjusted above or
below 50:1 or 100:1. Side D of the LTC1064 can only be
connected in Mode 3. Figure 6 illustrates Mode 3, the
classical state variable configuration, providing highpass,
bandpass and lowpass 2nd order filter functions. Mode 3
is slower than Mode 1. Mode 3 can be used to make high
order all-pole bandpass, lowpass, highpass and notch
filters.
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case
. This was done to provide
speed without penalizing the noise performance.
SECONDARY MODES
Mode 1b
Mode 1b is derived from Mode 1. In Mode 1b, Figure 7, two
additional resistors R5 and R6 are added to alternate the
amount of voltage fed back from the lowpass output into
the input of the SA (or SB or SC) switched-capacitor
summer. This allows the filter’s clock-to-center frequency
ratio to be adjusted beyond 50:1 or 100:1. Mode 1b
maintains the speed advantages of Mode 1.
Mode 2
Mode 2 is a combination of Mode 1 and Mode 3, as shown
in Figure 8. With Mode 2, the clock-to-center frequency
ratio f
CLK
/f
O
is always less than 50:1 or 100:1. The
advantage of Mode 2 is that it provides less sensitivity to
resistor tolerances than does Mode 3. As in Mode 1,
Mode 2 has a notch output which depends on the clock
frequency and the notch frequency is therefore less than
the center frequency f
O
.
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case
.
ODES OF OPERATIO
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Figure 6. Mode 3: 2nd Order Filter Providing Highpass,
Bandpass and Lowpass
Figure 7. Mode 1b: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
LTC1064
10
1064fb
fO = 1 + ; fn = ; HOHP f→ =
HON(f = fO) = Q HOLP – HOHP ; Q =
1064 F09Eq
fO = ; fn = ; HOHP = ; HOBP =
fCLK
100
R2
R4
RH
RL
MODE 3a (100:1):
NOTE: THE 50:1 EQUATIONS FOR MODE 3A ARE DIFFERENT FROM
THE EQUATIONS FOR MODE 3A OPERATION OF THE LTC1059,
LTC1060 AND LTC1061. START WITH fO, CALCULATE R2/R4, SET R4;
FROM THE Q VALUE, CALCULATE R3:
√
R2
R4
√
√
fCLK
100
R2
R4
R3 = ; THEN CALCULATE R1 TO
SET THE DESIRED GAIN.
+
R2
1.005
Q
√
R2
16R4
R2
R1
–
R2
R3
R2
16R4
R2
R4
1.005
√
–
R3
R1
HOBP = – ; HOLP(f = 0) = Q =
R3
16R4
1 –
R4
R1
– ;
R3
R1
– ;
R3
R2
R4
R1
fCLK
2
()()() ()()
RH
RL
√
R2
R4
√
fCLK
50
fCLK
50
MODE 3a (50:1): R2
R1
– ;
fCLK
2
()
()
HOLP = – ; HON1(f→ 0) = ; HON2 f→ = ;
R4
R1
R2
R1
RG
RL
RG
RL
RG
RH
RG
RH
–
+∫∫
LP
+
Σ
AGND
HP S
1/4 LTC1064
–
BP
R1
R2
VIN
R3
R4
1064 F09
CC
RL
RH
RG
NOTCH
EXTERNAL OP AMP OR INPUT
OP AMP OF THE LTC1064,
SIDE A, B, C, D
–
+
1064 F08Eq
fO = 1 + ; fn = ; Q = 1 + ; HOLP = – ;
fCLK
100
R2
R4
R3
R2
MODE 2 (100:1):
NOTE: THE 50:1 EQUATIONS FOR MODE 2 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 2 OPERATION OF THE LTC1059, LTC1060 AND LTC1061. START WITH
fO, CALCULATE R2/R4, SET R4; FROM THE Q VALUE, CALCULATE R3:
√
R2
R4
√
R2
R4
√
fO = 1 + ; fn = ; Q = ; HOLP = – ;
fCLK
50
fCLK
50
fCLK
50
MODE 2 (50:1): R2
R3
R2
16R4
R2
R4
1.005 1 +
√
–
R3
R1
HOBP = – ; HON1(f→ 0) = – ; HON2 = f→ =
R3
16R4
1 –
R2
R4
R3 = ; THEN CALCULATE R1 TO SET THE DESIRED GAIN.
1 + +
R2
1.005
Q
√
R2
16R4
R2
R1
R2
R4
1 +
R2
R1
–
R2
R1
R2
R4
1 +
R2
R1
R2
R4
1 +
fCLK
2
()
fCLK
2
()
HOBP = – ; HON1(f→ 0) = – ; HON2 f→ = –
R3
R1
R2
R1
R2
R1
R2
R4
1 +
–
+
∫∫
LP
1064 F08
+Σ
AGND
NS
1/4 LTC1064
–
R1
R2
VIN
R3
R4
BP
ODES OF OPERATIO
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Figure 8. Mode 2: 2nd Order Filter Providing Notch, Bandpass and Lowpass
Mode 3a
This is an extension of Mode 3 where the highpass and
lowpass outputs are summed through two external resis-
tors RH and RL to create a notch. This is shown in Figure 9.
Mode 3a is more versatile than Mode 2 because the notch
frequency can be higher or lower than the center fre-
quency of the 2nd order section. The external op amp of
Figure 9 is not always required. When cascading the
sections of the LTC1064, the highpass and lowpass
outputs can be summed directly into the inverting input of
the next section. The topology of Mode 3a is useful for
elliptic highpass and notch filters with clock-to-cutoff
frequency ratios higher than 100:1. This is often required
to extend the allowed input signal frequency range and to
avoid premature aliasing.
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case
.
Figure 9. Mode 3a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass and Notch
LTC1064
11
1064fb
TYPICAL APPLICATIO S
U
INPUT FREQUENCY (kHz)
0
GAIN (dB)
5
0
–5
–10
–15
–20
–25
–30
–35
–40
20 40 50
10 30
f
CLK
= 2MHz
1064 TA06
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V
–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R22
R32
R23
R33
R43
R13
R14
R44
R34
R24
20k
R11
V
IN3
V
IN4
V
IN2
V
IN1
5V TO 8V f
CLK
–5V TO –8V
V
OUT
1064 TA05
R12
R31
R21
17.4k
20k
20k
0.1µF
10.5k
RESISTOR VALUES:
R11 = 249k R21 = 10k R31 = 249k
R12 = 249k R22 = 10k R32 = 249k
R13 = 499k R23 = 10k R33 = 174k R43 = 17.8k
R14 = 453k R24 = 10k R34 = 249k R44 = 40.2k
0.1µF
–
+
LT1056
INPUT FREQUENCY (Hz)
10k
GAIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105
100k 1M
1064 TA04
VS = ±8V
fCLK = 7MHz
fCLK = 2MHz
INV B
HPB/NB
BPB
LPB
SB
AGND
V+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R23
R33
R43
R24
R34
R44
R14
R13
R42
R32
R22
R12
R11
VIN
5V TO 8V fCLK ≤ 7MHz
C1
C2
0.1µF
–5V TO –8V
VOUT
1064 TA03
R41
R31
R21
0.1µF
RESISTOR VALUES:
R11 = 16k R21 = 16k R31 = 7.32k R41 = 10k
R12 = 10k R22 = 10k R32 = 22.6k R42 = 13.3k
R13 = 23.2k R23 = 13.3k R33 = 21.5k R43 = 10k
R14 = 6.8k R24 = 20k R34 = 15.4k R44 = 32.4k
NOTE: FOR fCLK ≥ 3MHz, USE C1 = C2 = 22pF
Wideband Bandpass: Ratio of High to Low Corner Frequency Equal to 2
Amplitude Response
Quad Bandpass Filter with Center Frequency Equal to fO, 2fO, 3fO and 4fO
Amplitude Response
LTC1064
12
1064fb
TYPICAL APPLICATIO S
U
INPUT FREQUENCY (kHz)
0
GAIN (dB)
245
13
10
0
–10
–20
–30
–40
–50
–60
–70
VS = ±5V
1064 TA10
INV B
HPB/NB
BPB
LPB
SB
AGND
V+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R22
R32
R42
R23
R33
R43
R13
R14
R12
R44
R34
R24
R11
VIN
5V 0.1µF
–5V
VOUT
1064 TA09
R41
R31
R21
0.1µF
RESISTOR VALUES:
R11 = 88.7k R21 = 10k R31 = 35.7k R41 = 88.7k
R12 = 10k R22 = 44.8k R32 = 33.2k R42 = 24.9k
R13 = 15.8k R23 = 48.9k R33 = 63.5k R43 = 25.5k
R14 = 15.8k R24 = 44.8k R34 = 16.5k R44 = 24.9k
fCLK = 3.5795MHz
16
INPUT FREQUENCY (kHz)
15
GAIN (dB)
10
0
–10
–20
–30
–40
–50
–60
–70
10 20 40 100
1064 TA08
VS = ±5V
fCLK = 1.28MHz
PIN 17 AT V+
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V
–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R22
R32
R42
R
H3
R11
V
IN
TO V
+
5V TO 8V 1.28MHz
–5V TO –8V
V
OUT
1064 TA07
R12
R41
R31
R21
0.1µF
R23
R33
R43
R
H2
R44
R34
R24
R
L2
RESISTOR VALUES:
R11 = 46.95k R21 = 10k R31 = 38.25k R41 = 11.81k
R12 = 93.93k R22 = 10k R32 = 81.5k R42 = 14.72k R
L2
= 27.46k R
H2
= 6.9k
R23 = 16.3k R33 = 70.3k R43 = 10k R
L3
= 17.9k R
H3
= 69.7k
R24 = 13.19k R34 = 39.42k R44 = 10.5k
0.1µF
R
L3
NOTE 1: THE V
+
, V
–
PINS SHOULD BE BYPASSED WITH A 0.1µF TO 0.22µF
CERAMIC CAPACITOR, RIGHT AT THE PINS.
NOTE 2: THE RATIOS OF ALL (R2/R4) RESISTORS SHOULD BE MATCHED
TO BETTER THAN 0.25%. THE REMAINING RESISTORS SHOULD BE
BETTER THAN 0.5% ACCURATE.
8th Order Bandpass Filter with 2 Stopband Notches
Amplitude Response
C-Message Filter
Amplitude Response
LTC1064
13
1064fb
8th Order Chebyshev Lowpass Filter with a Passband
Ripple of 0.1dB and Cutoff Frequency up to 100kHz
TYPICAL APPLICATIO S
U
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V
–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R22
R32
R42
R23
R33
R43
R13
R14
R12
R44
R34
R24
R11
V
IN
5V TO 8V
0.1µF
–5V TO –8V
5V TO 8V
V
OUT
1064 TA11
R41
R31
R21
0.1µF
RESISTOR VALUES:
R11 = 100.86k R21 = 16.75k R31 = 23.6k R41 = 99.73k
R12 = 25.72k R22 = 20.93k R32 = 45.2k R42 = 25.52k
R13 = 16.61k R23 = 10.18k R33 = 68.15k R43 = 99.83k
R14 = 13.84k R24 = 11.52k R34 = 17.72k R44 = 25.42k
FOR f
CLK
> 3MHz, ADD C2 = 10pF ACROSS R42
C3 = 10pF ACROSS R43
C4 = 10pF ACROSS R44
WIDEBAND NOISE = 170µV
RMS
f
CLK
= 5MHz
Amplitude Response
INPUT FREQUENCY (Hz)
10k
GAIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105
100k 1M
1064 TA12
VS = ±8V
fCLK = 5MHz
PASSBAND RIPPLE = 0.1dB
LTC1064
14
1064fb
INV B
HPB/NB
BPB
LPB
SB
AGND
V+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R22
R32
R42
R21
R31
R41
R11
RL2
R44
R34
R24
7.5V
0.1µF–7.5V
–7.5V
VOUT
VIN
1064 TA13
R43
R33
R23
RESISTOR VALUES:
R11 = 19.1k R21 = 10k R31 = 13.7k R41 = 15.4k RL1 = 14k RH1 = 30.9k
R22 = 10k R32 = 23.7k R42 = 10.2k RL2 = 26.7k RH2 = 76.8k
R23 = 11.3k R33 = 84.5k R43 = 10k RL3 = 10k RH3 = 60.2k
R24 = 15.4k R34 = 15.2k R44 = 42.7k
NOTE: FOR tCUTOFF >15kHz, ADD A 5pF CAPACITOR ACROSS R41 AND R43
fCLK ≤ 2MHz
RL1
RH1
RH2
RL3
RH3
0.1µF
TYPICAL APPLICATIO S
U
FREQUENCY (kHz)
0
0
–15
–30
–45
–60
–75
–90
–105
30 50
1064 TA14
10 20 40 60 70
V
OUT
/V
IN
(dB)
8TH ORDER CLOCK-SWEEPABLE LOWPASS
ELLIPTIC ANTIALIASING FILTER MAINTAINS,
FOR 0.1Hz ≤ f
CUTOFF
≤ 20kHz, A ±0.1dB MAX
PASSBAND ERROR AND 72dB MIN STOPBAND
ATTENUATION AT 1.5 × f
CUTOFF
TOTAL WIDEBAND NOISE = 150µV
RMS
,
THD = 70dB (0.03%) FOR V
IN
= 3V
RMS
,
f
CLK
/f
CUTOFF
= 100:1. THIS FILTER AVAILABLE
AS LTC1064-1 WITH INTERNAL THIN FILM
RESISTORS
8th Order Clock-Sweepable Lowpass Elliptic Antialiasing Filter
Amplitude Response
LTC1064
15
1064fb
TYPICAL APPLICATIO S
U
INPUT FREQUENCY (Hz)
10k
GAIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105
100k 1M
1064 TA18
VS = ±8V
fCLK = 4.5MHz
fCLK = 50% DUTY CYCLE
f–3dB = 70kHz
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V
–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R21
R31
R41
R22
R32
R42
R12
R44
R34
R24
5V TO 8V
0.1µFTO V
+
–5V TO –8V
TO R13
V
OUT
V
IN1
FROM
PIN 20
1064 TA17
R43
R33
R23
RESISTOR VALUES:
R11 = 34.8k R21 = 34.8k R31 = 14.3k R41 = 40.2k
R12 = 10.5k R22 = 45.3k R32 = 22.1k R42 = 39.2k
R13 = 12.7k R23 = 34.8k R33 = 24.3k R43 = 20k
R14 = 20k R24 = 34.8k R34 = 13.3k R44 = 20k
WIDEBAND NOISE = 70µV
RMS
f
CLK
≤7MHz
R14
R13
R11
0.1µF
INPUT FREQUENCY (Hz)
10k
GAIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105
100k 1M
1064 TA16
VS = ±8V
fCLK = 7MHz
INV B
HPB/NB
BPB
LPB
SB
AGND
V+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R22
R32
R42
R23
R33
R43
R13
R44
R34
R24
8V
0.1µF8V
–8V
VOUT1
VOUT2
VIN1
VIN2
1064 TA15
R41
R31
R21
RESISTOR VALUES:
R11 = 14.3k R21 = 13k R31 = 7.5k R41 = 10k
R12 = 15.4k R22 = 15.4k R32 = 7.5k R42 = 10k
R13 = 3.92k R23 = 20k R33 = 27.4k R43 = 40k
R14 = 3.92k R24 = 20k R34 = 6.8k R44 = 10k
WIDEBAND NOISE = 64µVRMS
7MHz
CLOCK
R14
R11
R12
0.1µF
Amplitude Response
Dual 4th Order Bessel Filter with 140kHz Cutoff Frequency
Amplitude Response
8th Order Linear Phase (Bessel) Filter with f
CLK
= 65
f
–3dB
1
LTC1064
16
1064fb
INPUT FREQUENCY (Hz)
10k 50k
GAIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105
100k 1M
1064 TA20
PASSBAND RIPPLE = 0.2dB
Dual 5th Order Chebyshev Lowpass Filter with
50kHz and 100kHz Cutoff Frequencies
Amplitude Response
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V
–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R23
R33
R43
R24
R34
R44
R14
R42
R32
R22
8V
0.1µF
C2
1000pF
2pF
C1
1000pF
22pF
39pF
4pF
–8V
V
OUT2
f
C
= 100kHz
V
OUT1
f
C
= 50kHz
V
IN2
V
IN1
1064 TA19
R41
R31
R21
RESISTOR VALUES:
R11a = 4.32k R21 = 11.8k R31 = 29.4k R41 = 10k
R11b = 27.4k R22 = 20k R32 = 21.5k R42 = 31.6k
R12 = 10.5k R23 = 11.8k R33 = 29.4k R43 = 10k
R13a = 3k R24 = 20k R34 = 21.6k R44 = 31.6k
R13b = 29.4k
R14 = 10.5k
5MHz
T
2
L
R12
R13bR13a
R11b
R11a
0.1µF
TYPICAL APPLICATIO S
U
LTC1064
17
1064fb
PACKAGE DESCRIPTIO
U
J Package
24-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
J24 0801
.015 – .060
(0.381 – 1.524)
.125
(3.175)
MIN .014 – .026
(0.360 – 0.660)
.100
(2.54)
BSC
.200
(5.080)
MAX
.045 – .065
(1.143 – 1.651)
.008 – .018
(0.203 – 0.457)
20 16 1517 14 13
19
11
37
56 10
912
142 8
18
.220 – .310
(5.588 – 7.874)
1.290
(32.77)
MAX
21
222324
.025
(0.635)
RAD TYP
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0° – 15°
.300 BSC
(7.62 BSC)
.005
(0.127)
MIN
OBSOLETE PACKAGE
LTC1064
18
1064fb
PACKAGE DESCRIPTIO
U
N Package
24-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
N24 1103
.255 ± .015*
(6.477 ± 0.381)
1.265*
(32.131)
MAX
12
345678910
19
11 12
131416 151718
20
21
2223
24
.020
(0.508)
MIN
.120
(3.048)
MIN
.130 ± .005
(3.302 ± 0.127)
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.018 ± .003
(0.457 ± 0.076)
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
LTC1064
19
1064fb
S24 (WIDE) 0502
NOTE 3
.598 – .614
(15.190 – 15.600)
NOTE 4
22 21 20 19 18 17 16 15
12345678
.394 – .419
(10.007 – 10.643)
910
1314
11 12
N/2
2324
N
.037 – .045
(0.940 – 1.143)
.004 – .012
(0.102 – 0.305)
.093 – .104
(2.362 – 2.642)
.050
(1.270)
BSC .014 – .019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 3
.009 – .013
(0.229 – 0.330)
.016 – .050
(0.406 – 1.270)
.291 – .299
(7.391 – 7.595)
NOTE 4
× 45°
.010 – .029
(0.254 – 0.737)
.420
MIN
.325 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
N
123 N/2
.050 BSC
.030 ±.005
TYP
.005
(0.127)
RAD MIN
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTIO
U
SW Package
24-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
LTC1064
20
1064fb
INPUT FREQUENCY (kHz)
10
GAIN (dB)
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110 20 30 40 50
1064 TA22
60 70
BW
VS = ±8V
fCLK = 4MHz
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
BPA
HPA/NA
INV A
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
INV C
HPC/NC
BPC
LPC
SC
V
–
CLK
50/100
LPD
BPD
HPD
INV D
LTC1064
R22
R32
R42
R23
R33
R14
R13
R44
R34
R24
8V
0.1µFC3
C1 –8V
f
CLK
≤ 5MHz
V
OUT
V
IN1
1064 TA21
R12
R31
R21
RESISTOR VALUES:
R11 = 50k R21 = 5k R31 = 50k R
G
= 68.1k
R12 = 15.4k R22 = 10k R32 = 88.7k R42 = 48.7k R
L4
= 10k (0.1%)
R13 = 10k R23 = 10k R33 = 100k R
H4
= 10k (0.1%)
R14 = 9.09k R24 = 10k R34 = 63.4k R44 = 12.4k
R
L4
0.1%
0.1µF
R
G
R
H4
0.1%
R11
C2
–
+
LT1056
C1 = C2 = C3 = 15pF
THE NOTCH DEPTH FROM
5kHz TO 30kHz IS 50dB
WIDEBAND NOISE = 300µV
RMS
TYPICAL APPLICATIO S
U
RELATED PARTS
PART NUMBER DESCRIPTION COMMENT
LTC1061 Triple Universal Filter Building Block Three Filter Building Blocks in a 20-Pin Package
LTC1068 Series Quad Universal Building Blocks f
CLK
:f
O
= 25:1, 50:1, 100:1 and 200:1
LTC1164 Low Power, Quad Universal Filter Building Block Low Noise, Low Power Pin-for-Pin LTC1064 Compatible
LTC1264 High Speed, Quad Universal Building Block Up to 250kHz Center Frequency
Clock-Tunable, 30kHz to 90kHz 8th Order Notch Filter
Providing Notch Depth in Excess of 60dB
Amplitude Response
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1989
LT/LT 0905 REV B • PRINTED IN USA
