EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
For more products and information
please visit our web site at
www.austinsemiconductor.com
128K x 8 EEPROM
EEPROM Memory
AV AILABLE AS MILITARY
SPECIFICATIONS
SMD 5962-38267
MIL-STD-883
FEATURES
High speed: 150, 200, and 250ns
Data Retention: 10 Years
Low power dissipation, active current (20mW/MHz (TYP)),
standby current (100µW(MAX))
Single +5V (+10%) power supply
Data Polling and Ready/Busy Signals
Erase/W rite Endurance (10,000 cycles in a page mode)
Software Data protection Algorithm
Data Protection Circuitry during power on/off
Hardware Data Protection with RES pin
Automatic Programming:
Automatic Page W rite: 10ms (MAX)
128 Byte page size
OPTIONS MARKINGS
Timing
150ns access -15
200ns access -20
250ns access -25
Packages
Ceramic LCC ECA No. 208
Ceramic Flat Pack F No. 306
Radiation Shielded Ceramic FP* SF No. 305
Ceramic SOJ DCJ No. 508
Plastic SOP DG
Operating T emperature Ranges
-Military (-55oC to +125oC) XT
-Industrial (-40oC to +85oC) IT
*NOTE: Package lid is connected to ground (Vss).
32-Pin LCC (ECA)
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS58C1001 is a 1 Megabit CMOS
Electrically Erasable Programmable Read Only Memory (EEPROM)
organized as 131, 072 x 8 bits. The AS58C1001 is capable or in
system electrical Byte and Page reprogrammability .
The AS58C1001 achieves high speed access, low power
consumption, and a high level of reliability by employing advanced
MNOS memory technology and CMOS process and circuitry
technology and CMOS process and circuitry technology.
This device has a 128-Byte Page Programming function to make its
erase and write operations faster. The AS58C1001 features Data
Polling and a Ready/Busy signal to indicate completion of erase and
programming operations.
This EEPROM provides several levels of data protection.
Hardware data protection is provided with the RES pin, in addition to
noise protection on the WE signal and write inhibit during power on
and off. Software data protection is implemented using JEDEC
Optional Standard algorithm.
The AS58C1001 is designed for high reliability in the most
demanding applications. Data retention is specified for 10 years and
erase/write endurance is guaranteed to a minimum of 10,000 cycles in
the Page Mode.
PIN ASSIGNMENT
(T op View)
32-Pin CFP (F & SF), 32-Pin CSOJ (DCJ),
32-Pin SOP (DG)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
RDY/BUSY\
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O 0
I/O 1
I/O 2
Vss
Vcc
A15
RES\
WE\
A13
A8
A9
A11
OE\
A10
CE\
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
4 3 2 1 32 31 30
14 15 16 17 18 19 20
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A7
A6
A5
A4
A3
A2
A1
A0
I/O 0
A14
A13
A8
A9
A11
OE\
A10
CE\
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
Vss
I/O 2
I/O 1
A12
A15
A16
NC
Vcc
WE\
NC
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
Vcc I/O0 I/O7 Ready/Busy
Vss
OE\
CE\
WE\
RES\
A0
A6
A7
A16
High Voltage Generator
Control Logic and Timing
Address
Buffer and
Latch
Y Decoder
X Decoder
I/O Buffer
and
Input Latch
Y Gating
Memory Array
Data Latch
FUNCTIONAL BLOCK DIAGRAM
MODE SELECTION
MODE CE\ OE\ WE\ RES\ RDY/BUSY\ I/O
READ VIL VIL VIH VHHigh-Z DOUT
STANDBY VIH X X X High-Z High-Z
WRITE VIL VIH VIL VHHigh-Z DIN
DESELECT VIL VIH VIH VHHigh-Z High-Z
XX
VIH X --- ---
XVIL X X --- ---
DATA
POLLING VIL VIL VIH VHVOL Data Out
(I/O7)
PROGRAM XXX
VIL High-Z High-Z
WRITE
INHIBIT
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
FUNCTIONAL DESCRIPTION
AUTOMA TIC PAGE WRITE
The Page Write feature allows 1 to 128 Bytes of data to be
written into the EEPROM in a single cycle and allows the un-
defined data within 128 Bytes to be written corresponding to
the undefined address (A0 to A6). Loading the first Byte of
data, the data load window of 30µs opens for the second. In the
same manner each additional Byte of data can be loaded within
30µs. In case CE\ and WE\ are kept high for 100µs after data
input, the EEPROM enters erase and write automatically and
only the input data can be written into the EEPROM. In Page
mode the data can be written and accessed 104 times per page,
and in Byte mode 103 times per Byte.
DA T A\ POLLING
Data\ Polling allows the status of the EEPROM to be deter-
mined. If the EEPROM is set to Read mode during a Write
cycle, and inversion of the last Byte of data to be loaded out-
puts from I/O, to indicate that the EEPROM is performing a
W rite operation.
WRITE PROTECTION
(1) Noise protection: Noise on a write cycle will not act as
a trigger with a WE\ pulse of less than 20ns.
(2) W rite inhibit: Holding OE\ low , WE\ high or CE\ high,
inhibits a write cycle during power on/off.
WE\ AND CE\ PIN OPERATION
During a write cycle, addresses are latched by the falling
edge of WE\ or CE\, and data is latched by the rising edge of
WE\ or CE\.
WRITE/ERASE ENDURANCE AND
DATA RETENTION
The endurance with page programming is 104 cycles (1%
cumulative failure rate) and the data retention time is more than
10 years when a device is programmed less than 104 cycles.
DATA PROTECTION
To protect the data during operation and power on/off, the
AS58C1001 has:
1. Data protection against Noise on Control Pins (CE\, OE\,
WE\) during Operation. During readout or standby, noise on
the control pins may act as a trigger and turn the EEPROM to
programming mode by mistake. To prevent this phenomenon,
the AS58C1001 has a noise cancellation function that cuts noise
if its width is 20ns or less in programming mode. Be careful not
to allow noise of a width of more than 20ns on the control pins.
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
(EXAMPLE)
Vcc
RES\
*unprogrammable
*unprogrammable
FUNCTIONAL DESCRIPTION (continued)
DA T A PROTECTION (continued)
2. Data protection at Vcc on/off.
When RES\ is low, the EEPROM cannot be erased and
programmed. Therefore, data can be protected by keeping
RES\ low when Vcc is switched. RES\ should be high during
programming because it does not provide a latch function.
When Vcc is turned on or off, noise on the control pins
generated by external circuits (CPU, etc.) may turn the
EEPROM to programming mode by mistake. To prevent
this unintentional programming, the EEPROM must be kept
in an unprogrammable, standby or readout state by using a
CPU reset signal to RES\ pin.
In addition, when RES\ is kept high at Vcc on/off timing,
the input level of control pins (CE\, OE\, WE\) must be held
as CE\=Vcc or OE\=LOW or WE\=Vcc level.
3. Software Data Protection
To protect against unintentional programming caused by
noise generated by external circuits, AS58C1001 has a
Software data protection function. To initate Software data
protection mode, 3 bytes of data must be input, followed by
a dummy write cycle of any address and any data byte. This
exact sequence switches the device into protection mode.
The Software data protection mode can be cancelled by
inputting the following 6 Bytes. This changes the AS58C1001
to the Non-Protection mode, for normal operation.
Address Data
5555 AA
2AAA 55
5555 80
5555 AA
2AAA 55
5555 20
Write Data
Write Address (Normal Data Input)
5555 AA
2AAA 55
5555 A0
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
ABSOLUTE MAXIMUM RA TINGS*
Voltage on Vcc Supply Relative to Vss................-0.5V to +7.0V1
Voltage on any pin Relative to Vss.......................-0.6V to +7.0V1
Storage T emperature ............................................-65°C to +150°C
Operating Temperature Range.............................-55oC to +125oC
Soldering Temperature Range...............................................260oC
Maximum Junction T emperature**....................................+150°C
Power Dissipation...................................................................1.0W
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability .
** Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow .
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TA < 125oC; Vcc = 5V +10%)
PARAMETER CONDITION SYMBOL MIN MAX UNITS NOTES
Input High (Logic 1) Voltage V
IH
2.2 V
CC
+ 0.3V V9
Input Low
(
Lo
g
ic 0
)
Volta
g
e
3
V
IL
-0.3 0.8 V 2
Input Voltage (RES\ Pin) V
H
Vcc-0.5 V
CC
+1.0 V
Input Leaka
g
e Current
4
OV < V
IN
< Vcc I
LI
-2 2 µΑ 4
Output Leakage Current Output(s) disabled, OV < V
OUT
< Vcc I
LO
-2 2 µΑ
Output High Voltage I
OH
= -400 µAV
OH
2.4 V
Output Low Voltage I
OL
= 2.1 mA V
OL
0.4 V
CONDITIONS SYM -15 -20
-25
UNITS NOTES
I
OUT
=OmA, Vcc = 5.5V
Cycle=1µS, Duty=100% 20 20 20
I
OUT
=OmA, Vcc = 5.5V
Cycle=MIN, Duty=100% 65 55 50
CE\=Vcc, Vcc = 5.5V I
CC1
350 350 350 µA
CE\=V
IH
, Vcc = 5.5V I
CC2
333mA
PARAMETER
MAX
Power Supply Current:
Operating
Power Supply Current:
Standby
I
CC3
mA
CAPACITANCE
PARAMETER CONDITIONS SYMBOL MAX UNITS NOTES
Input Capacitance CIN 6pF
Output Capactiance Co 12 pF
TA = 25oC, f = 1MHz
VIN = 0
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION
(-55oC < TC < 125oC; Vcc = 5V +10%)
T est Conditions
Input Pulse Levels: 0.0V to 3.0V
Input rise and fall times: < 20ns
Output Load: 1 TTL Gate +100pF (including scope and jig)
Reference levels for measuring timing: 1.5V , 1.5V
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AC ELECTRICAL CHARACTERISTICS FOR SOFTWARE DATA
PROTECTION CYCLE OPERATION
AC ELECTRICAL CHARACTERISTICS FOR DATA\ POLLING OPERATION
SYMBOL MIN MAX UNITS
tBLC 0.55 30 µS
tWC 10 --- mS
Byte Load Cycle Time
Write Cycle Time
PARAMETER
SYMBOL MIN MAX UNITS
t
OEH
0 --- ns
t
OES
0 --- ns
t
DW
150 --- ns
t
WC
--- 10 ms
Output Enable Hold Time
Output Enable to Write Setup Time
Write Start Time
Write Cycle Time
PARAMETER
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
AC ELECTRICAL CHARACTERISTICS FOR PAGE ERASE AND PAGE
WRITE OPERATIONS
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  
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µ
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µ
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µ
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EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
AC ELECTRICAL CHARACTERISTICS FOR BYTE ERASE AND BYTE
WRITE OPERATIONS
SYMBOL MIN MAX UNITS
tAS 0 --- ns
tCS70 --- ns
tCW8250 --- ns
tWP7250 --- ns
tAH 150 --- ns
tDS 100 --- ns
tDH 10 --- ns
tCH70 --- ns
tOES 0 --- ns
tOEH 0 --- ns
tWC 10 --- ms
tBL 100 --- µs
tDB 120 --- ns
tRP 100 --- µs
tRES10 1 --- µs
Address Hold Time
Data Setup Time
Vcc to RES\ Setup Time
Time to Device Busy
RES\ to Write Setup Time
PARAMETER
Address Setup Time
Chip Enable to Write Setup Time
Byte Load Window
Data Hold Time
Chip Enable Hold Time
Out Enable to Write Setup Time
Write Pulse Width
Output Enable Hold Time
Write Cycle Time
AC TEST CONDITIONS
Input Pulse Levels............................................0V to 3V
Input Rise and Fall Times....................................<20ns
Input Timing Reference Level................................1.5V
Output Reference Level..........................................1.5V
Output Load................................................See Figure 1
Q100pF 1 TTL GATE EQ.
Figure 1
OUTPUT LOAD EQUIV ALENT
NOTES:
1. Relative to Vss
2. VIN min = -3.0V for pulse widths <50ns
3. VIL min = -1.0V for pulse widths <50ns
4. IIL on RES\ = 100ua MAX
5. tOF is defined as the time at which E the output becomes and
open circuit and data is no longer driven.
6. Use this device in longer cycle than this value
7. WE\ controlled operation
8. CE\ controlled operation
9. RES\ pin VIH is VH
10. Reference only, not tested
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
READ TIMING WA VEFORM
SOFTWARE DATA PROTECTION TIMING WAVEFORM (protection mode)
tWC
tBLC
{
Write Address
W rite Data
5555
A0
AAAA
or
2AAA
55
5555
AA
Address
Data
Vcc
CE\
WE\
SOFTWARE DATA PROTECTION TIMING WAVEFORM (non-protection mode)
tWC
5555
80
AAAA
or
2AAA
55
5555
AA
Address
Data
Vcc
CE\
WE\
Normal active
mode
5555
AA 5555
20
AAAA
or
2AAA
55
Address
Data Out Valid
High-Z
tACC
tCE
tOE
tOH
tDF
tRR
tDFR
CE\
OE\
WE\
Data Out
RES\
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
DA TA\ POLLING TIMING WA VEFORM
1234
1
23
4
1234
An
An
DOUT X
DOUT X\
DIN X
tOEH
tCE
tOE
tOES
tDW
tWC
Address
CE\
WE\
OE\
I/O7
TOGGLE BIT WA VEFORM
DIN
tOEH
tCE
tOE
tOES
tDW
tWC
Address
CE\
WE\
OE\
I/O7 DOUT DOUT DOUT DOUT
Next Mode
In transition from HI to LOW or LOW to HI.
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
P AGE WRITE TIMING WA VEFORM
(WE\ CONTROLLED)
In transition from HI to LOW or LOW to HI.
12
12
12
12
12
12
12
12
1234
1
23
4
1
23
4
1234
123
123
123
123
123
12
12
12
12
12
12
12
12
1234
1
23
4
1
23
4
1234
123
123
123
123
123
123
123
123
123
123
12
12
12
12
12
12
12
12
1234
1
23
4
1
23
4
1234
123
123
123
123
123
tAS tAH
tWP tDL
tCS tCH
tOES
tBLC
tBL
tWC
tOEH
tDW
High-Z
High-Z
tDS
tDH
tDB
tRP
tRES
WE\
CE\
OE\
DIN
RDY/Busy\
A7 - A16
A0 - A6
RES\
VCC
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
P AGE WRITE TIMING WA VEFORM
(CE\ CONTROLLED)
In transition from HI to LOW or LOW to HI.
12
12
12
tAS tAH
tCW tDL
tWS tWH
tOES
tBLC
tBL
tWC
tOEH
tDW
High-Z
High-Z
tDS
tDH
tDB
tRP
tRES
WE\
CE\
OE\
DIN
RDY/Busy\
Address
A0 to A16
RES\
VCC
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
13
BYTE WRITE TIMING WA VEFORM
(WE\ CONTROLLED)
In transition from HI to LOW or LOW to HI.
tWC
tCH
tCS tAH
tOES
tAS tWP
tBL
tOEH
tDS tDH
tDB
tDWHigh-Z
High-Z
tRP
tRES
Address
CE\
WE\
OE\
DIN
RDY/Busy\
RES\
VCC
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
14
BYTE WRITE TIMING WA VEFORM
(CE\ CONTROLLED)
In transition from HI to LOW or LOW to HI.
tWH
tWS tAH
tOES
tAS
tCW
tBL
tOEH
tDS tDH
tDB
tDWHigh-Z
High-Z
tRP
tRES
Address
CE\
WE\
OE\
DIN
RDY/Busy\
RES\
VCC
tWC
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
15
ASI Case #208 (Package Designator ECA)
SMD 5962-38267, Case Outline U
MIN
MAX
A 0.060 0.120
A1 0.050 0.088
B1 0.022 0.028
B2
D 0.442 0.458
D1
D2
D3 --- 0.458
E 0.540 0.560
E1
E2
E3 --- 0.558
e
h
L 0.045 0.055
L1 0.075 0.095
SYMBOL SMD SPECIFICATIONS
0.072 REF
0.300 BSC
0.150 BSC
0.040 REF
0.050 BSC
0.200 BSC
0.400 BSC
D
E
E3
hx45o
A
A1
D3
MECHANICAL DEFINITIONS*
*All measurements are in inches.
E1
L1
B1
D1
L
e
B2
E2
D2
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
16
ASI Case #305 (Package Designator SF)
SMD 5962-38267, Case Outline N
MIN
MAX
A 0.125 0.150
A1 0.090 0.110
b 0.015 0.019
c 0.003 0.007
D 0.810 0.830
D1 0.775 0.785
D2 0.745 0.755
E 0.425 0.445
E1 0.290 0.310
e 0.045 0.055
H 1.000 1.100
L 0.290 0.310
Q 0.026 0.037
SYMBOL SMD SPECIFICATIONS
MECHANICAL DEFINITIONS*
*All measurements are in inches.
D
E
L
e
b
T op View
H
D1
D2
A1
c
E1
A
Q
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
17
*All measurements are in inches.
ASI Case #306 (Package Designator F)
SMD 5962-38267, Case Outline M
MECHANICAL DEFINITIONS*
MIN
MAX
A 0.097 0.123
A1 0.090 0.110
b 0.015 0.019
c 0.003 0.007
D 0.810 0.830
D2 0.745 0.755
E 0.425 0.445
E1 0.330 0.356
e 0.045 0.055
H 1.000 1.100
L 0.290 0.310
Q 0.026 0.037
SYMBOL SMD SPECIFICATIONS
NOTE: All drawings are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.
D
E
L
e
b
T op View
H
c
E1
A
Q
D2
A1
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
18
ASI Case #508 (Package Designator DCJ)
MECHANICAL DEFINITIONS*
*All measurements are in inches.
D
E
D1
A
A2
e
bE1
E2
B
A1
MIN MAX
A 0.132 0.142
A1 0.076 0.086
A2 0.018 0.028
B 0.018 0.032
b 0.015 0.019
D 0.816 0.834
D1 0.745 0.755
E 0.430 0.440
E1 0.465 0.485
E2 0.415 0.425
e 0.045 0.055
SYMBOL ASI PACKAGE SPECIFICATIONS
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
19
ASI Case (Package Designator DG)
MECHANICAL DEFINITIONS*
*All measurements are in millimeters.
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
20
ORDERING INFORMATION
Device Number Package
Type
Speed
ns Process Device Number Package
Type
Speed
ns Process
AS58C1001 ECA -15 /* AS58C1001 F -15 /*
AS58C1001 ECA -20 /* AS58C1001 F -20 /*
AS58C1001 ECA -25 /* AS58C1001 F -25 /*
EXAMPLE: AS58C1001DCJ-20/IT
Device Number Package
T
yp
e
Speed
ns Process Device Number Package
T
yp
e
Speed
ns Process
AS58C1001 SF -15 /* AS58C1001 DCJ -15 /*
AS58C1001 SF -20 /* AS58C1001 DCJ -20 /*
AS58C1001 SF -25 /* AS58C1001 DCJ -25 /*
EXAMPLE: AS58C1001DG-15/XT **
Device Number Package
T
yp
e
Speed
ns Process
AS58C1001 DG -15 /*
AS58C1001 DG -20 /*
AS58C1001 DG -25 /*
EXAMPLE: AS58C1001ECA-20/XT
EXAMPLE: AS58C1001SF-15/IT
EXAMPLE: AS58C1001F-25/883C
*AVAILABLE PROCESSES
IT = Industrial Temperature Range -40oC to +85oC
XT = Extended Temperature Range -55oC to +125oC
883C = Full Military Processing -55oC to +125oC
**NOTE: DG package available as XT and IT only .
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AS58C1001
Rev. 5.1 7/04 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
21
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
Package Designator ECA
ASI Part # SMD Part#
AS58C1001ECA-25/883C 5962-3826716QUA
AS58C1001ECA-20/883C 5962-3826717QUA
AS58C1001ECA-15/883C 5962-3826718QUA
Package Designator F
ASI Part # SMD Part#
AS58C1001F-25/883C 5962-3826716QMA
AS58C1001F-20/883C 5962-3826717QMA
AS58C1001F-15/883C 5962-3826718QMA
Package Designator SF
ASI Part # SMD Part#
AS58C1001SF-25/883C 5962-3826716QNA
AS58C1001SF-20/883C 5962-3826717QNA
AS58C1001SF-15/883C 5962-3826718QNA
Package Designators DCJ and DG not currenly
available on the SMD.
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.