General Description
The MAX5417/MAX5418/MAX5419 nonvolatile, linear-
taper, digital potentiometers perform the function of a
mechanical potentiometer by replacing the mechanics
with a simple 2-wire digital interface, allowing communi-
cation with multiple devices. Each device performs the
same function as a discrete potentiometer or variable
resistor and has 256 tap points.
The devices feature an internal, nonvolatile EEPROM
used to store the wiper position for initialization during
power-up. The fast-mode I2C-compatible serial interface
allows communication at data rates up to 400kbps, mini-
mizing board space and reducing interconnection com-
plexity in many applications. Each device is available with
one of four factory-preset addresses (see the
Ordering
Information/Selector Guide
) and features an address
input for a total of eight unique address combinations.
The MAX5417/MAX5418/MAX5419 provide three nomi-
nal resistance values: 50kΩ(MAX5417), 100kΩ
(MAX5418), or 200kΩ(MAX5419). The nominal resistor
temperature coefficient is 35ppm/°C end-to-end, and
only 5ppm/°C ratiometric. This makes the devices ideal
for applications requiring a low-temperature-coefficient
variable resistor, such as low-drift, programmable gain-
amplifier circuit configurations.
The MAX5417/MAX5418/MAX5419 are available in a
3mm x 3mm 8-pin TDFN package, and are specified
over the extended -40°C to +85°C temperature range.
Applications
Mechanical Potentiometer Replacement
Low-Drift Programmable-Gain Amplifiers
Volume Control
Liquid-Crystal Display (LCD) Contrast Control
Features
oPower-On Recall of Wiper Position from
Nonvolatile Memory
oTiny 3mm x 3mm 8-Pin TDFN Package
o35ppm/°C End-to-End Resistance Temperature
Coefficient
o5ppm/°C Ratiometric Temperature Coefficient
o50kΩ/100kΩ/200kΩResistor Values
oFast I2C-Compatible Serial Interface
o500nA (typ) Static Supply Current
oSingle-Supply Operation: +2.7V to +5.25V
o256 Tap Positions
o±0.5 LSB DNL in Voltage-Divider Mode
o±0.5 LSB INL in Voltage-Divider Mode
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
________________________________________________________________
Maxim Integrated Products
1
VDD
GND
SDA
SCL
8-BIT
SHIFT
REGISTER
8-BIT
LATCH
8-BIT
NV
MEMORY
I2C
INTERFACE
A0
8
8256 W
L
256-
POSITION
DECODER
H
POR MAX5417
MAX5418
MAX5419
Ordering Information/Selector Guide
Functional Diagram
19-3185; Rev 4; 4/10
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Pin Configuration appears at end of data sheet.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
**
Exposed pad.
PART TEMP RANGE I2C ADDRESS R (kΩ) PIN-PACKAGE TOP MARK
MAX5417LETA+ -40°C to +85°C 010100A050 8 TDFN-EP** AIB
MAX5417META+ -40°C to +85°C 010101A050 8 TDFN-EP** ALS
MAX5417NETA+ -40°C to +85°C 010110A050 8 TDFN-EP** ALT
MAX5417PETA+ -40°C to +85°C 010111A050 8 TDFN-EP** ALU
MAX5418LETA+ -40°C to +85°C 010100A0100 8 TDFN-EP** AIC
MAX5418META+ -40°C to +85°C 010101A0100 8 TDFN-EP** ALV
MAX5418NETA+ -40°C to +85°C 010110A0100 8 TDFN-EP** ALW
MAX5418PETA+ -40°C to +85°C 010111A0100 8 TDFN-EP** ALX
MAX5419LETA+ -40°C to +85°C 010100A0200 8 TDFN-EP** AID
MAX5419META+ -40°C to +85°C 010101A0200 8 TDFN-EP** ALY
MAX5419NETA+ -40°C to +85°C 010110A0200 8 TDFN-EP** ALZ
MAX5419PETA+ -40°C to +85°C 010111A0200 8 TDFN-EP** AMA
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND...........................................................-0.3V to +6.0V
All Other Pins to GND.................................-0.3V to (VDD + 0.3V)
Maximum Continuous Current into H, L, and W
MAX5417......................................................................±1.3mA
MAX5418......................................................................±0.6mA
MAX5419......................................................................±0.3mA
Continuous Power Dissipation (TA= +70°C)
8-Pin TDFN (derate 24.4mW/°C above +70°C) .........1951mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DC PERFORMANCE (VOLTAGE-DIVIDER MODE)
Resolution 256 Taps
Integral Nonlinearity INL (Note 1) ±0.5 LSB
Differential Nonlinearity DNL (Note 1) ±0.5 LSB
End-to-End Temperature
Coefficient TCR35 ppm/°C
Ratiometric Temperature
Coefficient 5 ppm/°C
MAX5417_, 50Ω-0.6
MAX5418_, 100kΩ-0.3Full-Scale Error
MAX5419_, 200kΩ-0.15
LSB
MAX5417_, 50kΩ0.6
MAX5418_, 100kΩ0.3
Zero-Scale Error
MAX5419_, 200kΩ0.15
LSB
DC PERFORMANCE (VARIABLE-RESISTOR MODE)
VDD = 3V ±3
Integral Nonlinearity
(Note 2) INL VDD = 5V ±1.5 LSB
VDD = 3V, MAX5417_, 50kΩ-1 +2
VDD = 3V, MAX5418_, 100kΩ±1
VDD = 3V, MAX5419_, 200kΩ±1
Differential Nonlinearity
(Note 2) DNL
VDD = 5V ±1
LSB
DC PERFORMANCE (RESISTOR CHARACTERISTICS)
Wiper Resistance RWVDD = 3V to 5.25V (Note 3) 325 675 Ω
Wiper Capacitance CW10 pF
MAX5417_ 37.5 50 62.5
MAX5418_ 75 100 125
End-to-End Resistance RHL
MAX5419_ 150 200 250
kΩ
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA= +25°C.)
DIGITAL INPUTS
VDD = 3.4V to 5.25V 2.4
Input High Voltage (Note 4) VIH VDD < 3.4V 0.7 x VDD
V
Input Low Voltage VIL VDD = 2.7V to 5.25V (Note 4) 0.8 V
Low-Level Output Voltage VOL 3mA sink current 0.4 V
Input Leakage Current ILEAK ±1 µA
Input Capacitance 5pF
DYNAMIC CHARACTERISTICS
MAX5417_ 100
MAX5418_ 50
Wiper -3dB Bandwidth (Note 5)
MAX5419_ 25
kHz
NONVOLATILE MEMORY
Data Retention TA = +85°C 50 Years
TA = +25°C 200,000
Endurance TA = +85°C 50,000 Stores
POWER SUPPLY
Power-Supply Voltage VDD 2.70 5.25 V
Standby Current IDD Digital inputs = VDD or GND,
TA = +25°C 0.5 1 µA
Programming Current During nonvolatile write;
digital inputs = VDD or GND (Note 6) 200 400 µA
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ANALOG SECTION
MAX5417_ 500
MAX5418_ 600Wiper Settling Time (Note 8) tIL
MAX5419_ 1000
ns
DIGITAL SECTION
SCL Clock Frequency fSCL 400 kHz
Setup Time for START Condition tSU-STA 0.6 µs
Hold Time for START Condition tHD-STA 0.6 µs
CLK High Time tHIGH 0.6 µs
CLK Low Time tLOW 1.3 µs
TIMING CHARACTERISTICS
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA=
+25°C. See Figures 1 and 2.) (Note 7)
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
4 _______________________________________________________________________________________
Note 1: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H = VDD and L = GND. The
wiper terminal is unloaded and measured with a high-input-impedance voltmeter.
Note 2: The DNL and INL are measured with the potentiometer configured as a variable resistor. H is unconnected and L = GND.
For the 5V condition, the wiper terminal is driven with a source current of 80µA for the 50kΩconfiguration, 40µA for the
100kΩconfiguration, and 20µA for the 200kΩconfiguration. For the 3V condition, the wiper terminal is driven with a source
current of 40µA for the 50kΩconfiguration, 20µA for the 100kΩconfiguration, and 10µA for the 200kΩconfiguration.
Note 3: The wiper resistance is measured using the source currents given in Note 2. For operation to VDD = 2.7V, see Wiper
Resistance vs. Temperature in the
Typical Operating Characteristics.
Note 4: The device draws higher supply current when the digital inputs are driven with voltages between (VDD - 0.5V) and (GND +
0.5V). See Supply Current vs. Digital Input Voltage in the
Typical Operating Characteristics.
Note 5: Wiper at midscale with a 10pF load (DC measurement). L = GND; an AC source is applied to H; and the W output is mea-
sured. A 3dB bandwidth occurs when the AC W/H value is 3dB lower than the DC W/H value.
Note 6: The programming current operates only during power-up and NV writes.
Note 7: SCL clock period includes rise and fall times tRand tF. All digital input signals are specified with tR= tF= 2ns and timed
from a voltage level of (VIL + VIH) / 2.
Note 8: Wiper settling time is the worst-case 0% to 50% rise time measured between consecutive wiper positions. H = VDD,
L = GND, and the wiper terminal is unloaded and measured with a 10pF oscilloscope probe (see the
Typical Operating
Characteristics
for the tap-to-tap switching transient).
Note 9: An appropriate bus pullup resistance must be selected depending on board capacitance. Refer to the document linked to
this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf.
Note 10: The idle time begins from the initiation of the stop pulse.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Data Setup Time tSU-DAT 100 ns
Data Hold Time tHD-DAT 0 0.9 µs
SDA, SCL Rise Time tR300 ns
SDA, SCL Fall Time tF300 ns
Setup Time for STOP Condition tSU-STO 0.6 µs
Bus Free Time Between STOP
and START Condition tBUF Minimum power-up rate = 0.2V/ms 1.3 µs
Pulse Width of Spike Suppressed tSP 50 ns
Maximum Capacitive Load for
Each Bus Line CB(Note 9) 400 pF
Write NV Register Busy Time tBUSY (Note 10) 12 ms
TIMING CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA=
+25°C. See Figures 1 and 2.) (Note 7)
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
_______________________________________________________________________________________
5
WIPER TRANSIENT AT POWER-ON
MAX5417 toc04
W
1V/div
VDD
2V/div
4µs/div
CL = 10pF
TAP = 128
H = VDD
END-TO-END RESISTANCE % CHANGE
vs. TEMPERATURE
MAX5417 toc05
TEMPERATURE (°C)
END-TO-END RESISTANCE % CHANGE
603510-15
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
-40 85
DNL vs. TAP POSITION
MAX5417 toc01
TAP POSITION
DNL (LSB)
224192160128966432
-0.20
-0.15
-0.10
-0.05
0
0.10
0.20
0.05
0.15
0.25
-0.25
0 256
VOLTAGE-DIVIDER MODE
TAP POSITION
INL (LSB)
224192160128966432
-0.20
-0.15
-0.10
-0.05
0
0.10
0.20
0.05
0.15
0.25
-0.25
0256
INL vs. TAP POSITION
MAX5417 toc02
VOLTAGE-DIVIDER MODE
WIPER RESISTANCE vs. TAP POSITION
MAX5417 toc03
TAP POSITION
RESISTANCE (Ω)
224192160128966432
100
200
300
400
500
600
700
0
0 256
VDD = 2.7V
ISRC = 50µA
Typical Operating Characteristics
(VDD = +5V, TA= +25°C, unless otherwise noted.)
STANDBY SUPPLY CURRENT
vs. TEMPERATURE
MAX5417 toc06
TEMPERATURE (°C)
STANDBY SUPPLY CURRENT (µA)
603510-15
0.2
0.4
0.6
0.8
1.0
0
-40 85
WIPER RESISTANCE vs. TEMPERATURE
MAX5417 toc07
TEMPERATURE (°C)
RESISTANCE (Ω)
603510-15
100
200
300
400
500
600
700
0
-40 85
VDD = 2.7V
VDD = 3.0V
VDD = 4.5V
VDD = 5.25V
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
6 _______________________________________________________________________________________
SUPPLY CURRENT
vs. DIGITAL INPUT VOLTAGE
MAX5417 toc08
DIGITAL INPUT VOLTAGE (V)
SUPPLY CURRENT (µA)
4321
100
200
300
400
500
600
0
05 10k1k100
0.001
0.01
0.1
1
10
100
0.0001
10 100k
THD+N RESPONSE
MAX5417 toc09
FREQUENCY (Hz)
THD+N (%)
1:1 RATIO
20Hz TO 20kHz BANDPASS
INL vs. TAP POSITION
(MAX5417)
MAX5417 toc10
TAP POSITION
INL (LSB)
224192160128966432
-0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
-1.0
0256
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 50µA
Typical Operating Characteristics (continued)
(VDD = +5V, TA= +25°C, unless otherwise noted.)
INL vs. TAP POSITION
(MAX5418)
MAX5417 toc11
TAP POSITION
INL (LSB)
224192160128966432
-0.5
0
0.5
1.0
1.5
2.0
-1.0
0256
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 20µA
INL vs. TAP POSITION
(MAX5419)
MAX5417 toc12
TAP POSITION
INL (LSB)
22419232 64 96 128 160
-0.75
-0.50
-0.25
0
0.25
0.50
0.75
1.00
-1.00
0256
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 10µA
DNL vs. TAP POSITION
(MAX5417)
MAX5417 toc13
TAP POSITION
DNL (LSB)
224192160128966432
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.3
0256
VARIABLE-RESISTOR MODE
DNL vs. TAP POSITION
(MAX5418)
MAX5417 toc14
TAP POSITION
DNL (LSB)
224192160128966432
-0.2
-0.1
0
0.1
0.2
0.3
-0.3
0256
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 20µA
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
_______________________________________________________________________________________
7
-0.2
-0.1
0
0.1
0.2
0.3
-0.3
DNL vs. TAP POSITION
(MAX5419)
MAX5417 toc15
TAP POSITION
DNL (LSB)
22419232 64 96 128 1600 256
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 10µA
MIDSCALE WIPER RESPONSE vs. FREQUENCY
(MAX5417)
MAX5417 toc16
FREQUENCY (kHz)
WIPER RESPONSE (dB)
10010
-25
-20
-10
-15
-5
MAX5417
TAP = 128
CL = 50pF
CL = 10pF
0
-30
1 1000
MIDSCALE WIPER RESPONSE vs. FREQUENCY
(MAX5418)
MAX5417 toc17
FREQUENCY (kHz)
WIPER RESPONSE (dB)
10010
-25
-20
-10
-15
-5
MAX5418
TAP = 128
CL = 50pF
CL = 10pF
0
-30
11000
MIDSCALE WIPER RESPONSE vs. FREQUENCY
(MAX5419)
MAX5417 toc18
FREQUENCY (kHz)
WIPER RESPONSE (dB)
10010
-40
-35
-30
-25
-20
-15
-10
-5
0
-45
1 1000
MAX5419
TAP = 128 CL = 10pF
CL = 50pF
TAP-TO-TAP SWITCHING TRANSIENT
(MAX5417)
MAX5417 toc19
W
10mV/div
SDA
2V/div
1µs/div
MAX5417
CL = 10pF
FROM TAP 127
TO TAP 128
H = VDD
TAP-TO-TAP SWITCHING TRANSIENT
(MAX5418)
MAX5417 toc20
W
10mV/div
SDA
2V/div
1µs/div
MAX5418
CL = 10pF
FROM TAP 127
TO TAP 128
H = VDD
TAP-TO-TAP SWITCHING TRANSIENT
(MAX5419)
MAX5417 toc21
W
10mV/div
SDA
2V/div
1µs/div
MAX5419
CL = 10pF
FROM TAP 127
TO TAP 128
H = VDD
Typical Operating Characteristics (continued)
(VDD = +5V, TA= +25°C, unless otherwise noted.)
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
8 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1V
DD Power-Supply Input. 2.7V to 5.25V voltage range. Bypass with a 0.1µF capacitor from VDD to GND.
2 SCL I2C-Interface Clock Input
3 SDA I2C-Interface Data Input
4A
0Address Input. Sets the A0 bit in the device ID address.
5 GND Ground
6 L Low Terminal
7 W Wiper Terminal
8 H High Terminal
—EP
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance. Not intended as an electrical point.
tHD-STA
tSU-DAT
tHIGH
tRtF
tHD-DAT tHD-STA
SSr A
tSU-STA
tLOW
tBUF
tSU-STO
PS
tRtF
SCL
SDA
PARAMETERS ARE MEASURED FROM 30% TO 70%.
Detailed Description
The MAX5417/MAX5418/MAX5419 contain a resistor
array with 255 resistive elements. The MAX5417 has a
total end-to-end resistance of 50kΩ, the MAX5418 has
an end-to-end resistance of 100kΩ, and the MAX5419
has an end-to-end resistance of 200kΩ. The
MAX5417/MAX5418/MAX5419 allow access to the high,
low, and wiper terminals for a standard voltage-divider
configuration. H, L, and W can be connected in any
desired configuration as long as their voltages fall
between GND and VDD.
A simple 2-wire I2C-compatible serial interface moves
the wiper among the 256 tap points. A nonvolatile mem-
ory stores the wiper position and recalls the stored wiper
position in the nonvolatile memory upon power-up. The
nonvolatile memory is guaranteed for 50 years for wiper
data retention and up to 200,000 wiper store cycles.
Figure 1. I2C Serial-Interface Timing Diagram
VDD
IOL = 3mA
IOH = 0mA
VOUT
400pF
SDA
Figure 2. Load Circuit
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
_______________________________________________________________________________________ 9
Analog Circuitry
The MAX5417/MAX5418/MAX5419 consist of a resistor
array with 255 resistive elements; 256 tap points are
accessible to the wiper, W, along the resistor string
between H and L. The wiper tap point is selected by
programming the potentiometer through the 2-wire (I2C)
interface. Eight data bits, an address byte, and a con-
trol byte program the wiper position. The H and L termi-
nals of the MAX5417/MAX5418/MAX5419 are similar to
the two end terminals of a mechanical potentiometer.
The MAX5417/MAX5418/MAX5419 feature power-on
reset circuitry that loads the wiper position from non-
volatile memory at power-up.
Digital Interface
The MAX5417/MAX5418/MAX5419 feature an internal,
nonvolatile EEPROM that stores the wiper state for ini-
tialization during power-up. The shift register decodes
the control and address bits, routing the data to the
proper memory registers. Data can be written to a
volatile memory register, immediately updating the
wiper position, or data can be written to a nonvolatile
register for storage.
The volatile register retains data as long as the device
is powered. Once power is removed, the volatile regis-
ter is cleared. The nonvolatile register retains data even
after power is removed. Upon power-up, the power-on
reset circuitry controls the transfer of data from the non-
volatile register to the volatile register.
Serial Addressing
The MAX5417/MAX5418/MAX5419 operate as a slave
that receives data through an I2C- and SMBus™-com-
patible 2-wire interface. The interface uses a serial data
access (SDA) line and a serial clock line (SCL) to
achieve communication between master(s) and
slave(s). A master, typically a microcontroller, initiates
all data transfers to the MAX5417/MAX5418/MAX5419,
and generates the SCL clock that synchronizes the
data transfer (Figure 1).
The MAX5417/MAX5418/MAX5419 SDA line operates
as both an input and an open-drain output. A pullup
resistor, typically 4.7kΩ, is required on the SDA bus.
The MAX5417/MAX5418/MAX5419 SCL operates only
as an input. A pullup resistor, typically 4.7kΩ, is
required on the SCL bus if there are multiple masters
on the 2-wire interface, or if the master in a single-mas-
ter system has an open-drain SCL output.
Each transmission consists of a START (S) condition
(Figure 3) sent by a master, followed by the
MAX5417/MAX5418/MAX5419 7-bit slave address plus
the 8th bit (Figure 4), 1 command byte (Figure 7) and 1
data byte, and finally a STOP (P) condition (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START condition by transitioning SDA from
high to low while SCL is high. When the master has fin-
ished communicating with the slave, it issues a STOP
condition by transitioning the SDA from low to high
while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable while SCL
is high (Figure 5).
SDA
START
CONDITION
SCL
S
STOP
CONDITION
P
Figure 3. Start and Stop Conditions
SDA
SCL
*See the Ordering Information/Selector Guide section for other address options.
01 A0
MSB LSB
NOP/W ACK
0 1 0* 0*
Figure 4. Slave Address
SMBus is a trademark of Intel Corporation.
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
10 ______________________________________________________________________________________
Acknowledge
The acknowledge bit is a clocked 9th bit that the recipient
uses to handshake receipt of each byte of data (Figure
6). Thus, each byte transferred effectively requires 9 bits.
The master generates the 9th clock pulse, and the recipi-
ent pulls down SDA during the acknowledge clock pulse,
so the SDA line is stable low during the high period of the
clock pulse. When the master transmits to the
MAX5417/MAX5418/MAX5419, the devices generate the
acknowledge bit because the MAX5417/MAX5418/
MAX5419 are the recipients.
Slave Address
The MAX5417/MAX5418/MAX5419 have a 7-bit-long
slave address (Figure 4). The 8th bit following the 7-bit
slave address is the NOP/Wbit. Set the NOP/Wbit low for
a write command and high for a no-operation command.
The MAX5417/MAX5418/MAX5419 are available in one
of four possible slave addresses (Table 1). The first 4
bits (MSBs) of the MAX5417/MAX5418/MAX5419 slave
addresses are always 0101. The next 2 bits are factory
programmed (see Table 1). Connect the A0input to
either GND or VDD to toggle between two unique
device addresses for a part. Each device must have a
unique address to share the bus. Therefore, a maxi-
mum of eight MAX5417/MAX5418/MAX5419 devices
can share the same bus.
Table 1. MAX5417/MAX5418/MAX5419 Address Codes
ADDRESS BYTE
PART SUFFIX A6 A5 A4 A3 A2 A1 A0 NOP/W
L0 1 0 1 0 0 0 NOP/W
L0 1 0 1 0 0 1 NOP/W
M0 1 0 1 0 1 0 NOP/W
M0 1 0 1 0 1 1 NOP/W
N0 1 0 1 1 0 0 NOP/W
N0 1 0 1 1 0 1 NOP/W
P0 1 0 1 1 1 0 NOP/W
P0 1 0 1 1 1 1 NOP/W
SDA
DATA STABLE,
DATA VALID
CHANGE OF
DATA ALLOWED
SCL
Figure 5. Bit Transfer
1
SCL
START
CONDITION
SDA
289
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
Figure 6. Acknowledge
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
______________________________________________________________________________________ 11
Message Format for Writing
A write to the MAX5417/MAX5418/MAX5419 consists of
the transmission of the device’s slave address with the
8th bit set to zero, followed by at least 1 byte of infor-
mation (Figure 7). The 1st byte of information is the
command byte. The bytes received after the command
byte are the data bytes. The 1st data byte goes into the
internal register of the MAX5417/MAX5418/MAX5419 as
selected by the command byte (Figure 8).
Command Byte
Use the command byte to select the source and desti-
nation of the wiper data (nonvolatile or volatile memory
registers) and swap data between nonvolatile and
volatile memory registers (see Table 2).
Command Descriptions
VREG: The data byte writes to the volatile memory reg-
ister and the wiper position updates with the data in the
volatile memory register.
NVREG: The data byte writes to the nonvolatile memo-
ry register. The wiper position is unchanged.
NVREGxVREG: Data transfers from the nonvolatile
memory register to the volatile memory register (wiper
position updates).
VREGxNVREG: Data transfers from the volatile memo-
ry register into the nonvolatile memory register.
A
0SLAVE ADDRESS CONTROL BYTE DATA BYTE
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
NOP/W 1 BYTE
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6
HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX5417/MAX5418/MAX5419 REGISTERS
S AA P
S A0SLAVE ADDRESS CONTROL BYTE
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
NOP/W ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
D15 D14 D13 D12 D11 D10 D9 D8
CONTROL BYTE IS STORED ON RECEIPT OF STOP CONDITION
AP
Figure 7. Command Byte Received
Figure 8. Command and Single Data Byte Received
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
12 ______________________________________________________________________________________
ADDRESS BYTE CONTROL BYTE DATA BYTE
12345678 9 1011121314151617 18 19 2021 22 23 2425 26 27 P
SCL CYCLE
NUMBER S
A6 A5 A4 A3 A2 A1 A0 ACK TX NV V R3 R2 R1 R0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK
VREG 0 1 0 1 A2 A1 A0 0 0 0 0 1 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0
NVREG 0 1 0 1 A2 A1 A0 0 0 0 1 0 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0
NVREGxVREG 0101A2A1A00 01100001 XXXXXXXX
VREGxNVREG 0101A2A1A00 01010001 XXXXXXXX
Table 2. Command Byte Summary
Nonvolatile Memory
The internal EEPROM consists of an 8-bit nonvolatile
register that retains the value written to it before the
device is powered down. The nonvolatile register is
programmed with the midscale value at the factory.
Power-Up
Upon power-up, the MAX5417/MAX5418/MAX5419
load the data stored in the nonvolatile memory register
into the volatile memory register, updating the wiper
position with the data stored in the nonvolatile memory
register. This initialization period takes 10µs.
Standby
The MAX5417/MAX5418/MAX5419 feature a low-power
standby. When the device is not being programmed, it
goes into standby mode and power consumption is
typically 500nA.
Applications Information
The MAX5417/MAX5418/MAX5419 are intended for cir-
cuits requiring digitally controlled adjustable resis-
tance, such as LCD contrast control (where voltage
biasing adjusts the display contrast), or for programma-
ble filters with adjustable gain and/or cutoff frequency.
Positive LCD Bias Control
Figures 9 and 10 show an application where the volt-
age-divider or variable resistor is used to make an
adjustable, positive LCD bias voltage. The op amp pro-
vides buffering and gain to the resistor-divider network
made by the potentiometer (Figure 9) or to a fixed
resistor and a variable resistor (see Figure 10).
Programmable Filter
Figure 11 shows the configuration for a 1st-order pro-
grammable filter. The gain of the filter is adjusted by
R2, and the cutoff frequency is adjusted by R3. Use the
following equations to calculate the gain (G) and the
3dB cutoff frequency (fC):
GR
R
fRC
C
=+
=××
11
2
1
23π
VOUT
30V
5V
W
H
L
MAX5417
MAX5418
MAx5419
VOUT
30V
5V
W
H
L
MAX5417
MAX5418
MAX5419
Figure 9. Positive LCD Bias Control Using a Voltage-Divider Figure 10. Positive LCD Bias Control Using a Variable Resistor
X = Don’t care.
Adjustable Voltage Reference
Figure 12 shows the MAX5417/MAX5418/MAX5419 used
as the feedback resistors in multiple adjustable voltage-
reference applications. Independently adjust the output
voltage of the MAX6160 from 1.23V to VIN - 0.2V by
changing the wiper positions of the MAX5417/
MAX5418/MAX5419.
Offset Voltage and Gain Adjustment
Connect the high and low terminals of one potentiometer
of a MAX5417 between the NULL inputs of a MAX410
and the wiper to the op amp’s positive supply to nullify
the offset voltage over the operating temperature range.
Install the other potentiometer in the feedback path to
adjust the gain of the MAX410 (see Figure 13).
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
______________________________________________________________________________________ 13
W
H
L
MAX6160
MAX5417
MAX5418
MAX5419
+5V
GND
VIN
OUT
ADJ
V0 REF
Figure 12. Adjustable Voltage Reference
6
8
1
7
3
2
W
H
L
R1
5V
-5V
MAX410
4
MAX5417
MAX5418
MAX5419
Figure 13. Offset Voltage and Gain Adjustment Circuit
VOUT
R1
W
H
L
MAX5417
MAX5418
MAX5419
R2
VIN
R3
H
W
L
C
Figure 11. Programmable Filter
L
GNDA0
1
+
2
8
7
H
WSCL
SDA
VDD
TDFN
TOP VIEW
3
4
6
5
MAX5417
MAX5418
MAX5419
Pin Configuration
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
8 TDFN-EP T833-1 21-0137
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 2/04 Initial release —
1 4/04 Adding future product —
2 8/04 Adding new part —
3 3/09 Changes to add details about exposed pad, corrections to Table 2, style edits 1, 8, 12–15
4 4/10
Ad d ed l ead - fr ee p ackag es to O r d er i ng Infor m ati on, ad d ed S ol d er i ng Tem p er atur e to
Ab sol ute M axi m um Rati ng s, cor r ected C ond i ti ons for D i ffer enti al N onl i near i ty i n
E l ectr i cal C har acter i sti cs, cor r ected A0
i n P i n D escr i p ti on, cor r ected Fi g ur es 12 and 13
1, 2, 8, 13
