74LVC04ADR2G - ON SEMICONDUCTOR

September, 2015 − Rev. 0 1Publication Order Number:

74LVC04A/D

74LVC04A

Low-Voltage CMOS Hex

Inverter

With 5 V−Tolerant Inputs

The 74LVC04A is a high performance hex inverter operating from a

1.2 to 3.6 V supply. High impedance TTL compatible inputs

significantly reduce current loading to input drivers while TTL

compatible outputs of fer improved switching noise performance. A VI

specification of 5.5 V allows 74LVC04A inputs to be safely driven

from 5 V devices if VCC is less than 5.0 V.

Current drive capability is 24 mA at the outputs.

Features

•Designed for 1.2 V to 3.6 V VCC Operation

•5.0 V Tolerant Inputs − Interface Capability With 5.0 V TTL Logic

•24 mA Output Sink and Source Capability

•Near Zero Static Supply Current (10 mA) Substantially Reduces

System Power Requirements

•ESD Performance: Human Body Model >2000 V

Machine Model >200 V

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

2O0

4O1

6O2

12 O3

10 O4

8O5

Figure 1. Logic Diagram

A = Assembly Location

WL, L = Wafer Lot

YY, Y = Year

WW, W = Work Week

G or G= Pb−Free Package

TSSOP−14

DT SUFFIX

CASE 948G

SOIC−14 NB

D SUFFIX

CASE 751A

LVC

04A

ALYWG

MARKING DIAGRAMS

LVC04AG

AWLYWW

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

ORDERING INFORMATION

www.onsemi.com

(Note: Microdot may be in either location)

TSSOP−14

SOIC−14 NB

PIN ASSIGNMENT

1314 12 11 10 9 8

21 34567

VCC A3 O3A4O4A5O5

A0 O0A1O1A2O2 GND

14−Lead (Top View)

74LVC04A

www.onsemi.com

PIN NAMES

Function

Data Inputs

Outputs

Pins

TRUTH TABLE

An On

MAXIMUM RATINGS

Symbol Parameter Value Condition Unit

VCC DC Supply Voltage −0.5 to +6.5 V

VIDC Input Voltage −0.5 ≤ VI ≤ +6.5 V

VODC Output Voltage −0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State

(Note 1) V

IIK DC Input Diode Current −50 VI < GND mA

IOK DC Output Diode Current −50 VO < GND mA

+50 VO > VCC mA

IODC Output Source/Sink Current ±50 mA

ICC DC Supply Current Per Supply Pin ±100 mA

IGND DC Ground Current Per Ground Pin ±100 mA

TSTG Storage Temperature Range −65 to +150 °C

TLLead Temperature, 1 mm from Case for

10 Seconds TL = 260 °C

TJJunction Temperature Under Bias TJ = 135 °C

qJA Thermal Resistance (Note 2) SOIC = 85

TSSOP = 100 °C/W

MSL Moisture Sensitivity Level 1

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be af fected.

1. IO absolute maximum rating must be observed.

2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Typ Max Units

VCC Supply Voltage

Operating

Functional 1.65

1.2 3.6

3.6

VIInput Voltage 0 5.5 V

VOOutput Voltage

HIGH or LOW State

3−State 0

0VCC

5.5

IOH HIGH Level Output Current

VCC = 3.0 V − 3.6 V

VCC = 2.7 V − 3.0 V −24

−12

IOL LOW Level Output Current

VCC = 3.0 V − 3.6 V

VCC = 2.7 V − 3.0 V 24

TAOperating Free−Air Temperature −40 +125 °C

Dt/DVInput Transition Rise or Fall Rate

VCC = 1.65 V to 2.7 V

VCC = 2.7 V to 3.6 V 0

020

ns/V

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

74LVC04A

www.onsemi.com

DC ELECTRICAL CHARACTERISTICS

Symbol Parameter Conditions

−405C to +855C−405C to +1255C

Unit

Min Typ

(Note 3) Max Min Typ

(Note 3) Max

VIH HIGH−level input

voltage VCC = 1.2 V 1.08 − − 1.08 − − V

VCC = 1.65 V to 1.95 V 0.65 x

VCC − − 0.65 x

VCC − −

VCC = 2.3 V to 2.7 V 1.7 − − 1.7 − −

VCC = 2.7 V to 3.6 V 2.0 − − 2.0 − −

VIL LOW−level input

voltage VCC = 1.2 V − − 0.12 − − 0.12 V

VCC = 1.65 V to 1.95 V − −0.35 x

VCC − − 0.35 x

VCC

VCC = 2.3 V to 2.7 V − − 0.7 − − 0.7

VCC = 2.7 V to 3.6 V − − 0.8 − − 0.8

VOH HIGH−level output

voltage VI = VIH or VIL V

IO = −100 mA;

VCC = 1.65 V to 3.6 V VCC −

0.2 − − VCC −

0.3 − −

IO = −4 mA; VCC = 1.65 V 1.2 − − 1.05 − −

IO = −8 mA; VCC = 2.3 V 1.8 − − 1.65 − −

IO = −12 mA; VCC = 2.7 V 2.2 − − 2.05 − −

IO = −18 mA; VCC = 3.0 V 2.4 − − 2.25 − −

IO = −24 mA; VCC = 3.0 V 2.2 − − 2.0 − −

VOL LOW−level output

voltage VI = VIH or VIL V

IO = 100 mA;

VCC = 1.65 V to 3.6 V − − 0.2 − − 0.3

IO = 4 mA; VCC = 1.65 V − − 0.45 − − 0.65

IO = 8 mA; VCC = 2.3 V − − 0.6 − − 0.8

IO = 12 mA; VCC = 2.7 V − − 0.4 − − 0.6

IO = −24 mA; VCC = 3.0 V − − 0.55 − − 0.8

IIInput leakage current VI = 5.5V or GND VCC = 3.6 V −±0.1 ±5 − ±0.1 ±20 mA

IOFF Power−off leakage

current VI or VO = 5.5 V; VCC = 0.0 V −±0.1 ±10 − ±0.1 ±20 mA

ICC Supply current VI = VCC or GND; IO = 0 A;

VCC = 3.6 V − 0.1 10 − 0.1 40 mA

DICC Additional supply

current per input pin;

VI = VCC − 0.6 V ; IO = 0 A;

VCC = 2.7 V to 3.6 V

− 5 500 − 5 5000 mA

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

3. All typical values are measured at TA = 25°C and VCC = 3.3 V, unless stated otherwise.

74LVC04A

www.onsemi.com

AC ELECTRICAL CHARACTERISTICS (tR = tF = 2.5 ns)

Symbol Parameter Conditions

−405C to +855C−405C to +1255C

Unit

Min Typ1Max Min Typ1Max

tpd Propagation Delay (Note 5) VCC = 1.2 V − 14.0 − − − − ns

VCC = 1.65 V to 1.95 V 0.5 3.7 8.8 0.5 − 10.2 ns

VCC = 2.3 V to 2.7 V 0.5 2.2 5.0 0.5 − 5.8

VCC = 2.7 V 0.5 2.1 5.5 0.5 − 7.0

VCC = 3.0 V to 3.6 V 0.5 2.0 4.5 0.5 − 6.0

tsk(0) Output Skew Time (Note 6) VCC = 3.0 V to 3.6 V − − 1.0 − − 1.5 ns

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Typical values are measured at TA = 25°C and VCC = 3.3 V, unless stated otherwise.

5. tpd is the same as tPLH and tPHL.

6. Skew is defined as the absolute value of the dif ference between the actual propagation delay for any two separate outputs of the same device.

The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter

guaranteed by design.

DYNAMIC SWITCHING CHARACTERISTICS

Symbo

Characteristic Condition

TA = +25°C

Unit

Min Typ Max

VOLP Dynamic LOW Peak Voltage (Note 7) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V

VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V 0.8

0.6 V

VOLV Dynamic LOW Valley Voltage (Note 7) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V

VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V −0.8

−0.6 V

7. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is

measured in the LOW state.

CAPACITIVE CHARACTERISTICS

Symbol Parameter Condition Typical Unit

CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 4.0 pF

COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 5.0 pF

CPD Power Dissipation Capacitance

(Note 8) Per input; VI = GND or VCC pF

VCC = 1.65 V to 1.95 V 3.9

VCC = 2.3 V to 2.7 V 7.1

VCC = 3.0 V to 3.6 V 9.9

8. CPD is used to determine the dynamic power dissipation (PD in mW).

PD = CPD x VCC2 x fi x N + S (CL x VCC2 x fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF VCC = supply voltage in Volts

N = number of outputs switching

S(CL x VCC2 x fo) = sum of the outputs.

74LVC04A

www.onsemi.com

WAVEFORM 1 − PROPAGATION DELAYS

tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns

VCC

0 V

VOH

VOL

tPLH

tPHL

Vmi

Vmo

Vmi

Vcc

Symbol 3.3 V + 0.3 V 2.7 V VCC < 2.7 V

Vmi 1.5 V 1.5 V Vcc/2

Vmo 1.5 V 1.5 V Vcc/2

Figure 2. AC Waveforms

PULSE

GENERATOR RT

DUT

VCC

CL includes jig and probe capacitance

RT = ZOUT of pulse generator (typically 50 W)

VIVO

Supply Voltage Input Load

VCC (V) VItr, tfCLRL

1.2 VCC ≤ 2 ns 30 pF 1 kW

1.65 − 1.95 VCC ≤ 2 ns 30 pF 1 kW

2.3 − 2.7 VCC ≤ 2 ns 30 pF 500 W

2.7 2.7 V ≤ 2.5 ns 50 pF 500 W

3 − 3.6 2.7 V ≤ 2.5 ns 50 pF 500 W

Figure 3. Test Circuit

ORDERING INFORMATION

Device Package Shipping†

74LVC04ADR2G SOIC−14 NB

(Pb−Free) 2500 / Tape & Reel

74LVC04ADTR2G TSSOP−14

(Pb−Free) 2500 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

74LVC04A

www.onsemi.com

PACKAGE DIMENSIONS

TSSOP−14

CASE 948G

ISSUE B

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A4.90 5.10 0.193 0.200

B4.30 4.50 0.169 0.177

C−−− 1.20 −−− 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.50 0.60 0.020 0.024

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL

NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN

EXCESS OF THE K DIMENSION AT MAXIMUM

MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.

____

U0.15 (0.006) T

2X L/2

0.10 (0.004) V S

L−U−

SEATING

PLANE

0.10 (0.004)

−T−

ÇÇÇ

SECTION N−N

DETAIL E

JJ1

ÉÉÉ

DETAIL E

−W−

0.25 (0.010)

PIN 1

IDENT.

U0.15 (0.006) T

−V−

14X REFK

7.06

14X

0.36 14X

1.26

0.65

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

74LVC04A

www.onsemi.com

PACKAGE DIMENSIONS

SOIC−14 NB

CASE 751A−03

ISSUE K NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION

SHALL BE 0.13 TOTAL IN EXCESS OF AT

MAXIMUM MATERIAL CONDITION.

4. DIMENSIONS D AND E DO NOT INCLUDE

MOLD PROTRUSIONS.

5. MAXIMUM MOLD PROTRUSION 0.15 PER

SIDE.

14 8

0.25 B M

X 45

SEATING

PLANE

0.25 B S

13X

DET AIL A

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

D8.55 8.75 0.337 0.344

E3.80 4.00 0.150 0.157

A1.35 1.75 0.054 0.068

b0.35 0.49 0.014 0.019

L0.40 1.25 0.016 0.049

e1.27 BSC 0.050 BSC

A3 0.19 0.25 0.008 0.010

A1 0.10 0.25 0.004 0.010

M0 7 0 7

H5.80 6.20 0.228 0.244

h0.25 0.50 0.010 0.019

__ __

6.50

14X

0.58

14X

1.18

1.27

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.

SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed

at www.onsemi.com/site/pdf/Patent− Marking.pdf . S CILLC reserves t he right to m ake changes wit hout further notice to any products h erein. SCILLC makes no warranty, representation

or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and

specifically disclaims any and all l iabilit y, including without limitation special, consequential or i ncident al d amages. “Typical” parameters which may be provided in SCILLC d a ta s heet s

and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each

customer application b y c ust omer’s technical e xperts. SCILLC does not c onvey a ny license under its p atent r ights n or t he r ights o f o t hers. S CILLC p roducts a re n ot d esigned, i ntended,

or authorized for use as c omponent s i n s yst ems i nt ended f or s urgic al i m plant i nt o the body, or other applications i nt ended to support or sustain lif e, o r f or a ny o t her a pplication i n w hich

the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or

unauthorized application, Buyer shall indemnify and hold SCILLC an d it s officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and r easonable a ttorney f ees a rising o ut of, directly o r i ndirect ly, a ny c laim o f personal injury or d eath a ssociated wit h s uch u nintended o r u naut horized u se, e ven if such c laim

alleges that SCILLC was negligent regarding the d esign or manufacture of the p art. S CILLC i s a n E qual O pportunity/Af firmative Act ion Employer. T his literature is subject t o a ll applicable

UBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5817−1050

74LVC04A/D

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your loc

Sales Representative