NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 D D D D D Timing From Microseconds to Hours Astable or Monostable Operation Adjustable Duty Cycle TTL-Compatible Output Can Sink or Source up to 200 mA Functionally Interchangeable With the Signetics NE555, SA555, SE555, SE555C; Have Same Pinout D, JG, OR P PACKAGE (TOP VIEW) GND TRIG OUT RESET 1 8 2 7 3 6 4 5 VCC DISCH THRES CONT FK PACKAGE (TOP VIEW) NC GND NC VCC NC SE555C FROM TI IS NOT RECOMMENDED FOR NEW DESIGNS description NC TRIG NC OUT NC 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC DISCH NC THRES NC NC RESET NC CONT NC These devices are precision monolithic timing circuits capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of operation, the frequency and duty cycle may be independently controlled with two external resistors and a single external capacitor. 4 NC-No internal connection The threshold and trigger levels are normally two-thirds and one-third, respectively, of VCC. These levels can be altered by use of the control voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. RESET can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset and the output goes low. Whenever the output is low, a low-impedance path is provided between DISCH and ground. The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of 5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs. The NE555 is characterized for operation from 0C to 70C. The SA555 is characterized for operation from - 40C to 85C. The SE555 and SE555C are characterized for operation over the full military range of - 55C to 125C. AVAILABLE OPTIONS PACKAGE TA VTHRES max VCC = 15 V 0C to 70C 11.2 V NE555D - 40C to 85C 11.2 V SA555D - 55C to 125C 10.6 V 11.2 V SE555D SE555CD SMALL OUTLINE (D) CHIP CARRIER (FK) CERAMIC DIP (J) PLASTIC DIP (P) CHIP FORM (Y) NE555P SA555P SE555FK SE555CFK SE555JG SE555CJG NE555Y SE555P SE555CP The D package is available taped and reeled. Add the suffix R to the device type (e.g., NE555DR). Copyright 1992, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 RESET TRIGGER VOLTAGE FUNCTION TABLE THRESHOLD VOLTAGE OUTPUT DISCHARGE SWITCH Low Irrelevant Irrelevant Low On High < 1/3 VDD Irrelevant High Off High > 1/3 VDD > 2/3 VDD Low On High > 1/3 VDD Voltage levels shown are nominal. < 2/3 VDD As previously established functional block diagram VCC 8 CONT 5 R RESET 4 I I I R1 6 THRES I R 1 3 OUT S R 2 TRIG R II II 7 1 GND RESET can override TRIG, which can override THRES. Pin numbers shown are for the D, JG, and P packages only. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 DISCH NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 chip information These chips, properly assembled, display characteristics similar to the NE555 (see electrical table for NE555Y). Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS VCC (8) (2) THRES (6) CONT (5) R RESET (4) R1 R (3) (3) 1 OUT S (4) R TRIG (2) R (7) 41 (5) DISCH (1) GND (1) (8) CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 x 4 MINIMUM TJ max = 150 C (7) (6) TOLERANCES ARE 10% ALL DIMENSIONS ARE IN MILS 42 PIN (1) INTERNALLY CONNECTED TO BACKSIDE OF CHIP POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC (See Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Input voltage (CONT, RESET, THRES, and TRIG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC Output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225 mA Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range: NE555 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C SA555 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 85C SE555, SE555C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55C to 125C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package . . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300C NOTE 1: All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE PACKAGE TA 25C POWER RATING DERATING FACTOR ABOVE TA = 25C TA = 70C POWER RATING TA = 85C POWER RATING TA = 125C POWER RATING D 725 mW 5.8 mW/C 464 mW 377 mW N/A FK 1375 mW 11.0 mW/C 880 mW 715 mW 275 mW 210 mW JG (SE555, SE555C) 1050 mW 8.4 mW/C 672 mW 546 mW JG (SA555, NE555C) 825 mW 6.6 mW/C 528 mW 429 mW N/A P 1000 mW 8.0 mW/C 640 mW 520 mW N/A recommended operating conditions NE555 Supply voltage, VCC SE555 SE555C MAX MIN MAX MIN MAX MIN MAX 4.5 16 4.5 16 4.5 18 4.5 16 Input voltage (CONT, RESET, THRES, and TRIG) VCC 200 Output current Operating free-air temperature, TA 4 SA555 MIN 0 POST OFFICE BOX 655303 70 VCC 200 - 40 * DALLAS, TEXAS 75265 85 VCC 200 - 55 125 - 55 UNIT V VCC 200 mA V 125 C NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 electrical characteristics, VCC = 5 V to 15 V, TA = 25C (unless otherwise noted) PARAMETER NE555, SA555, SE555C SE555 TEST CONDITIONS MIN TYP MAX MIN UNIT TYP MAX VCC = 15 V VCC = 5 V 9.4 10 10.6 8.8 10 11.2 2.7 3.3 4 2.4 3.3 4.2 30 250 30 250 TRIG voltage level VCC = 15 V VCC = 5 V 4.8 5 5.2 4.5 5 5.6 1.45 1.67 1.9 1.1 1.67 2.2 TRIG current TRIG at 0 V 0.5 0.9 0.5 2 A 0.7 1 0.7 1 V THRES voltage level THRES current (see Note 2) RESET voltage level 0.3 RESET at VCC RESET current 0.1 0.4 0.1 0.4 - 0.4 -1 - 0.4 - 1.5 20 100 20 100 9.6 10 10.4 9 10 11 2.9 3.3 3.8 2.6 3.3 4 0.1 0.15 0.1 0.25 0.4 0.5 0.4 0.75 2 2.2 2 2.5 RESET at 0 V DISCH switch off-state current VCC = 15 V VCC = 5 V CONT voltage (open circuit) IOL = 10 mA IOL = 50 mA VCC = 15 V IOL = 100 mA IOL = 200 mA Low level output voltage Low-level High-level output voltage 2.5 VCC = 5 V IOL = 5 mA IOL = 8 mA VCC = 15 V IOH = - 100 mA IOH = - 200 mA 13 IOH = - 100 mA VCC = 15 V 3 VCC = 5 V Output low, low No load Supply current Output high, high No load 0.3 2.5 0.1 0.2 0.1 0.35 0.15 0.25 0.15 0.4 13.3 12.75 12.5 VCC = 5 V VCC = 15 V 2.75 nA V mA nA V V 13.3 12.5 3.3 V V 3.3 10 12 10 3 5 3 15 6 9 10 9 13 mA VCC = 5 V 2 4 2 5 NOTE 2: This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12. For example, when VCC = 5 V, the maximum value is R = RA + RB 3.4 M, and for VCC = 15 V, the maximum value is 10 M. operating characteristics, VCC = 5 V and 15 V TEST CONDITIONS PARAMETER Initial error of timing interval Each timer, monostable Each timer, astable Temperature coefficient of timing interval Each timer, monostable Supply y voltage g sensitivity y of timing interval Each timer, monostable Output pulse rise time Each timer, astable Each timer, astable NE555, SA555, SE555C SE555 MIN TA = 25C TYP MAX 0.5% 1.5% 1.5% TA = MIN to MAX 30 100 100 MAX 1% 3% 50 ppm/C 150 0.2 0.15 CL = 15 pF,, TA = 25C UNIT TYP 2.25% 90 0.05 TA = 25C MIN 0.1 0.5 0.3 200 100 %/V 300 ns Output pulse fall time 100 200 100 300 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process run. Values specified are for a device in a monostable circuit similar to Figure 9, with component values as follow: RA = 2 k to 100 k, C = 0.1 F. Values specified are for a device in an astable circuit similar to Figure 12, with component values as follow: RA = 1 k to 100 k, C = 0.1 F. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 electrical characteristics, VCC = 5 V to 15 V, TA = 25C (unless otherwise noted) PARAMETER TEST CONDITIONS VCC = 15 V VCC = 5 V THRES voltage level MIN TYP MAX 8.8 10 11.2 2.4 3.3 4.2 30 250 4.5 5 5.6 1.1 1.67 2.2 0.5 2 A 0.7 1 V 0.1 0.4 - 0.4 - 1.5 THRES current (see Note 2) TRIG voltage level VCC = 15 V VCC = 5 V TRIG current TRIG at 0 V RESET voltage level 0.3 RESET at VCC RESET current RESET at 0 V DISCH switch off-state current VCC = 15 V VCC = 5 V CONT voltage (open circuit) VCC = 15 V Low level output voltage Low-level High-level output voltage 20 100 9 10 11 2.6 3.3 4 0.1 0.25 0.4 0.75 2 2.5 IOL = 10 mA IOL = 50 mA IOL = 100 mA IOL = 200 mA 2.5 VCC = 5 V IOL = 5 mA IOL = 8 mA VCC = 15 V IOH = - 100 mA IOH = - 200 mA 12.75 IOH = - 100 mA VCC = 15 V 2.75 VCC = 5 V low No load Output low, Supply current Output high, high No load 0.1 0.35 0.15 0.4 UNIT V nA V mA nA V V 13.3 V 12.5 3.3 10 15 3 6 9 13 VCC = 5 V VCC = 15 V mA VCC = 5 V 2 5 NOTE 2: This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12. For example, when VCC = 5 V, the maximum value is R = RA + RB 3.4 M, and for VCC = 15 V, the maximum value is 10 M operating characteristics, VCC = 5 V and 15 V, TA = 25C (unless otherwise noted) TEST CONDITIONS PARAMETER Initial error of timing interval Each timer, monostable Each timer, astable Supply voltage sensitivity of timing interval Each timer, monostable Each timer, astable Output pulse rise time MIN TYP MAX 1% 3% UNIT 2.25% 0.1 0.3 0.5 %/V 100 300 CL = 15 pF ns Output pulse fall time 100 300 Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process run. Values specified are for a device in a monostable circuit similar to Figure 9, with component values as follow: RA = 2 k to 100 k, C = 0.1 F. Values specified are for a device in an astable circuit similar to Figure 12, with component values as follow: RA = 1 k to 100 k, C = 0.1 F. 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 4 2 1 0.7 0.4 IIII IIII IIIII IIIII III IIIII IIIII IIII IIII IIII IIII IIII 10 7 VCC = 5 V TA = - 55C TA = 25C IIII TA = 125C 0.2 0.1 0.07 0.04 VOL - Low-Level Output Voltage - V VOL - Low-Level Output Voltage - V 10 7 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.02 VCC = 10 V 4 2 TA = 25C 1 0.7 TA= - 55C TA = 125C 0.4 0.2 0.1 0.07 0.04 0.02 0.01 0.01 1 2 4 7 10 20 40 70 100 1 IOL - Low-Level Output Current - mA 2 Figure 1 TA = - 55C 1 0.7 TA = 25C TA = 125C 0.1 0.07 0.04 1.6 1.2 0.8 0.6 0.4 0.01 0 4 7 10 20 40 70 100 TA = 125C 1 0.2 2 70 100 TA = 25C 1.4 0.02 1 40 TA = - 55C 1.8 2 0.2 20 IIII IIII IIII IIII 2.0 VCC = 15 V 0.4 10 DROP BETWEEN SUPPLY VOLTAGE AND OUTPUT vs HIGH-LEVEL OUTPUT CURRENT VCC - VOH - Voltage Drop - V VOL - Low-Level Output Voltage - V 4 IIIII IIIII 7 Figure 2 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 10 7 4 IOL - Low-Level Output Current - mA IIIIII VCC = 5 V to 15 V 1 IOL - Low-Level Output Current - mA 2 4 7 10 20 40 70 100 IOH - High-Level Output Current - mA Figure 3 Figure 4 Data for temperatures below 0C and above 70C are applicable for SE555 circuits only. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 TYPICAL CHARACTERISTICS NORMALIZED OUTPUT PULSE DURATION (MONOSTABLE OPERATION) vs SUPPLY VOLTAGE SUPPLY CURRENT vs SUPPLY VOLTAGE Pulse Duration Relative to Value at VCC = 10 V 10 Output Low, No Load 9 I CC - Supply Current - mA 8 TA = 25C 7 6 5 TA = -55C 4 TA = 125C 3 2 1 0 1.015 1.010 1.005 1 0.995 0.990 0.985 5 6 7 8 9 10 12 11 13 14 15 0 5 VCC - Supply Voltage - V Figure 5 PROPAGATION DELAY TIME vs LOWEST VOLTAGE LEVEL OF TRIGGER PULSE 1.015 300 VCC = 10 V tPD - Propagation Delay Time - ns Pulse Duration Relative to Value at TA = 25 C 20 Figure 6 NORMALIZED OUTPUT PULSE DURATION (MONOSTABLE OPERATION) vs FREE-AIR TEMPERATURE 1.010 1.005 1 0.995 0.990 250 TA = -55C 200 TA = 0C 150 100 TA = 25C TA = 70C 50 TA = 125C 0.985 -75 0 -50 -25 0 25 50 75 100 125 0 TA - Free-Air Temperature - C 0.1 x VCC 0.2 x VCC 0.3 x VCC 0.4 x VCC Lowest Voltage Level of Trigger Pulse Figure 7 Figure 8 Data for temperatures below 0C and above 70C are applicable for SE555 circuits only. 8 15 10 VCC - Supply Voltage - V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 APPLICATION INFORMATION monostable operation For monostable operation, any of these timers may be connected as shown in Figure 9. If the output is low, application of a negative-going pulse to TRIG sets the flip-flop (Q goes low), drives the output high, and turns off Q1. Capacitor C is then charged through RA until the voltage across the capacitor reaches the threshold voltage of THRES input. If TRIG has returned to a high level, the output of the threshold comparator will reset the flip-flop (Q goes high), drive the output low, and discharge C through Q1. IIIII IIIII IIIII IIIII RA = 9.1 k CL = 0.01 F RL = 1 k See Figure 9 RA 5 II 4 7 6 Input 2 8 CONT VCC RESET RL DISCH OUT 3 Input Voltage Voltage - 2 V/div VCC (5 V to 15 V) Output Output Voltage THRES TRIG IIIIII GND 1 Capacitor Voltage Pin numbers shown are for the D, JG, and P packages. Time - 0.1 ms/div Figure 9. Circuit for Monostable Operation RA = 10 M 1 - Output Pulse Duration - s Applying a negative-going trigger pulse simultaneously to RESET and TRIG during the timing interval discharges C and re-initiates the cycle, commencing on the positive edge of the reset pulse. The output is held low as long as the reset pulse is low. To prevent false triggering, when RESET is not used, it should be connected to VCC. 10 tw Monostable operation is initiated when TRIG voltage falls below the trigger threshold. Once initiated, the sequence ends only if TRIG is high at the end of the timing interval. Because of the threshold level and saturation voltage of Q1, the output pulse duration is approximately tw = 1.1 RAC. Figure 11 is a plot of the time constant for various values of RA and C. The threshold levels and charge rates are both directly proportional to the supply voltage, VCC. The timing interval is therefore independent of the supply voltage, so long as the supply voltage is constant during the time interval. Figure 10. Typical Monostable Waveforms RA = 1 M 10-1 10-2 10-3 RA = 100 k RA = 10 k 10-4 RA = 1 k 10-5 0.001 0.01 0.1 1 10 100 C - Capacitance - F Figure 11. Output Pulse Duration vs Capacitance POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 APPLICATION INFORMATION astable operation As shown in Figure 12, adding a second resistor, RB, to the circuit of Figure 9 and connecting the trigger input to the threshold input causes the timer to self-trigger and run as a multivibrator. The capacitor C will charge through RA and RB and then discharge through RB only. The duty cycle may be controlled, therefore, by the values of RA and RB. This astable connection results in capacitor C charging and discharging between the threshold-voltage level ( 0.67*VCC) and the trigger-voltage level ( 0.33*VCC). As in the monostable circuit, charge and discharge times (and therefore the frequency and duty cycle) are independent of the supply voltage. IIIIIIIII IIIIIIIII IIIIIIIII VCC (5 V to 15 V) RA = 5 k RB = 3 k C = 0.15 F RA RB Open (see Note A) 5 CONT 4 RESET 7 DISCH 8 VCC I 6 2 RL 3 OUT Output THRES tH TRIG Output Voltage tL GND C Voltage - 1 V/div 0.01 F 1 Pin numbrs shown are for the D, JG, and P packages. Capacitor Voltage NOTE A: Decoupling CONT voltage to ground with a capacitor may improve operation. This should be evaluated for individual applications. Figure 12. Circuit for Astable Operation 10 RL = 1 k See Figure 12 POST OFFICE BOX 655303 Time - 0.5 ms/div Figure 13. Typical Astable Waveforms * DALLAS, TEXAS 75265 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 APPLICATION INFORMATION Figure 13 shows typical waveforms generated during astable operation. The output high-level duration tH and low-level duration tL may be calculated as follows: 100 k + 0.693 (RA ) RB) C H t + 0.693 (R C L B) RA + 2 RB = 1 k f - Free-Running Frequency - Hz t Other useful relationships are shown below. + tH ) tL + 0.693 (RA ) 2RB) C 1.44 frequency [ (R ) 2R ) C period A B Output driver duty cycle + t t)L t + R )RB2R H L A B RA + 2 RB = 100 k 1k 100 10 1 Output waveform duty cycle R t B H 1- t t R 2R H L A B t R L B Low- t o-high ratio t R R H A B + ) + ) + + ) RA + 2 RB = 10 k 10 k RA + 2 RB = 1 M RA + 2 RB = 10 M 0.1 0.001 0.01 0.1 1 10 100 C - Capacitance - F Figure 14. Free-Running Frequency missing-pulse detector The circuit shown in Figure 15 may be used to detect a missing pulse or abnormally long spacing between consecutive pulses in a train of pulses. The timing interval of the monostable circuit is continuously retriggered by the input pulse train as long as the pulse spacing is less than the timing interval. A longer pulse spacing, missing pulse, or terminated pulse train permits the timing interval to be completed, thereby generating an output pulse as illustrated in Figure 16. IIIII IIIII IIIII VCC (5 V to 15 V) Input 2 8 VCC OUT 0.01 F 3 TRIG DISCH 5 RL CONT THRES GND 7 III III RA Output 6 Voltage - 2 V/div 4 RESET VCC = 5 V RA = 1 k C = 0.1 F See Figure 15 Input Voltage IIIIII IIIIII Output Voltage C 1 A5T3644 Capacitor Voltage Time - 0.1 ms/div Pin numbers shown are shown for the D, JG, and P packages. Figure 15. Circuit for Missing Pulse Detector POST OFFICE BOX 655303 Figure 16. Circuit for Missing Pulse Detector * DALLAS, TEXAS 75265 11 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 APPLICATION INFORMATION frequency divider By adjusting the length of the timing cycle, the basic circuit of Figure 9 can be made to operate as a frequency divider. Figure 17 illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle. IIIII IIIII IIIII IIIII Voltage - 2 V/div VCC = 5 V RA = 1250 C = 0.02 F See Figure 9 Input Voltage Output Voltage Capacitor Voltage Time - 0.1 ms/div Figure 17. Divide-By-Three Circuit Waveforms pulse-width modulation The operation of the timer may be modified by modulating the internal threshold and trigger voltages, which is accomplished by applying an external voltage (or current) to CONT. Figure 18 shows a circuit for pulse-width modulation. A continuous input pulse train triggers the monostable circuit, and a control signal modulates the threshold voltage. Figure 19 illustrates the resulting output pulse-width modulation. While a sine-wave modulation signal is illustrated, any wave shape could be used. 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 APPLICATION INFORMATION VCC (5 V to 15 V) 2 Clock Input RL 8 RESET VCC OUT TRIG 5 CONT RA Modulation Input Voltage 3 Output 7 DISCH Modulation Input (see Note A) RA = 3 k C = 0.02 F RL = 1 k See Figure 18 Voltage - 2 V/div 4 THRES IIIII IIIII IIIII IIIIIII IIIIIII IIIIIII IIIIIII IIIII IIIII IIIIII 6 GND C 1 Clock Input Voltage Output Voltage Pin numbers shown are for the D, JG, and P packages only. NOTE A: The modulating signal may be direct or capacitively coupled to CONT. For direct coupling, the effects of modulation source voltage and impedance on the bias of the timer should be considered. Capacitor Voltage Time - 0.5 ms/div Figure 19. Pulse-Width Modulation Waveforms Figure 18. Circuit for Pulse-Width Modulation pulse-position modulation As shown in Figure 20, any of these timers may be used as a pulse-position modulator. This application modulates the threshold voltage, and thereby the time delay, of a free-running oscillator. Figure 21 illustrates a triangular-wave modulation signal for such a circuit; however, any wave shape could be used. VCC (5 V to 15 V) 8 RESET 2 Modulation 5 Input (see Note A) VCC OUT RL RA 3 Output TRIG CONT RA = 3 k RB = 500 RL = 1 k See Figure 20 DISCH 7 THRES 6 RB GND C Pin numbers shown are for the D, JG, and P packages only. NOTE A: The modulating signal may be direct or capacitively coupled to CONT. For direct coupling, the effects of modulation source voltage and impedance on the bias of the timer should be considered. Figure 20. Circuit for Pulse-Position Modulation POST OFFICE BOX 655303 Voltage - 2 V/div 4 IIIIII IIIIII IIIIII IIIIII IIIIIIII IIIIIIII Modulation Input Voltage IIIIII IIIIII IIIIII IIIIII Output Voltage Capacitor Voltage Time - 0.1 ms/div Figure 21. Pulse-Position-Modulation Waveforms * DALLAS, TEXAS 75265 13 NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS SLFS022 - SEPTEMBER 1973 - REVISED FEBRUARY 1992 APPLICATION INFORMATION sequential timer VCC 4 RESET 2 8 VCC OUT TRIG S DISCH 5 0.01 F CONT 4 RESET RA 33 k 3 2 0.001 F 7 1 6 TRIG CONT 0.01 F CA CA = 10 F RA = 100 k Output A RB THRES GND 1 CB 4 RESET 33 k 3 2 0.001 F DISCH 7 5 THRES GND 8 VCC OUT 0.01 F Output B CB = 4.7 F RB = 100 k TRIG DISCH 5 6 8 VCC OUT CONT THRES GND 1 RC 3 7 6 CC CC = 14.7 F RC = 100 k Output C S closes momentarily at t = 0. Pin numbers shown are for the D, JG, and P packages only. Figure 22. Sequential Timer Circuit Many applications, such as computers, require signals for initializing conditions during start-up. Other applications, such as test equipment, require activation of test signals in sequence. These timing circuits may be connected to provide such sequential control. The timers may be used in various combinations of astable or monostable circuit connections, with or without modulation, for extremely flexible waveform control. Figure 22 illustrates a sequencer circuit with possible applications in many systems, and Figure 23 shows the output waveforms. IIIII II IIIII IIIIII III III III IIIII III III II IIIII III III See Figure 22 Voltage - 5 V/div Output A tw A twA = 1.1 RACA tw B Output B twB = 1.1 RBCB Output C tw C twC = 1.1 RCCC t=0 t - Time - 1 s/div Figure 23. Sequential Timer Waveforms 14 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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