XTR115
XTR116
4-20mA CURRENT LOOP TRANSMITTERS
FEATURES
●LOW QUIESCENT CURRENT: 200µA
●5V REGULATOR FOR EXTERNAL CIRCUITS
●VREF FOR SENSOR EXCITATION:
XTR115: 2.5V
XTR116: 4.096V
●LOW SPAN ERROR: 0.05%
●LOW NONLINEARITY ERROR: 0.003%
●WIDE LOOP SUPPLY RANGE: 7.5V to 36V
●SO-8 PACKAGE
APPLICATIONS
●2-WIRE, 4-20mA CURRENT LOOP
TRANSMITTER
●SMART TRANSMITTER
●INDUSTRIAL PROCESS CONTROL
●TEST SYSTEMS
●COMPATIBLE WITH HART MODEM
●CURRENT AMPLIFIER
●VOLTAGE-TO-CURRENT AMPLIFIER
DESCRIPTION
The XTR115 and XTR116 are precision current out-
put converters designed to transmit analog 4-to-20mA
signals over an industry standard current loop. They
provide accurate current scaling and output current
limit functions.
The on-chip voltage regulator (5V) can be used to
power external circuitry. A precision on-chip VREF
(2.5V for XTR115 and 4.096V for XTR116) can be
used for offsetting or to excite transducers. A current
return pin (IRET) senses any current used in external
circuitry to assure an accurate control of the output
current.
The XTR115 is a fundamental building block of
smart sensors using 4-to-20mA current transmission.
The XTR115 and XTR116 are specified for opera-
tion over the extended industrial temperature range,
–40°C to +85°C.
XTR115
XTR116
R
IN
I
IN
V
IN
+
–
I
RET
XTR115
XTR116
+5V
Regulator
R
2
25Ω
R
LIM
E
B
V+
R
1
2.475kΩI
O
=100 V
IN
R
IN
A1
Voltage
Reference
+5V V
REG
V
REF
2
3
8
1
5
4
7
6
XTR115: 2.5V
XTR116: 4.096V
R
L
V
LOOP
I = 100
• I
IN
SBOS124A – JANUARY 2000 – REVISED NOVEMBER 2003
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2000-2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
XTR115, XTR116
2SBOS124A
www.ti.com
✻ Specifications the same as XTR115U and XTR116U.
NOTES: (1) Does not include initial error or TCR of RIN. (2) Voltage measured with respect to IRET pin.
SPECIFICATIONS
At TA = +25°C, V+ = 24V, RIN = 20kΩ, and TIP29C external transistor, unless otherwise noted.
XTR115U XTR115UA
XTR116U XTR116UA
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
OUTPUT
Output Current Equation IOIO = IIN • 100 ✻
Output Current, Linear Range 0.25 25 ✻✻mA
Over-Scale Limit ILIM 32 ✻mA
Under-Scale Limit IMIN IREG = 0, IREF = 0 0.2 0.25 ✻✻ mA
SPAN
Span (Current Gain) S 100 ✻A/A
Error(1) IIN = 250µA to 25mA ±0.05 ±0.2 ✻±0.4 %
vs Temperature TA = –40°C to +85°C±3±20 ✻✻ ppm/°C
Nonlinearity IIN = 250µA to 25mA ±0.003 ±0.01 ✻±0.02 %
INPUT
Offset Voltage (Op Amp) VOS IIN = 40µA±100 ±250 ✻±500 µV
vs Temperature TA = –40°C to +85°C±0.7 ±3✻±6µV/°C
vs Supply Voltage, V+ V+ = 7.5V to 36V ±0.1 ±2✻✻ µV/V
Bias Current IB–35 ✻nA
vs Temperature 150 ✻pA/°C
Noise: 0.1Hz to 10Hz en0.6 ✻µVp-p
DYNAMIC RESPONSE
Small Signal Bandwidth CLOOP = 0, RL = 0 380 ✻kHz
Slew Rate 3.2 ✻mA/µs
VREF(2)
XTR115 2.5 ✻V
XTR116 4.096 ✻V
Voltage Accuracy IREF = 0 ±0.05 ±0.25 ✻±0.5 %
vs Temperature TA = –40°C to +85°C±20 ±35 ✻±75 ppm/°C
vs Supply Voltage, V+ V+ = 7.5V to 36V ±1±10 ✻✻ ppm/V
vs Load IREF = 0mA to 2.5mA ±100 ✻ppm/mA
Noise: 0.1Hz to 10Hz 10 ✻µVp-p
Short-Circuit Current 16 ✻mA
VREG(2)
Voltage 5✻V
Voltage Accuracy IREG = 0 ±0.05 ±0.1 ✻✻ V
vs Temperature TA = –40°C to +85°C±0.1 ✻mV/°C
vs Supply Voltage, V+ V+ = 7.5V to 36V 1 ✻mV/V
vs Output Current See Typical Curves
Short-Circuit Current 12 ✻mA
POWER SUPPLY V+
Specified +24 ✻V
Voltage Range +7.5 +36 ✻✻V
Quiescent Current 200 250 ✻✻ µA
Over Temperature, –40°C to +85°C 240 300 ✻✻ µA
TEMPERATURE RANGE
Specification –40 +85 ✻✻°C
Operating –55 +125 ✻✻°C
Storage –55 +125 ✻✻°C
Thermal Resistance
θ
JA 150 ✻°C/W
XTR115, XTR116 3
SBOS124A www.ti.com
Power Supply, V+ (referenced to IO pin).......................................... 40V
Input Voltage (referenced to IRET pin)........................................ 0V to V+
Output Current Limit ............................................................... Continuous
VREG, Short-Circuit.................................................................. Continuous
VREF, Short-Circuit .................................................................. Continuous
Operating Temperature ................................................ –55°C to +125°C
Storage Temperature Range ....................................... –55°C to +125°C
Lead Temperature (soldering, 10s).............................................. +300°C
Junction Temperature................................................................... +165°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ABSOLUTE MAXIMUM RATINGS(1)
Top View SO-8
PIN CONFIGURATION
PACKAGE/ORDERING INFORMATION
V
REF
I
IN
I
RET
I
O
V
REG
V+
B (Base)
E (Emitter)
1
2
3
4
8
7
6
5
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
For the most current package and ordering information, see
the Package Option Addendum located at the end of this
data sheet.
XTR115, XTR116
4SBOS124A
www.ti.com
TYPICAL PERFORMANCE CURVES
At TA = +25°C, V+ = 24V, RIN = 20kΩ, and TIP29C external transistor, unless otherwise noted.
10k 100k
Frequency (Hz)
CURRENT GAIN vs FREQUENCY
1M
40
30
20
10
Gain (dB)
COUT = 10nF
RL = 250Ω
COUT = 0
RL = 0Ω
–75 –50 –25 0 25 50 75 100
Temperature (°C)
REFERENCE VOLTAGE vs TEMPERATURE
125
0.1
0
–0.1
–0.2
–0.3
∆ Reference Voltage (%)
–75 –50 –25 0 25 50 75 100
Temperature (°C)
QUIESCENT CURRENT vs TEMPERATURE
125
260
240
220
200
180
160
Quiescent Current (µA)
(V+) = 36V
(V+) = 24V
(V+) = 7.5V
–75 –50 –250 255075100
Temperature (°C)
OVER-SCALE CURRENT vs TEMPERATURE
125
34
33
32
31
30
29
28
Over-Scale Current (mA)
V+ = 7.5V
V+ = 36V
V+ = 24V
With External Transistor
–10123
I
REG
Current (mA)
V
REG
VOLTAGE vs V
REG
CURRENT
4
5.5
5.0
4.5
V
REG
Voltage (V)
+25°C
+25°C
–55°C
+125°C
Sinking
Current Sourcing
Current
–55°C
+125°C
XTR115, XTR116 5
SBOS124A www.ti.com
APPLICATIONS INFORMATION
The XTR115 and XTR116 are identical devices except for
the reference voltage output, pin 1. This voltage is available
for external circuitry and is not used internally. Further
discussions that apply to both devices will refer to the
“XTR115/6.”
Figure 1 shows basic circuit connections with representative
simplified input circuitry. The XTR115/6 is a two-wire
current transmitter. Its input signal (pin 2) controls the output
current. A portion of this current flows into the V+ power
supply, pin 7. The remaining current flows in Q1. External
input circuitry connected to the XTR115/6 can be powered
from VREG or VREF. Current drawn from these terminals
must be returned to IRET, pin 3. This IRET pin is a “local
ground” for input circuitry driving the XTR115/6.
The XTR115/6 is a current-input device with a gain of 100.
A current flowing into pin 2 produces IO = 100 • IIN. The
input voltage at the IIN pin is zero (referred to the IRET pin).
A voltage input is created with an external input resistor, as
shown. Common full-scale input voltages range from 1V
and upward. Full-scale inputs greater than 0.5V are recom-
mend to minimize the effect of offset voltage and drift of A1.
EXTERNAL TRANSISTOR
The external transistor, Q1, conducts the majority of the full-
scale output current. Power dissipation in this transistor can
approach 0.8W with high loop voltage (40V) and 20mA
output current. The XTR115/6 is designed to use an external
transistor to avoid on-chip thermal-induced errors. Heat
produced by Q1 will still cause ambient temperature changes
that can affect the XTR115/6. To minimize these effects,
locate Q1 away from sensitive analog circuitry, including
XTR115/6. Mount Q1 so that heat is conducted to the
outside of the transducer housing.
The XTR115/6 is designed to use virtually any NPN transis-
tor with sufficient voltage, current and power rating. Case
style and thermal mounting considerations often influence
the choice for any given application. Several possible choices
are listed in Figure 1. A MOSFET transistor will not improve
the accuracy of the XTR115/6 and is not recommended.
R
IN
20kΩI
IN
2
V
IN
I
RET
3
XTR115
XTR116
+5V
Regulator
R
2
25Ω
R
LIM
E
5
I
O
4
B
6
V+
7
R
1
2.475kΩ
R
L
V
LOOP
A1
Voltage
Reference
V
REG
5V
V
REF(1)
8
1
XTR115: 2.5V
XTR116: 4.096V
Possible choices for Q
1
(see text).
2N4922
TIP29C
TIP31B
TYPE
TO-225
TO-220
TO-220
PACKAGE
I = 100
• I
IN
I
O
10nF
I
REF
I
IN
All return current
from I
REG
and I
REF
For I
O
= 4mA to 20mA
I
IN
= 40µA to 200µA
With R
IN
= 20kΩ
V
IN
= 0.8V to 4V
I
REG
Q
1
Input
Circuitry
NOTE: (1) See also Figure 5.
FIGURE 1. Basic Circuit Connections.
XTR115, XTR116
6SBOS124A
www.ti.com
MINIMUM-SCALE CURRENT
The quiescent current of the XTR115/6 (typically 200µA)
is the lower limit of its output current. Zero input current
(IIN = 0) will produce an IO equal to the quiescent current.
Output current will not begin to increase until IIN > IQ/100.
Current drawn from VREF or VREG will add to this minimum
output current. This means that more than 3.7mA is avail-
able to power external circuitry while still allowing the
output current to go below 4mA.
OFFSETTING THE INPUT
A low scale of 4mA is produced by creating a 40µA input
current. This can be created with the proper value resistor
from VREF (Figure 2), or by generating offset in the input
drive circuitry.
IIN
IRET
XTR115
R1
2.475kΩ
R0
62.5kΩ
A1
Voltage
Reference
VREG
VREF
2.5V
40µA
0 to 160µA
MAXIMUM OUTPUT CURRENT
The XTR115/6 provides accurate, linear output up to 25mA.
Internal circuitry limits the output current to approximately
32mA to protect the transmitter and loop power/measure-
ment circuitry.
It is possible to extend the output current range of the
XTR115/6 by connecting an external resistor from pin 3 to
pin 5, to change the current limit value. Since all output
current must flow through internal resistors, it is possible to
damage with excessive current. Output currents greater than
45mA may cause permanent damage.
XTR115
XTR116
V
O
D/A
R
IN
V
REF
V
REG
XTR115
XTR116
I
O
D/A
Optical
Isolation
Optical
Isolation
Digital
Control I
IN
I
RET
V
REF
V
REG
≈
XTR115
XTR116
µC
PWM
Out
Digital
Control
R
IN
Filter
I
RET
V
REG
5V
≈
FIGURE 2. Creating Low-Scale Offset. FIGURE 3. Digital Control Methods.
XTR115, XTR116 7
SBOS124A www.ti.com
V
PS
0.01µF
R
L
D
1(1)
NOTE: (1) Zener Diode 36V: 1N4753A or Motorola
P6KE39A. Use lower voltage zener diodes with loop
power supply voltages less than 30V for increased
protection. See “Over-Voltage Surge Protection.”
Maximum V
PS
must be
less than minimum
voltage rating of zener
diode.
The diode bridge causes
a 1.4V loss in loop supply
voltage.
1N4148
Diodes
8
1
2
3
XTR115
XTR116
V
IN
V
REF
I
IN
I
RET
V
REG
V+
I
O
E
B6
7
5
4
Q
1
R
IN
FIGURE 4. Reverse Voltage Operation and Over-Voltage Surge Protection.
REVERSE-VOLTAGE PROTECTION
The XTR115/6 low compliance voltage rating (7.5V) per-
mits the use of various voltage protection methods without
compromising operating range. Figure 4 shows a diode
bridge circuit which allows normal operation even when the
voltage connection lines are reversed. The bridge causes a
two diode drop (approximately 1.4V) loss in loop supply
voltage. This results in a compliance voltage of approxi-
mately 9V—satisfactory for most applications. A diode can
be inserted in series with the loop supply voltage and the V+
pin to protect against reverse output connection lines with
only a 0.7V loss in loop supply voltage.
OVER-VOLTAGE SURGE PROTECTION
Remote connections to current transmitters can sometimes be
subjected to voltage surges. It is prudent to limit the maximum
surge voltage applied to the XTR115/6 to as low as practical.
Various zener diode and surge clamping diodes are specially
designed for this purpose. Select a clamp diode with as low a
voltage rating as possible for best protection. For example, a
36V protection diode will assure proper transmitter operation
at normal loop voltages, yet will provide an appropriate level
of protection against voltage surges. Characterization tests on
several production lots showed no damage with loop supply
voltages up to 65V.
Most surge protection zener diodes have a diode character-
istic in the forward direction that will conduct excessive
current, possibly damaging receiving-side circuitry if the
loop connections are reversed. If a surge protection diode is
used, a series diode or diode bridge should be used for
protection against reversed connections.
RADIO FREQUENCY INTERFERENCE
The long wire lengths of current loops invite radio frequency
interference. RF can be rectified by the input circuitry of the
XTR115/6 or preceding circuitry. This generally appears as
an unstable output current that varies with the position of
loop supply or input wiring.
Interference may also enter at the input terminals. For
integrated transmitter assemblies with short connection to
the sensor, the interference more likely comes from the
current loop connections.
XTR115, XTR116
8SBOS124A
www.ti.com
FIGURE 5. Stable Operation with Capacitive Load on VREF.
IIN
2
IRET
3
XTR115
XTR116
+5V
Regulator
R2
25Ω
RLIM
E
5
4
B
6
V+
7
R1
2.475kΩ
RL
VLOOP
A1
Voltage
Reference
VREG
VREF
8
1
I = 100 • IIN
IO
If capacitive loading must be placed on the VREF pin, one of the compensation schemes shown below must be used to ensure stable operation.
Values of capacitance must remain within the given ranges.
NOTE: (1) Required compensation components.
IO=100 VIN
RIN
+
RISO(1)
10Ω
CLF
(2.2µF to 22µF)
CHF
(10pF to 0.5µF)
+CLF(1)
(2.2µF to 22µF)
RCOMP(1)
50Ω
CHF
(10pF to 0.5µF)
OR
I
LOAD
(0-2.5mA)
I
LOAD
(0-2.5mA)
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
XTR115U ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR115U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR115U/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR115UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR115UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR115UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR115UAE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR115UG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR116U ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR116U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR116U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR116UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR116UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR116UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR116UAE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR116UG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 16-Feb-2009
Addendum-Page 1
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Feb-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
XTR115U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
XTR115UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
XTR116U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
XTR116UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
XTR115U/2K5 SOIC D 8 2500 367.0 367.0 35.0
XTR115UA/2K5 SOIC D 8 2500 367.0 367.0 35.0
XTR116U/2K5 SOIC D 8 2500 367.0 367.0 35.0
XTR116UA/2K5 SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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