IPS160HF, IPS161HF Datasheet Single channel high-side switches Features Part number IPS160HF IPS161HF RDS(on) 0.060 IOUT 2.4 A 0.6A VCC 65 V * * * * * * * * 8 V to 60 V operating voltage range Minimum output current limitation: 0.7A (IPS161HF) or 2.5A (IPS160HF) Short propagation delay at start-up Fast demagnetization of inductive load Non-dissipative short-circuit protection (cut-off) Programmable cut-off delay time using external capacitor Ground disconnection protection VCC disconnection protection * * * Thermal shutdown protection Undervoltage lock-out Diagnostic signalization for: open load in off-state, cut-off and junction thermal shutdown Designed to meet IEC 61131-2 PowerSSO12 package * * Applications Product status IPS160HF IPS161HF Product summary Order code Package Packing IPS160HF IPS160HFTR IPS161HF IPS161HFTR PowerSSO12 Tube Tape and reel * * * * Safety applications Programmable logic control Industrial PC peripheral input/output Numerical control machines Description The IPS160HF (Iout = 2.4A) and IPS161HF (Iout = 0.6A) are monolithic devices which can drive capacitive, resistive or inductive loads with one side connected to ground. The 60 V operating range and Ron = 60 m, combined with the extended diagnostic (Open Load, Over Load, Overtemperature) and the < 60 us propagation delay time at startup (enabling Class 3 for interface types C and D), make the ICs suitable to address safety applications targeting higher SIL levels. The built-in overload and thermal shutdown protections guarantee the ICs, the application and the load against electrical and thermal overstress. Furthermore, in order to minimize the power dissipation when the output is shorted, a low-dissipative short-circuit protection (cut-off) is implemented to limit the output average current value and consequent device overheating. Cut-off delay time can be set by soldering an external capacitor or disabled by a resistor on pin 4 (CoD). The DIAG common diagnostic open drain pin reports the open load in off-state, cutoff (overload) and thermal shutdown. DS13271 - Rev 2 - June 2020 For further information contact your local STMicroelectronics sales office. www.st.com IPS160HF, IPS161HF Block diagram 1 Block diagram Figure 1. Block diagram IN DIAG Logic interface Undervoltage detection Vcc Vcc clamp Output clamp Current limitation cut -off Open load in off-state OUT CoD Junction Overtemperature GND DS13271 - Rev 2 GIPG1702151307LM page 2/27 IPS160HF, IPS161HF Pin description 2 Pin description Figure 2. Pin connection (top view) VCC 1 12 VCC IN 2 11 OUT DIAG 3 10 OUT CoD 4 9 OUT NC 5 8 OUT NC 6 7 GND TAB=Vcc GIPG1702151321LM Table 1. Pin configuration Number Name Function Type 1, 12, TAB VCC Device supply voltage Supply 2 IN Channel input Input 3 DIAG Common diagnostic pin for thermal shutdown, cut-off and open load Output open drain 4 CoD Connected to GND by 1 k resistor to disable the cut-off function. Connect to a CCoD capacitor to set the cut-off delay see Table 8. Protection and diagnostic 5, 6 NC Not connected 7 GND Device ground Ground Channel power stage output Output Cut-off delay pin, cannot be left floating. 8, 9, 10, 11 OUT Input IN This pin drives the output stage to pin OUT. IN pin has internal weak pull-down resistors, see Table 7. Logic inputs. OUT Output power transistor is in high-side configuration, with active clamp for fast demagnetization. DIAG This pin is used for diagnostic purposes and is internally wired to an open drain transistor. The open drain transistor is turned on in case of junction thermal shutdown, cut-off, or open load in off-state. DS13271 - Rev 2 page 3/27 IPS160HF, IPS161HF Pin description CoD This pin cannot be left floating and can be used to program the cut-off delay time tcoff, see Table 8. Protection and diagnostic through an external capacitor (CCoD). The cut-off function can be completely disabled by connecting the CoD pin to GND through 1 k resistor: in this condition, the output channel remains in limitation condition, supplying the current to the load until the input is forced LOW or the thermal shutdown threshold is triggered. GND IC ground. The IC can be protected against reverse polarity using two different solutions: 1. Placing a resistor RGND between IC GND pin and load connection point to GND (RGND > VCC/Icc, see Table 2. Absolute maximum rating). Note that power dissipated by RGND during reverse polarity condition is Vcc^2/RGND. 2. Placing a diode in parallel to RGND The diode must be selected such that its VRRM > |VCC| and power dissipation capability is higher than VF*IS (see Table 4). In normal operation (no reverse polarity), there is a voltage drop (V) between GND of the device and GND of the module. Using option 1, V = RGND * ICC. Using option 2, V = VF@(IS). Figure 3. Reverse polarity VCC DS13271 - Rev 2 IC supply voltage. page 4/27 IPS160HF, IPS161HF Absolute maximum ratings 3 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VCC Supply voltage -0.3 to 65 V VOUT Output channel voltage Vcc-Vclamp to Vcc+0.3 V IIN Input current -10 to +10 VIN IN voltage VCC V VCOD Output cut-off voltage pin 5.5 V ICOD Input current on cut-off pin -1 to +10 VDIAG Fault voltage VCC IDIAG Fault current -5 to +10 mA ICC(1) Maximum DC reverse current flowing through the IC from GND to VCC -250 mA IOUT Output stage current Internally limited -IOUT (1) Maximum DC reverse current flowing through the IC from OUT to VCC 5 EAS (1) Single pulse avalanche energy (TAMB = 125 C, VCC = 24 V, Iload = 1 A) 1000 mJ PTOT Power dissipation at TC = 25 C (2) Internally limited W TSTG Storage temperature range -55 to 150 TJ Junction temperature -40 to 150 mA mA V A C 1. Verified on application board with Rth(ja) = 49 C/W 2. (TJSD(MAX)-TC)/ Rth(JA) Note: Absolute maximum ratings are the values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltages are referenced to GND. Table 3. Thermal data Symbol Note: DS13271 - Rev 2 Parameter Value Rth(JC) Thermal resistance junction-case 1 Rth(JA) Thermal resistance junction-ambient 49 Unit C/W Package mounted on a 2-layer application board with Cu thickness = 35 m, total dissipation area = 1.5 cm connected by 6 vias. page 5/27 IPS160HF, IPS161HF Electrical characteristics 4 Electrical characteristics (8 V < VCC < 60 V; -40 C < TJ < 125 C, unless otherwise specified) Table 4. Supply Symbol Parameter Test conditions Min. Typ. Max. Unit VUVON 60 V VCC Supply voltage VUVON Undervoltage on threshold 6.9 8 V VUVOFF Undervoltage off threshold 6.5 7.8 V VUVH Undervoltage hysteresis 0.15 Supply current in off-state IS Supply current in on-state ILGND GND disconnection output current 0.5 V VCC = 24 V 300 500 VCC = 60 V 350 600 VCC = 24 V 1 1.4 VCC = 60 V 1.4 2.1 VGND = VIN = VCC, VOUT = 0 V A mA 1 mA Typ. Max. Unit 60 80 Table 5. Output stage Symbol Parameter Test conditions Min. VCC = 24 V RDS(on) IOUT =1 A @ TJ = 25 C On-state resistance m VCC = 24 V 120 IOUT =1 A @ TJ = 125 C VOUT(OFF) Off-state output voltage IOUT(OFF) Off-state output current IOUT(OFF-min) Off-state output current VIN = 0 V and IOUT = 0 A 2 VCC = 24 V, VIN = 0 V, VOUT = 0 V 3 VCC = 60 V, VIN = 0 V, VOUT = 0 V 10 VIN = 0 V, VOUT = 4 V -35 V A 0 Table 6. Switching (VCC = 24 V; -40 C < TJ < 125 C, RLOAD = 48 ) Symbol DS13271 - Rev 2 Parameter tr Rise time tf Fall time tPD(H-L) Propagation delay time off tPD(L-H) Propagation delay time on tD(VCC-ON) Power-on delay time from VCC rising edge Test conditions Min. Typ. Max. Unit 10 IOUT = 0.5 A, (see Figure 4. Timing in normal operation ) 10 20 s 30 IOUT = 0.5 A, (see Figure 5. Propagation delay at startup) 32 60 page 6/27 IPS160HF, IPS161HF Electrical characteristics Figure 4. Timing in normal operation DS13271 - Rev 2 page 7/27 IPS160HF, IPS161HF Electrical characteristics Figure 5. Propagation delay at start-up VIN t VCC VUVON t td(Vcc-on) VOUT 10% t Table 7. Logic inputs Symbol DS13271 - Rev 2 Parameter VIL Input low level voltage VIH Input high level voltage VI(HYST) Input hysteresis voltage IIN Input current Test conditions Min. Typ. Max. Unit 0.8 V 2.2 0.4 VCC = VIN = 36 V 200 VCC = VIN = 60 V 550 A page 8/27 IPS160HF, IPS161HF Electrical characteristics Table 8. Protection and diagnostic Symbol Parameter Test conditions Vclamp VCC active clamp ICC = 10 mA Vdemag Demagnetization voltage IOUT = 0.5 A; load =1 mH VOLoff Open load (off-state) or short to VCC detection threshold tBKT Open load blanking time VDIAG Voltage drop on DIAG IDIAG DIAG pin leakage current IPK Output current limitation activation threshold ILIM tcoff Output current limitation IPS161HF Max. 65.5 68.5 71.5 Unit VCC-71.5 VCC-68.5 VCC-65.5 V 4 200 s IDIAG = 4 mA 1 V VCC 36 V 110 36 V VCC 60 V 180 VCC 24 V, RLOAD 10 m IPS160HF Cut-off current delay time Typ. 2 IPS161HF IPS160HF Min. Programmable by the external capacitor on CoD pin. Cut-off is disabled when CoD pin is connected to GND through 1 k resistor. 1.3 2.1 3.0 4.6 0.7 1.7 2.5 4.2 50xCCOD[nf] 35%(1) A A s TJ TJSD tres Output stage restart delay time TJSD Junction temperature shutdown TJHYST Junction temperature thermal hysteresis TJ TJSD 32xtCOFF[s] 40% 150 170 15 190 C 1. The formula is guaranteed in the range 10 nF CCOD 100 nF. DS13271 - Rev 2 page 9/27 IPS160HF, IPS161HF Output logic 5 Output logic Table 9. Output stage truth table Operation Normal Cut-off Overtemperature Open load UVLO IN OUT DIAG L L H H H H L L L H L L L L L H L L L H(1) L (1) H H H X L X X L X 1. External pull-up resistor is used DS13271 - Rev 2 page 10/27 IPS160HF, IPS161HF Protection and diagnostic 6 Protection and diagnostic The IC integrates several protections to ease the design of a robust application. 6.1 Undervoltage lock-out The device turns off if the supply voltage falls below the turn-off threshold (VUV(off)). Normal operation restarts after VCC exceeds the turn-on threshold (VUV(on)). Turn-on and turn-off thresholds are defined in Table 4. Supply. 6.2 Overtemperature The output stage turns off when its internal junction temperature (TJ) exceeds the shutdown threshold TJSD. Normal operation restarts when TJ comes back below the reset threshold (TJSD - TJHYST), see Table 8. Protection and diagnostic. The internal fault signal is set when the channel is off due to thermal protection and it is reset when the junction triggers the reset threshold. This same behavior is signaled on the DIAG pin. 6.3 Cut-off The IC can limit the output current at the power stage by its embedded output current limitation circuit. This circuit continuously monitor the output current and, when load is increasing, at the triggering of its activation threshold (Ipk) it starts limiting to ILIM limitation level: while current limitation is active the IC enters an high dissipation status. The IPS160HF implements the cut-off feature which limits the duration of the current limitation condition. The duration of the current limitation condition (Tcoff) can be set by a capacitor (CCoD) placed between CoD and GND pins. The design rule for CCoD is: tcoff[us] 35% = 50 x Ccod[nF] The 35% drift is guaranteed in the range of 10 nF < Ccod < 100 nF; lower capacitance than 10 nF can be used. If ILIM threshold is triggered, the output stage remains in the current limitation condition (IOUT = ILIM) no longer than tCOFF. If tCOFF elapses, the output stage turns off and restarts after the tRES restart time. Thermal shutdown protection has higher priority than cut-off: * IC is forced off if TJSD is triggered before tCOFF elapses * DS13271 - Rev 2 if TJSD is triggered, IC is maintained off even after the tRES has elapsed and until the TJ falls below TJSDTJHYST page 11/27 IPS160HF, IPS161HF Cut-off Figure 6. Current limitation and cut-off I OUT t COFF t ILIM TJ <TJSD ~ ~ V IN tPD(L-H) t tPD(H-L) ~ ~ t V DIAG ~ ~ t The fault condition is reported on the DIAG pin. The internal cut-off flag signal is latched at output switch-off and released after the time tRES, the same behavior is signaled on DIAG pin. The status of the DIAG is independent on the IN pin status. If CoD pin is connected to GND through 1 k resistor (cut-off feature disabled), when the output channel triggers the limitation threshold, it remains on, in current limitation condition, until the input becomes LOW or the thermal protection threshold is triggered. In case of low ambient temperature conditions (TAMB < -20 C) and high supply voltage (VCC > 36 V), the cut-off function requires activation in order to avoid damaging the IC. The following table shows the suggested cut-off delay for different operating voltages. Table 10. Minimum cut-off delay for TAMB less than -20 C DS13271 - Rev 2 VCC [V] Cut-off delay [s] Cut-off capacitance [nF] 36-48 100 2.2 48-60 50 1 page 12/27 IPS160HF, IPS161HF Open load in off-state 6.4 Open load in off-state The IC provides the open load detection feature which detects if the load is disconnected from the OUT pin. This feature can be activated by a resistor (RPU) between OUT and VCC pins. Figure 7. Open load off-state Application board VCC SUPPLY RAIL IC VCC EXPOSED PAD Open load detection signal R PU + - OUT VOLOFF RI R LED R LOAD PGND GROUND PLANE In case of wire break and during the OFF state (IN = low), the output voltage VOUT rises according to the partitioning between the external pull-up resistor and the internal impedance of the IC (130 k < RI < 360 k). The effect of the LED (if any) on the output pin has to be considered as well. In case of wire break and during the ON state (IN = high), the output voltage VOUT is pulled up to VCC by the low resistive integrated switch. If the load is not connected, in order to guarantee the correct open load signalization it must result: VOUT > VOLoff(max.) Referring to the circuit in Figure 7. Open load off-state: therefore: VOUT = VCC - RPU x IPU = VCC - RPU x IRI + ILED + IRL VCC min - VOLoff max RPU < VOLoff max VOLoff max - VLED + RI min RLED (1) (2) If the load is connected, in order to avoid any false signalization of the open load, the following condition must hold: VOUT < VOLoff(min) By taking into account the circuit in figure 6: so: VOUT = VCC - RPU x IPU = VCC - RPU x VOUT VOUT - VLED VOUT + + RI RLED RL VCC max - VOLoff min RPU > VOLoff min VOLoff min - VLED VOLoff min + + RI max RLED RL (3) (4) The fault condition is signaled on the DIAG pin and the fault reset occurs when load is reconnected. If the channel is switched on by the IN pin, the fault condition is no longer detected. DS13271 - Rev 2 page 13/27 IPS160HF, IPS161HF VCC disconnection protection When an inductive load is driven, some ringing of the output voltage may be observed at the end of the demagnetization. In fact, the load is completely demagnetized when ILOAD = 0 A and the OUT pin remains floating until next turn-on. In order to avoid false detection of the open load event when driving inductive loads, the open load signal is masked for tBKT. So, the open load is reported on the DIAG pin with a delay of tBKT and if the open load event is triggered for more than tBKT. 6.5 VCC disconnection protection The IC is protected despite the VCC disconnection event. This event is intended as the disconnection of the VCC wire from the application board, see figure below. When this condition happens, the IC continues working normally until the voltage on the VCC pin is VUVOFF. Once the VUVOFF is triggered, the output channel is turned off independently on the input status. In case of inductive load, if the VCC is disconnected while the output channel is still active, the IC allows the discharge of the energy still stored in the inductor through the integrated power switch. Figure 8. VCC disconnection APPLICATION BOARD VCC >VUVOFF VCC EXPOSED PAD CVCC SUPPLY RAIL DRIVING CIRCUITRY ON OUT IC GROUND PLANE DS13271 - Rev 2 GND page 14/27 IPS160HF, IPS161HF GND disconnection protection 6.6 GND disconnection protection GND disconnection is intended as the disconnection event of the application ground, see figure below. When this event happens, the IC continues working normally until the voltage between VCC and GND pins of the IC is VUVOFF. The voltage on GND pin of the IC rises up to the supply rail voltage level. In case of GND disconnection event, a current (ILGND) flows through OUT pin. Table 4. Supply shows IOUT = ILGND for the worst case GND disconnection event where the output is shorted to ground. Figure 9. GND disconnection APPLICATION BOARD SUPPLY RAIL VCC VCC EXPOSED PAD CVCC DRIVING CIRCUITRY ON OUT IC LOAD GROUND PLANE DS13271 - Rev 2 GND page 15/27 IPS160HF, IPS161HF Active VDS clamp 7 Active VDS clamp Active clamp is also known as fast demagnetization of inductive loads or fast current decay. When a high-side driver turns off an inductance, an undervoltage is detected on output. The OUT pin is pulled down to Vdemag. The conduction state is modulated by internal circuitry in order to keep the OUT pin voltage at about Vdemag until the load energy has been dissipated. The energy is dissipated both in the IC internal switch and in the load resistance. Figure 10. Active clamp equivalent principle schematic APPLICATION BOARD SUPPLY RAIL IC VCC EXPOSED PAD Clamp circuitry OUT L LOAD GROUND PLANE DS13271 - Rev 2 GND page 16/27 IPS160HF, IPS161HF Active VDS clamp Figure 11. Fast demag waveforms IOUT tDEMAG ~ ILOAD tON t VOUT ~ VCC t VCC-VDEMAG VIN ~ t The demagnetization of inductive load causes large electrical and thermal stress on the IC. The plot below shows the maximum demagnetization energy that the IC can tolerate in a single demagnetization pulse with VCC = 24 V and TAMB = 125 C. If higher demagnetization energy is required, then an external free-wheeling Schottky diode has to be connected between OUT (cathode) and GND (anode) pins. Note that in this case the fast demagnetization is inhibited. DS13271 - Rev 2 page 17/27 IPS160HF, IPS161HF Active VDS clamp Figure 12. Typical demagnetization energy (single pulse) at VCC = 24 V and TAMB = 125 C 4000 3500 EDEMAG [mJ] 3000 2500 2000 1500 1000 500 0 500 700 900 1100 1300 ILOAD DS13271 - Rev 2 1500 1700 1900 2100 2300 2500 [mA] page 18/27 IPS160HF, IPS161HF Package information 8 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS13271 - Rev 2 page 19/27 IPS160HF, IPS161HF PowerSSO12 package information 8.1 PowerSSO12 package information Figure 13. PowerSSO12 package outline 7392413 rev. D DS13271 - Rev 2 page 20/27 IPS160HF, IPS161HF PowerSSO12 package information Table 11. PowerSSO12 package mechanical data Dim. mm Min. Typ. A 1.250 1.700 A1 0.000 0.100 A2 1.100 1.600 B 0.230 0.410 C 0.190 0.250 D 4.800 5.000 E 3.800 4.000 e 0.800 H 5.800 6.200 h 0.250 0.55 L 0.400 1.270 k 0d 8d X 1.900 2.500 Y 3.600 4.200 ddd Note: Max. 0.100 Dimension D doesn't include mold flash protrusions or gate burrs. Mold flash protrusions or gate burrs don't exceed 0.15 mm in total both side. Figure 14. PowerSSO12 recommended footprint DS13271 - Rev 2 page 21/27 IPS160HF, IPS161HF PowerSSO12 package information Figure 15. PowerSSO12 tape packing information [mm] Figure 16. PowerSS012 reel packing information [mm] DS13271 - Rev 2 page 22/27 IPS160HF, IPS161HF Revision history Table 12. Document revision history DS13271 - Rev 2 Date Revision Changes 23-Apr-2020 1 Initial release. 26-Jun-2020 2 IPS161HF RPN added to document page 23/27 IPS160HF, IPS161HF Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Output logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 6 Protection and diagnostic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 6.1 Undervoltage lock-out. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.2 Overtemperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.3 Cut-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.4 Open load in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.5 VCC disconnection protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.6 GND disconnection protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 Active clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 8 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 8.1 PowerSSO12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 DS13271 - Rev 2 page 24/27 IPS160HF, IPS161HF List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Switching (VCC = 24 V; -40 C < TJ < 125 C, RLOAD = 48 ). Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . Output stage truth table . . . . . . . . . . . . . . . . . . . . . . . . . . Minimum cut-off delay for TAMB less than -20 C . . . . . . . . . PowerSSO12 package mechanical data . . . . . . . . . . . . . . . Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . DS13271 - Rev 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 5 . 5 . 6 . 6 . 6 . 8 . 9 10 12 21 23 page 25/27 IPS160HF, IPS161HF List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. DS13271 - Rev 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timing in normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Propagation delay at start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current limitation and cut-off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open load off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active clamp equivalent principle schematic . . . . . . . . . . . . . . . . . . . . . . . . . . Fast demag waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical demagnetization energy (single pulse) at VCC = 24 V and TAMB = 125 C PowerSSO12 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO12 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO12 tape packing information [mm] . . . . . . . . . . . . . . . . . . . . . . . . . PowerSS012 reel packing information [mm] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 3 . 4 . 7 . 8 12 13 14 15 16 17 18 20 21 22 22 page 26/27 IPS160HF, IPS161HF IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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