© Semiconductor Components Industries, LLC, 2009
April, 2009 Rev. 13
1Publication Order Number:
MC10LVEP11/D
MC10LVEP11, MC100LVEP11
2.5V / 3.3V ECL 1:2
Differential Fanout Buffer
Description
The MC10/100LVEP11 is a differential 1:2 fanout buffer. The
device is pin and functionally equivalent to the EP11 device. With AC
performance the same as the EP11 device, the LVEP11 is ideal for
applications requiring lower voltage. Singleended CLK input
operation is limited to a VCC w 3.0 V in PECL mode, or VEE v
3.0 V in NECL mode.
The 100 Series contains temperature compensation.
Features
240 ps Typical Propagation Delay
Maximum Frequency > 3.0 GHz Typical
PECL Mode Operating Range: VCC = 2.375 V to 3.8 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 2.375 V to 3.8 V
Open Input Default State
Q Output Will Default LOW with Inputs Open or at VEE
LVDS Input Compatible
PbFree Packages are Available
*For additional marking information, refer to
Application Note AND8002/D.
H = MC10 A = Assembly Location
K = MC100 L = Wafer Lot
5X = MC10 Y= Year
4K = MC100 W = Work Week
M= Date Code
G= PbFree Package
ALYWG
G
HU11
ALYWG
G
KU11
MARKING
DIAGRAMS*
SOIC8
D SUFFIX
CASE 751
TSSOP8
DT SUFFIX
CASE 948R
1
8
1
8
1
8
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
1
8
HVP11
ALYW
G
1
8
KVP11
ALYW
G
1
8
DFN8
MN SUFFIX
CASE 506AA
5X MG
G
14
(Note: Microdot may be in either location)
4K MG
G
14
MC10LVEP11, MC100LVEP11
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2
1
2
3
45
6
7
8
D
VEE
VCC
Q0
DQ1
Q1
Q0
Figure 1. 8Lead Pinout (Top View) and Logic
Diagram
Table 1. PIN DESCRIPTION
PIN FUNCTION
D*, D** ECL Data Inputs
Q0, Q0, Q1, Q1 ECL Data Outputs
VCC Positive Supply
VEE Negative Supply
EP (DFN8 only) Thermal exposed pad
must be connected to a sufficient
thermal conduit. Electrically connect to
the most negative supply (GND) or
leave unconnected, floating open.
*Pins will default to 2/3 VCC when left open.
**Pins will default LOW when left open.
Table 2. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor 75 kW
Internal Input Pullup Resistor 37.5 kW
ESD Protection Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 @ 0.125 in
Transistor Count 110 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
MC10LVEP11, MC100LVEP11
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3
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
VCC PECL Mode Power Supply VEE = 0 V 6 V
VEE NECL Mode Power Supply VCC = 0 V 6 V
VIPECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
VI v VCC
VI w VEE
6
6
V
V
Iout Output Current Continuous
Surge
50
100
mA
mA
TAOperating Temperature Range 40 to +85 °C
Tstg Storage Temperature Range 65 to +150 °C
qJA Thermal Resistance (JunctiontoAmbient) 0 lfpm
500 lfpm
SOIC8
SOIC8
190
130
°C/W
°C/W
qJC Thermal Resistance (JunctiontoCase) Standard Board SOIC841 to 44 °C/W
qJA Thermal Resistance (JunctiontoAmbient) 0 lfpm
500 lfpm
TSSOP8
TSSOP8
185
140
°C/W
°C/W
qJC Thermal Resistance (JunctiontoCase) Standard Board TSSOP841 to 44 °C/W
qJA Thermal Resistance (JunctiontoAmbient) 0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
°C/W
Tsol Wave Solder Pb
PbFree
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
265
265
°C
qJC Thermal Resistance (JunctiontoCase) (Note 2) DFN8 35 to 40 °C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. JEDEC standard multilayer board 2S2P (2 signal, 2 power)
MC10LVEP11, MC100LVEP11
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4
Table 4. 10LVEP DC CHARACTERISTICS, PECL VCC = 2.5 V, VEE = 0 V (Note 3)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 25 33 40 29 33 40 32 34 42 mA
VOH Output HIGH Voltage (Note 4) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV
VOL Output LOW Voltage (Note 4) 565 740 865 630 805 930 690 865 990 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 5)
1.2 2.5 1.2 2.5 1.2 2.5 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current D
D
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to 1.3 V.
4. All loading with 50 W to VCC 2.0 V.
5. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal. SingleEnded input CLK pin operation is limited to VCC w 3.0 V in PECL mode.
Table 5. 10LVEP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 6)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 25 33 40 29 33 40 32 34 42 mA
VOH Output HIGH Voltage (Note 7) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV
VOL Output LOW Voltage (Note 7) 1365 1540 1665 1430 1605 1730 1490 1665 1790 mV
VIH Input HIGH Voltage (SingleEnded)
(Note 8)
2090 2415 2155 2480 2215 2540 mV
VIL Input LOW Voltage (SingleEnded)
(Note 8)
1365 1690 1430 1755 1490 1815 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 9)
1.2 3.3 1.2 3.3 1.2 3.3 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current D
D
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to 0.5 V.
7. All loading with 50 W to VCC 2.0 V.
8. SingleEnded input CLK pin operation is limited to VCC w 3.0 V in PECL mode.
9. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
MC10LVEP11, MC100LVEP11
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5
Table 6. 10LVEP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = 3.8 V to 2.375 V (Note 10)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 25 33 40 29 33 40 32 34 42 mA
VOH Output HIGH Voltage (Note 11) 1135 1010 885 1070 945 820 1010 885 760 mV
VOL Output LOW Voltage (Note 11) 1935 1760 1635 1870 1695 1570 1810 1635 1510 mV
VIH Input HIGH Voltage (SingleEnded)
(Note 12)
1210 885 1145 820 1085 760 mV
VIL Input LOW Voltage (SingleEnded)
(Note 12)
1935 1610 1870 1545 1810 1485 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 13)
VEE+1.2 0.0 VEE+1.2 0.0 VEE+1.2 0.0 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current D
D
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10.Input and output parameters vary 1:1 with VCC.
11. All loading with 50 W to VCC 2.0 V.
12.SingleEnded input CLK pin operation is limited to VEE v 3.0 V in NECL mode.
13.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 7. 100LVEP DC CHARACTERISTICS, PECL VCC = 2.5 V, VEE = 0 V (Note 14)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 25 35 42 29 38 46 32 41 50 mA
VOH Output HIGH Voltage (Note 15) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV
VOL Output LOW Voltage (Note 15) 555 730 900 555 730 900 555 730 900 mV
VIH Input HIGH Voltage (SingleEnded) 1335 1620 1335 1620 1335 1620 mV
VIL Input LOW Voltage (SingleEnded) 555 900 555 900 555 900 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 16)
1.2 2.5 1.2 2.5 1.2 2.5 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current D
D
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14.Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to 1.3 V.
15.All loading with 50 W to VCC 2.0 V.
16.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal. SingleEnded input CLK pin operation is limited to VCC w 3.0 V in PECL mode.
MC10LVEP11, MC100LVEP11
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6
Table 8. 100LVEP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 17)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 25 35 42 29 38 46 32 41 50 mA
VOH Output HIGH Voltage (Note 18) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV
VOL Output LOW Voltage (Note 18) 1355 1530 1700 1355 1530 1700 1355 1530 1700 mV
VIH Input HIGH Voltage (SingleEnded)
(Note 19)
2135 2420 2135 2420 2135 2420 mV
VIL Input LOW Voltage (SingleEnded)
(Note 19)
1355 1700 1355 1700 1355 1700 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 20)
1.2 3.3 1.2 3.3 1.2 3.3 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current D
D
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17.Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to 0.5 V.
18.All loading with 50 W to VCC 2.0 V.
19.SingleEnded input CLK pin operation is limited to VCC w 3.0 V in PECL mode.
20.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 9. 100LVEP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = 3.8 V to 2.375 V (Note 21)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 25 35 42 29 38 46 32 41 50 mA
VOH Output HIGH Voltage (Note 22) 1145 1020 895 1145 1020 895 1145 1020 895 mV
VOL Output LOW Voltage (Note 22) 1945 1770 1600 1945 1770 1600 1945 1770 1600 mV
VIH Input HIGH Voltage (SingleEnded)
(Note 23)
1165 880 1165 880 1165 880 mV
VIL Input LOW Voltage (SingleEnded)
(Note 23)
1945 1425 1600 1945 1425 1600 1945 1425 1600 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 24)
VEE+1.2 0.0 VEE+1.2 0.0 VEE+1.2 0.0 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current D
D
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
21.Input and output parameters vary 1:1 with VCC.
22.All loading with 50 W to VCC 2.0 V.
23.SingleEnded input CLK pin operation is limited to VEE 3.0 V in NECL mode.
24.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
MC10LVEP11, MC100LVEP11
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7
Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = 3.8 V to 2.375 V or VCC = 2.375 V to 3.8 V; VEE = 0 V (Note 25)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
fmax Maximum Frequency (Figure 2) 3 3 3 GHz
tPLH,
tPHL
Propagation Delay
(Differential Configuration)
CLK to Q, Q
170 230 300 180 240 310 210 270 360 ps
tSKEW Within Device Skew Q, Q
Device to Device Skew (Note 26)
5.0 20
130
5.0 20
130
5.0 20
150
ps
tJITTER CLOCK Random Jitter (RMS)
@ v1.0 GHz
@ v1.5 GHz
@ v2.0 GHz
@ v2.5 GHz
@ v3.0 GHz
0.126
0.112
0.111
0.112
0.155
0.3
0.2
0.3
0.2
0.2
0.142
0.162
0.122
0.172
0.217
0.4
0.3
0.2
0.3
0.3
0.209
0.162
0.170
0.235
0.368
0.3
0.2
0.3
0.3
0.6
ps
VPP Input Voltage Swing
(Differential Configuration)
150 800 1200 150 800 1200 150 800 1200 mV
tr
tf
Output Rise/Fall Times Q, Q
(20% 80%)
70 110 170 80 120 180 100 140 200 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
25.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V.
26.Skew is measured between outputs under identical transitions.
0
100
200
300
400
500
600
700
800
900
1000
0 1000 2000 3000 4000
FREQUENCY (MHz)
Figure 2. Fmax Typical
VOUTpp (mV)
3.3 V
2.5 V
MC10LVEP11, MC100LVEP11
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8
Figure 3. Typical Phase Noise Plot at
fcarrier = 156.25 MHz
Figure 4. Typical Phase Noise Plot at
fcarrier = 311.04 MHz
Figure 5. Typical Phase Noise Plot at
fcarrier = 1.5 GHz
Figure 6. Typical Phase Noise Plot at
fcarrier = 2 GHz
The above phase noise plots captured using Agilent
E5052A show additive phase noise of the MC100LVEP11
device at frequencies 156.25 MHz, 311.04 MHz, 1.5 GHz
and 2 GHz respectively at an operating voltage of 3.3 V in
room temperature. The RMS Phase Jitter contributed by the
device (integrated between 12 kHz and 20 MHz; as shown
in the shaded region of the plot) at each of the frequencies
is 66 fs, 37 fs, 14 fs and 13 fs respectively. The input source
used for the phase noise measurements is Agilent E8663B.
MC10LVEP11, MC100LVEP11
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9
Figure 7. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Zo = 50 W
Zo = 50 W
50 W50 W
VTT
VTT = VCC 2.0 V
ORDERING INFORMATION
Device Package Shipping
MC10LVEP11D SOIC898 Units / Rail
MC10LVEP11DG SOIC8
(PbFree)
98 Units / Rail
MC10LVEP11DR2 SOIC82500 / Tape & Reel
MC10LVEP11DR2G SOIC8
(PbFree)
2500 / Tape & Reel
MC10LVEP11DT TSSOP8100 Units / Rail
MC10LVEP11DTG TSSOP8
(PbFree)
100 Units / Rail
MC10LVEP11DTR2 TSSOP82500 / Tape & Reel
MC10LVEP11DTR2G TSSOP8
(PbFree)
2500 / Tape & Reel
MC10LVEP11MNR4 DFN8 1000 / Tape & Reel
MC10LVEP11MNR4G DFN8
(PbFree)
1000 / Tape & Reel
MC100LVEP11D SOIC898 Units / Rail
MC100LVEP11DG SOIC8
(PbFree)
98 Units / Rail
MC100LVEP11DR2 SOIC82500 / Tape & Reel
MC100LVEP11DR2G SOIC8
(PbFree)
2500 / Tape & Reel
MC100LVEP11DT TSSOP8100 Units / Rail
MC100LVEP11DTG TSSOP8
(PbFree)
100 Units / Rail
MC100LVEP11DTR2 TSSOP82500 / Tape & Reel
MC100LVEP11DTR2G TSSOP8
(PbFree)
2500 / Tape & Reel
MC100LVEP11MNR4 DFN8 1000 / Tape & Reel
MC100LVEP11MNR4G DFN8
(PbFree)
1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MC10LVEP11, MC100LVEP11
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10
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
MC10LVEP11, MC100LVEP11
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11
PACKAGE DIMENSIONS
SOIC8 NB
CASE 75107
ISSUE AH
SEATING
PLANE
1
4
58
N
J
X 45 _
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 75101 THRU 75106 ARE OBSOLETE. NEW
STANDARD IS 75107.
A
BS
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
X
Y
G
M
Y
M
0.25 (0.010)
Z
Y
M
0.25 (0.010) ZSXS
M
____
1.52
0.060
7.0
0.275
0.6
0.024
1.270
0.050
4.0
0.155
ǒmm
inchesǓ
SCALE 6:1
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
MC10LVEP11, MC100LVEP11
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12
PACKAGE DIMENSIONS
TSSOP8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R02
ISSUE A
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A2.90 3.10 0.114 0.122
B2.90 3.10 0.114 0.122
C0.80 1.10 0.031 0.043
D0.05 0.15 0.002 0.006
F0.40 0.70 0.016 0.028
G0.65 BSC 0.026 BSC
L4.90 BSC 0.193 BSC
M0 6 0 6
____
SEATING
PLANE
PIN 1
14
85
DETAIL E
B
C
D
A
G
DETAIL E
F
M
L
2X L/2
U
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V S
T
0.10 (0.004)
T
V
W
0.25 (0.010)
8x REFK
IDENT
K0.25 0.40 0.010 0.016
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
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13
PACKAGE DIMENSIONS
DFN8
CASE 506AA01
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
A
D
E
B
C0.10
PIN ONE
2 X
REFERENCE
2 X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
A
L
(A3)
D2
E2
C
C0.10
C0.10
C0.08
8 X
A1
SEATING
PLANE
e/2 e
8 X
K
NOTE 3
b
8 X 0.10 C
0.05 C
ABB
DIM MIN MAX
MILLIMETERS
A0.80 1.00
A1 0.00 0.05
A3 0.20 REF
b0.20 0.30
D2.00 BSC
D2 1.10 1.30
E2.00 BSC
E2 0.70 0.90
e0.50 BSC
K0.20 −−−
L0.25 0.35
14
85
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