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FEATURES
DESCRIPTION
SN74AVCB16424516-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
•Overvoltage-Tolerant Inputs/Outputs AllowMixed-Voltage-Mode Data Communications•Member of the Texas Instruments Widebus™Family •I
off
Supports Partial-Power-Down ModeOperation•DOC™ Circuitry Dynamically Changes OutputImpedance, Resulting in Noise Reduction •Fully Configurable Dual-Rail Design AllowsWithout Speed Degradation Each Port to Operate Over Full 1.4-V to 3.6-VPower-Supply Range•Dynamic Drive Capability Is Equivalent toStandard Outputs With I
OH
and I
OL
of ±24 mA •Latch-Up Performance Exceeds 100 mA Perat 2.5-V V
CC
JESD 78, Class II•Control Inputs V
IH
/V
IL
Levels Are Referenced •ESD Protection Exceeds JESD 22to V
CCB
Voltage
– 2000-V Human-Body Model (A114-A)•If Either V
CC
Input Is at GND, Both Ports Are in
– 200-V Machine Model (A115-A)the High-Impedance State
– 1000-V Charged-Device Model (C101)
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. TheA port is designed to track V
CCA
. V
CCA
accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed totrack V
CCB
. V
CCB
accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltagebidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCB164245 is designed for asynchronous communication between data buses. The device transmitsdata from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at thedirection-control (DIR) input. The output-enable ( OE) input can be used to disable the outputs so the buses areeffectively isolated.
The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1 OE, and 2 OE) are supplied by V
CCB
.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CCB
through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down. If either V
CC
input is at GND,both ports are in the high-impedance state.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
FBGA – GRD Tape and reel 74AVCB164245GRDR
WB4245FBGA – ZRD (Pb-Free) Tape and reel 74AVCB164245ZRDRTSSOP – DGG Tape and reel SN74AVCB164245GR AVCB164245–40 °C to 85 °C
TVSOP – DGV Tape and reel SN74AVCB164245VR
WB4245VFBGA – GQL Tape and reel SN74AVCB164245KRVFBGA – ZQL (Pb-Free) Tape and reel 74AVCB164245ZQLR WB4245
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.Widebus, DOC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002–2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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TERMINAL ASSIGNMENTS
DGG OR DGV PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA
2A5
2A6
GND
2A7
2A8
2OE
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
2
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GQL OR ZQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
21 3 4 65
K
GRD OR ZRD PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
21 3 4 65
SN74AVCB16424516-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
TERMINAL ASSIGNMENTS
(56-Ball GQL/ZQL Package)
(1)
123456
A1DIR NC NC NC NC 1 OE
B1B2 1B1 GND GND 1A1 1A2
C1B4 1B3 V
CCB
V
CCA
1A3 1A4
D1B6 1B5 GND GND 1A5 1A6
E1B8 1B7 1A7 1A8
F2B1 2B2 2A2 2A1
G2B3 2B4 GND GND 2A4 2A3
H2B5 2B6 V
CCB
V
CCA
2A6 2A5
J2B7 2B8 GND GND 2A8 2A7
K2DIR NC NC NC NC 2 OE
(1) NC - No internal connection
TERMINAL ASSIGNMENTS
(54-Ball GRD/ZRD Package)
(1)
123456
A1B1 NC 1DIR 1 OE NC 1A1
B1B3 1B2 NC NC 1A2 1A3
C1B5 1B4 V
CCB
V
CCA
1A4 1A5
D1B7 1B6 GND GND 1A6 1A7
E2B1 1B8 GND GND 1A8 2A1
F2B3 2B2 GND GND 2A2 2A3
G2B5 2B4 V
CCB
V
CCA
2A4 2A5
H2B7 2B6 NC NC 2A6 2A7
J2B8 NC 2DIR 2 OE NC 2A8
(1) NC - No internal connectionxxxxx
xxxxx
xxxxx
xxxxx
xxxxx
FUNCTION TABLE(EACH 8-BIT SECTION)
INPUTS
OPERATIONOE DIR
L L B data to A busL H A data to B busH X Isolation
3
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To Seven Other Channels
1DIR
1A1
1B1
1OE
To Seven Other Channels
2DIR
2A1
2B1
2OE
1
47
24
36
48
2
25
13
Pin numbers shown are for the DGG and DGV packages.
Absolute Maximum Ratings
(1)
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CCA
Supply voltage range –0.5 4.6 VV
CCB
I/O ports (A port) –0.5 4.6V
I
Input voltage range
(2)
I/O ports (B port) –0.5 4.6 VControl inputs –0.5 4.6A port –0.5 4.6Voltage range applied to any output in the high-impedance orV
O
Vpower-off state
(2)
B port –0.5 4.6A port –0.5 V
CCA
+ 0.5V
O
Voltage range applied to any output in the high or low state
(2) (3)
VB port –0.5 V
CCB
+ 0.5I
IK
Input clamp current V
I
< 0 –50 mAI
OK
Output clamp current V
O
< 0 –50 mAI
O
Continuous output current 50 mAContinuous current through V
CCA
, V
CCB
, or GND 100 mADGG package 70DGV package 58θ
JA
Package thermal impedance
(4)
°C/WGQL/ZQL package 28GRD/ZRD package 36T
stg
Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.(3) The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.(4) The package thermal impedance is calculated in accordance with JESD 51-7.
4
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Recommended Operating Conditions
(1) (2) (3)
SN74AVCB16424516-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
over operating free-air temperature range (unless otherwise noted)
V
CCI
V
CCO
MIN MAX UNIT
V
CCA
Supply voltage 1.4 3.6 VV
CCB
Supply voltage 1.4 3.6 V1.4 V to 1.95 V V
CCI
×0.65V
IH
High-level input voltage Data inputs 1.95 V to 2.7 V 1.7 V2.7 V to 3.6 V 21.4 V to 1.95 V V
CCI
×0.35V
IL
Low-level input voltage Data inputs 1.95 V to 2.7 V 0.7 V2.7 V to 3.6 V 0.81.4 V to 1.95 V V
CCB
×0.65Control inputsV
IH
High-level input voltage 1.95 V to 2.7 V 1.7 V(referenced to V
CCB
)
2.7 V to 3.6 V 21.4 V to 1.95 V V
CCB
×0.35Control inputsV
IL
Low-level input voltage 1.95 V to 2.7 V 0.7 V(referenced to V
CCB
)
2.7 V to 3.6 V 0.8V
I
Input voltage 0 3.6 VActive state 0 V
CCOV
O
Output voltage V3-state 0 3.61.4 V to 1.6 V –21.65 V to 1.95 V –4I
OH
High-level output current mA2.3 V to 2.7 V –83 V to 3.6 V –121.4 V to 1.6 V 21.65 V to 1.95 V 4I
OL
Low-level output current mA2.3 V to 2.7 V 83 V to 3.6 V 12∆t/ ∆v Input transition rise or fall rate 5 ns/VT
A
Operating free-air temperature –40 85 °C
(1) V
CCI
is the V
CC
associated with the data input port.(2) V
CCO
is the V
CC
associated with the data output port.(3) All unused data inputs of the device must be held at V
CCI
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
5
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Electrical Characteristics
(1) (2)
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CCA
V
CCB
MIN TYP
(3)
MAX UNIT
I
OH
= –100 µA V
I
= V
IH
1.4 V to 3.6 V 1.4 V to 3.6 V V
CCO
– 0.2I
OH
= –2 mA V
I
= V
IH
1.4 V 1.4 V 1.05V
OH
I
OH
= –4 mA V
I
= V
IH
1.65 V 1.65 V 1.2 VI
OH
= –8 mA V
I
= V
IH
2.3 V 2.3 V 1.75I
OH
= –12 mA V
I
= V
IH
3 V 3 V 2.3I
OH
= 100 µA V
I
= V
IL
1.4 V to 3.6 V 1.4 V to 3.6 V 0.2I
OH
= 2 mA V
I
= V
IL
1.4 V 1.4 V 0.35V
OL
I
OH
= 4 mA V
I
= V
IL
1.65 V 1.65 V 0.45 VI
OH
= 8 mA V
I
= V
IL
2.3 V 2.3 V 0.55I
OH
= 12 mA V
I
= V
IL
3 V 3 V 0.7I
I
Control inputs V
I
= V
CCB
or GND 1.4 V to 3.6 V 3.6 V ±2.5 µAA port 0 V 0 to 3.6 V ±10I
off
V
I
or V
O
= 0 to 3.6 V µAB port 0 to 3.6 V 0 V ±10A or B ports OE = V
IH
3.6 V 3.6 V ±12.5V
O
= V
CCO
or GND,I
OZ
(4)
B port 0 V 3.6 V ±12.5 µAOE = don'tV
I
= V
CCI
or GND
careA port 3.6 V 0 V ±12.51.6 V 1.6 V 201.95 V 1.95 V 202.7 V 2.7 V 30I
CCA
V
I
= V
CCI
or GND, I
O
= 0 µA0 V 3.6 V –403.6 V 0 V 403.6 V 3.6 V 401.6 V 1.6 V 201.95 V 1.95 V 202.7 V 2.7 V 30I
CCB
V
I
= V
CCI
or GND, I
O
= 0 µA0 V 3.6 V 403.6 V 0 V –403.6 V 3.6 V 40C
i
Control inputs V
I
= 3.3 V or GND 3.3 V 3.3 V 4 pFC
io
A or B ports V
O
= 3.3 V or GND 3.3 V 3.3 V 5 pF
(1) V
CCO
is the V
CC
associated with the output port.(2) V
CCI
is the V
CC
associated with the input port.(3) All typical values are at T
A
= 25 °C.(4) For I/O ports, the parameter I
OZ
includes the input leakage current.
6
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Switching Characteristics
Switching Characteristics
Switching Characteristics
Switching Characteristics
SN74AVCB16424516-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
over recommended operating free-air temperature range, V
CCA
= 1.5 V ±0.1 V (see Figure 2 )
V
CCB
= 1.5 V V
CCB
= 1.8 V V
CCB
= 2.5 V V
CCB
= 3.3 VFROM TO
0.1 V 0.15 V 0.2 V 0.3 VPARAMETER UNIT(INPUT) (OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
A B 1.7 6.7 1.9 6.3 1.8 5.5 1.7 5.8t
pd
nsB A 1.8 6.8 2.2 7.4 2.1 7.6 2.1 7.3A 2.5 8.4 2.4 7.4 2.1 5.2 1.9 4.2t
en
OE nsB 2.1 9 2.9 9.8 3.2 10 3 9.8A 2.2 6.9 2.3 6.1 1.3 3.6 1.3 3t
dis
OE nsB 2.1 7.1 2.3 6.4 1.7 5.1 1.6 4.8
over recommended operating free-air temperature range, V
CCA
= 1.8 V ±0.15 V (see Figure 2 )
V
CCB
= 1.5 V V
CCB
= 1.8 V V
CCB
= 2.5 V V
CCB
= 3.3 VFROM TO
0.1 V 0.15 V 0.2 V 0.3 VPARAMETER UNIT(INPUT) (OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
A B 1.7 6.7 1.8 6 1.7 4.7 1.6 4.3t
pd
nsB A 1.4 5.5 1.8 6 1.8 5.8 1.8 5.5A 2.6 8.5 2.5 7.5 2.2 5.3 1.9 4.2t
en
OE nsB 1.8 7.6 2.6 7.7 2.6 7.6 2.6 7.4A 2.3 7 2.3 6.1 1.3 3.6 1.3 3t
dis
OE nsB 1.8 7 2.5 6.3 1.8 4.7 1.7 4.4
over recommended operating free-air temperature range, V
CCA
= 2.5 V ±0.2 V (see Figure 2 )
V
CCB
= 1.5 V V
CCB
= 1.8 V V
CCB
= 2.5 V V
CCB
= 3.3 VFROM TO
0.1 V 0.15 V 0.2 V 0.3 VPARAMETER UNIT(INPUT) (OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
A B 1.6 6 1.8 5.6 1.5 4 1.4 3.4t
pd
nsB A 1.3 4.6 1.7 4.4 1.5 4 1.4 3.7A 3.1 8.5 2.5 7.5 2.2 5.3 1.9 4.2t
en
OE nsB 1.7 5.7 2.2 5.5 2.2 5.3 2.2 5.1A 2.4 7 3 6.1 1.4 3.6 1.2 3t
dis
OE nsB 1.2 5.8 1.9 5 1.4 3.6 1.3 3.3
over recommended operating free-air temperature range, V
CCA
= 3.3 V ±0.3 V (see Figure 2 )
V
CCB
= 1.5 V V
CCB
= 1.8 V V
CCB
= 2.5 V V
CCB
= 3.3 VFROM TO
0.1 V 0.15 V 0.2 V 0.3 VPARAMETER UNIT(INPUT) (OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
A B 1.5 5.9 1.7 5.4 1.5 3.7 1.4 3.1t
pd
nsB A 1.3 4.5 1.6 3.8 1.5 3.3 1.4 3.1A 2.6 8.3 2.5 7.4 2.2 5.2 1.9 4.1t
en
OE nsB 1.6 4.9 2 4.5 2 4.3 1.9 4.1A 2.3 7 3 6 1.3 3.5 1.2 3.5t
dis
OE nsB 1.3 6.9 2.1 5.5 1.6 3.8 1.5 3.5
7
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Operating Characteristics
Output Description
136 −128−144−160
0.4
0.8
1.2
1.6
2.0
2.4
2.8
17015311910285685134170
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2 TA = 25°C
Process = Nominal
IOL − Output Current − mA
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
− Output Voltage − V
OL
V
TA = 25°C
Process = Nominal
IOH − Output Current − mA
VCC = 3.3 V VCC = 2.5 V
VCC = 1.8 V
− Output Voltage − V
OH
V
−80−96−112 −32−48−64 0−16
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
V
CCA
and V
CCB
= 3.3 V, T
A
= 25 °C
PARAMETER TEST CONDITIONS TYP UNIT
Outputs enabled 14Power dissipation capacitance per transceiver,A-port input, B-port output
Outputs disabled 7C
pdA
C
L
= 0, f = 10 MHz pF(V
CCA
)
Outputs enabled 20Power dissipation capacitance per transceiver,B-port input, A-port output
Outputs disabled 7Outputs enabled 20Power dissipation capacitance per transceiver,A-port input, B-port output
Outputs disabled 7C
pdB
C
L
= 0, f = 10 MHz pF(V
CCB
)
Outputs enabled 14Power dissipation capacitance per transceiver,B-port input, A-port output
Outputs disabled 7
The DOC™ circuitry is implemented, which, during the transition, initially lowers the output impedance toeffectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical V
OL
vsI
OL
and V
OH
vs I
OH
curves to illustrate the output impedance and drive capability of the circuit. At the beginning ofthe signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drivestandard-output device. For more information, refer to the TI application reports, AVC Logic Family Technologyand Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology andApplications, literature number SCEA009.
Figure 1. Typical Output Voltage vs Output Current
8
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PARAMETER MEASUREMENT INFORMATION
VOH
VOL
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
2 × VCCO
Open
GND
RL
RL
tPLH tPHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
VCCB/2VCCB/2
VCCI/2 VCCI/2 VCCI
0 V
VCCO/2 VCCO/2VOH
VOL
0 V
VCCO/2 VOL + VTP
VCCO/2 VOH − VTP
0 V
VCCI
0 V
VCCI/2 VCCI/2
tw
Input
VCCB
VCCO
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
Input
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2 kΩ
1 kΩ
500 Ω
500 Ω
VCCO RL0.1 V
0.15 V
0.15 V
0.3 V
VTP
CL
15 pF
30 pF
30 pF
30 pF
SN74AVCB16424516-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394D – JUNE 2002 – REVISED JUNE 2005
Figure 2. Load Circuit and Voltage Waveforms
9
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
74AVCB164245ZQLR BGA MI
CROSTA
R JUNI
OR
ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1
74AVCB164245ZRDR BGA MI
CROSTA
R JUNI
OR
ZRD 54 1000 330.0 16.4 5.8 8.3 1.55 8.0 16.0 Q1
SN74AVCB164245GR TSSOP DGG 48 2000 330.0 24.4 8.6 13.0 1.8 12.0 24.0 Q1
SN74AVCB164245VR TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2017
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
74AVCB164245ZQLR BGA MICROSTAR
JUNIOR ZQL 56 1000 336.6 336.6 28.6
74AVCB164245ZRDR BGA MICROSTAR
JUNIOR ZRD 54 1000 336.6 336.6 28.6
SN74AVCB164245GR TSSOP DGG 48 2000 367.0 367.0 45.0
SN74AVCB164245VR TVSOP DGV 48 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2017
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUAR Y 1998
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040078/F 12/97
48 PINS SHOWN
0,25
0,15 NOM
Gage Plane
6,00
6,20 8,30
7,90
0,75
0,50
Seating Plane
25
0,27
0,17
24
A
48
1
1,20 MAX
M
0,08
0,10
0,50
0°–8°
56
14,10
13,90
48
DIM
A MAX
A MIN
PINS **
12,40
12,60
64
17,10
16,90
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
www.ti.com
PACKAGE OUTLINE
C
1 MAX
TYP
0.35
0.15
5.85
TYP
3.25 TYP
0.65 TYP
0.65 TYP
56X 0.45
0.35
B4.6
4.4 A
7.1
6.9
(0.625) TYP
(0.575) TYP
JRBGA - 1 mm max heightZQL0056A
PLASTIC BALL GRID ARRAY
4219711/B 01/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. No metal in this area, indicates orientation.
BALL A1 CORNER
SEATING PLANE
BALL TYP 0.1 C
0.15 C B A
0.08 C
SYMM
SYMM
BALL A1 CORNER
K
C
D
E
F
G
H
J
123456
A
B
NOTE 3
SCALE 2.100
www.ti.com
EXAMPLE BOARD LAYOUT
56X ( 0.33) (0.65) TYP
(0.65) TYP
( 0.33)
METAL
0.05 MAX
SOLDER MASK
OPENING METAL UNDER
SOLDER MASK
( 0.33)
SOLDER MASK
OPENING
0.05 MIN
JRBGA - 1 mm max heightZQL0056A
PLASTIC BALL GRID ARRAY
4219711/B 01/2017
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For information, see Texas Instruments literature number SPRAA99 (www.ti.com/lit/spraa99).
SYMM
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
123456
A
C
D
E
F
G
H
J
K
B
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
EXPOSED METAL
SOLDER MASK
DEFINED
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(0.65) TYP
(0.65) TYP 56X ( 0.33)
JRBGA - 1 mm max heightZQL0056A
PLASTIC BALL GRID ARRAY
4219711/B 01/2017
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
SYMM
123456
A
C
D
E
F
G
H
J
K
B
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