○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays
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©2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
Datashee
t
TSZ22111・14・001
Serial EEPROM Series Automotive EEPROM
125℃ Operation SPI BUS EEPROM
BR25H040-2C
●General Description
BR25H040-2C is a serial EEPROM of SPI BUS interface method.
●Features
High speed clock action up to 10MHz (Max.)
Wait function by HOLDB terminal.
Part or whole of memory arrays settable as read only
memory area by program.
2.5V to 5.5V single power source action most
suitable
for battery use.
Page write mode useful for initial value write at
factory shipment.
For SPI bus interface (CPOL, CPHA)=(0, 0), (1, 1)
Self-timed programming cycle.
Low Supply Current
At write operation (5V) : 1.0mA (Typ.)
At read operation (5V) : 1.0mA (Typ.)
At standby operation (5V) : 0.1μA (Typ.)
Address auto increment function at read operation
Prevention of write mistake
Write prohibition at power on.
Write prohibition by command code (WRDI).
Write prohibition by WPB pin.
Write prohibition block setting by status registers
(BP1, BP0).
Prevention of write mistake at low voltage.
MSOP8, TSSOP-B8, SOP8, SOP-J8 Package
Data at shipment Memory array: FFh, status register
BP1, BP0 : 0
More than 100 years data retention.
More than 1 million write cycles.
AEC-Q100 Qualified.
●Package
●Page write
Number of pages 16 Byte
Product Number BR25H040-2C
●BR25H040-2C
Capacity Bit Format Product Number Supply Voltage MSOP8 TSSOP-B8 SOP8 SOP-J8
4Kbit 512×8 BR25H040-2C 2.5V to 5.5V ● ● ● ●
MSOP8
2.90mm x 4.00mm x 0.90mm TSSOP-B8
3.00mm x 6.40mm x 1.20mm
SOP8
5.00mm x 6.20mm x 1.71mm SOP-J8
4.90mm x 6.00mm x 1.65mm
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Absolute maximum ratings (Ta=25°C)
Parameter Symbol Limits Unit
Supply Voltage VCC -0.3 to +6.5 V
380(MSOP8) *1
410(TSSOP-B8) *2
560(SOP8) *3
Permissible Dissipation Pd
560(SOP-J8) *4
mW
Storage Temperature Range Tstg -65 to +150 °C
Operating Temperature Range Topr -40 to +125 °C
Terminal Voltage － -0.3 to VCC+0.3 V
・When using at Ta=25℃ or higher, 3.1mW(*1) , 3.3mW(*2) , 4.5mW (*3,*4)to be reduced per 1℃
●Memory cell characteristics (VCC=2.5V to 5.5V)
Limits
Parameter Min. Typ. Max.
Unit Condition
1,000,000 － － Cycles Ta≦85°C
500,000 － － Cycles Ta≦105°C
Write Cycles *5
300,000 － － Cycles Ta≦125°C
100 － － Years Ta≦25°C
60 － － Years Ta≦105°C Data Retention *5
50 － － Years Ta≦125°C
*5: Not 100% TESTED
●Recommended Operating Ratings
Parameter Symbol Limits Unit
Supply Voltage VCC 2.5 to 5.5
Input Voltage Vin 0 to VCC V
●Input / output capacity (Ta=25°C, frequency=5MHz)
Parameter Symbol Conditions Min Max Unit
Input Capacity *6 C
IN V
IN=GND － 8
Output Capacity *6 C
OUT V
OUT=GND － 8 pF
*6: Not 100% TESTED
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●DC characteristics (Unless otherwise specified, Ta=-40°C to +125°C, VCC=2.5V to 5.5V)
Limits
Parameter Symbol
Min. Typ. Max.
Unit Conditions
Input High Voltage VIH 0.7xVCC － VCC
+0.3 V 2.5V≦VCC≦5.5V
Input Low Vo ltage VIL -0.3 － 0.3x
VCC V 2.5V≦VCC≦5.5V
Output Low Vol tage VOL 0 － 0.4 V IOL=2.1mA
Output High Voltage VOH VCC-0.5 － VCC V IOH=-0.4mA
Input Leakage
Current ILI -2 － 2 μAV
IN=0V to VCC
Output Leakage
Current ILO -2 － 2 μAV
OUT=0V to VCC, CSB=VCC
ICC1 － － 2.0 mA VCC=2.5V,fSCK=5MHz, tE/W=4ms
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Byt e wr i t e , Page wr i t e , Write status register
Supply Current
(WRITE)
ICC2 － － 3.0 mA VCC=5.5V,fSCK=5 or 10 MHz, tE/W=4ms
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Byt e wr i t e , Page wr i t e , Write status register
ICC3 － － 1.5 mA VCC=2.5V,fSCK=5MHz
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
ICC4 － － 2.0 mA VCC=5.5V,fSCK=5MHz
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
Supply Current
(READ)
ICC5 － － 4.0 mA VCC=5.5V,fSCK=10MHz
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
Standby Current ISB － － 10 μAVCC=5.5V
CSB=HOLDB=WPB=VCC,
SCK=SI=VCC or =GND, SO=OPEN
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●AC characteristics (Ta=-40°C to +125°C, unless otherwise specified, lo ad capacity CL1=100pF)
2.5V≦VCC≦5.5V 4.5V≦VCC≦5.5V
Parameter Symbol
Min. Typ. Max. Min. Typ. Max. Unit
SCK Frequency fSCK － － 5 － － 10 MHz
SCK High Time tSCKWH 85 － － 40 － － ns
SCK Low Time tSCKWL 85 － － 40 － － ns
CSB High Time tCS 85 － － 40 － － ns
CSB Setup Time tCSS 90 － － 30 － － ns
CSB Hold Time tCSH 85 － － 30 － － ns
SCK Setup Time tSCKS 90 － － 30 － － ns
SCK Hold Time tSCKH 90 － － 30 － － ns
SI Setup Time tDIS 20 － － 10 － － ns
SI Hold Time tDIH 30 － － 10 － － ns
Data Output Delay Time1 tPD1 － － 60 － － 40 ns
Data Output Delay Time2
(CL2=30pF) tPD2 － － 50 － － 30 ns
Output Hold Time tOH 0 － － 0 － － ns
Output Disable Time tOZ － － 100 － － 40 ns
HOLDB Setting
Setup T ime tHFS 0 － － 0 － － ns
HOLDB Setting
Hold T ime tHFH 40 － － 30 － － ns
HOLDB Release
Setup T ime tHRS 0 － － 0 － － ns
HOLDB Release
Hold T ime tHRH 70 － － 30 － － ns
Time from HOLDB
to Output High-Z tHOZ － － 100 － － 40 ns
Time from HOLDB
to Output Change tHPD － － 60 － － 40 ns
SCK Rise Time*1 tRC － － 1 － － 1 μs
SCK Fall Time*1 tFC － － 1 － － 1 μs
OUTPUT Rise Time*1 tRO － － 40 － － 40 ns
OUTPUT Fall Time*1 tFO － － 40 － － 40 ns
Write Time tE/W － － 4 － － 4 ms
*1 NOT 100% TESTED
●AC measurement conditions Limits
Parameter Symbol
Min. Typ. Max. Unit
Load Capacity 1 CL1 － － 100 pF
Load Capacity 2 CL2 － － 30 pF
Input Rise Time － － － 50 ns
Input Fall Time － － － 50 ns
Input Voltage － 0.2VCC/0.8VCC V
Input / Output
Judgment Voltage － 0.3VCC/0.7VCC
V
0.7Vcc
0.2Vcc
0.8Vcc
Input Voltage
0.3Vcc
Input/Output judgement voltage
Figure 1. Input/Output judgment voltage
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Serial Input / Output Timing
●Block diagram
Figure 5. Block diagram
Figure 2. Input timing
SI is taken into IC inside in sync with data rise edge of SCK. Input address and data from the most significant bit MSB.
Figure 3. Input / Output timing
SO is output in sync with data fall edge of SCK. Data is output from the most significant bit MSB.
Figure 4. HOLD timing
SO
INSTRUCTION DECODE
CONTROL CLO C K
GENERATION
VOLTAGE
DETECTION
WRITE
INHIBITION
HIGH VOLTAGE
GENERATOR
INSTRUCTION
REGISTER
4K
EEPROM
ADDRESS
REGISTER
DATA
REGISTER
ADDRESS
DECODER
READ/WRITE
AMP 8bit
8bit
STATUS REGISTER
CSB
SCK
HOLDB 9bit 9bit
WPB
SI
CSB
SCK
SI
SO
tCS tCSS
tSCKS tSCKWL tSCKWH
tDIS tDIH
tRC tFC
High-Z
CSB
SCK
SI
SO
tPD tOH tRO,tFO tOZ
tCSH tSCKH
tCS
Hi
g
h-Z
CSB
SCK
SI n+1
"H"
"L"
n
Dn
n-1
Dn Dn-1
HOLDB
SO Dn+1
tHFS tHFH
tHOZ
tHRS tHRH
tDIS
tHPD
High-Z
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Pin Configuration
●Pin Descriptions
Terminal
number Terminal
name Input
/Output Function
1 CSB Input Chip select input
2 SO Output Serial data output
3 WPB Input
Write protect input
Write status register command is prohibited.
Write command is prohibited.
4 GND
－ All input / output reference voltage, 0V
5 SI Input Start bit, ope code, address, and serial data input
6 SCK Input Serial clock input
7 HOLDB Input
Hold input
Command communications m ay be suspended
temporarily (HOLD status)
8 VCC
－ Power source to be connected
VCC HOLDB SCK SI
CSB SO WPB GND
BR25H040-2C
Figure 6. Pin assignment diagr am
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves
0
1
2
3
4
5
6
0123456
SUPPLY VOLTAGE : VCC［V］
INPUT LOW VOLTAGE : VIL ［V］
SPEC
Ta = -40℃
Ta = 25℃
Ta= 125℃
0
0.5
1
1.5
2
2.5
3
-1.2 -1 -0.8 -0.6 -0.4 -0.2 0
O UT PUT HI GH CURRE NT : IOH［mA］
O UT PUT HI GH V OL TAG E : VOH ［V］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
0
1
2
3
4
5
6
0123456
SUPPLY VOLTAGE : VCC［V］
INPUT HIGH VOLTAGE :VIH ［V］
SPEC
Ta= -40℃
Ta= 25 ℃
Ta= 12 5℃
Figure 7. Input High Voltage VIH
(CSB,SCK,SI,HOLDB,WPB) Figure 8. Input Low Voltage VIL
(CSB,SCK,SI,HOLDB,WPB)
Figure 9. Output Low Voltage VOL, IOL (Vcc=2.5V) Figure 10. Output High Voltage VOH, IOH (Vcc=2.5V)
0
0.2
0.4
0.6
0.8
1
0123456
O UT PUT LOW CURRENT : IOL［mA］
OUTPUT LOW VOLTAGE : VOL［V］
SPEC
Ta= -40℃
Ta= 25 ℃
Ta= 12 5℃
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0123456
SUPPLY VOLTAGE : VCC [V]
I NPUT LE AKAG E CURRE NT : ILI ［μA］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
0
1
1
2
2
3
3
0123456
SUPPLY VOLTAGE : Vcc （V］
O UT PUT L EA K CURRE NT : ILO ［μA］
SPEC
Ta= -4 0℃
Ta= 25℃
Ta= 125℃
0
1
2
3
4
0123456
SUPPLY VOLTAGE : VCC［V］
SUPP LY CURRENT (WRIT E) : Ic c 1, 2 ［mA］
SPEC
Ta= -40℃
Ta= 25 ℃
Ta= 12 5℃
SPEC
Figure 11. Input Leakage Current ILI
(CSB,SCK,SI,HOLDB,WPB) Figure 12. Output Leakage Current ILO(SO)(Vcc=5.5V)
Figure 13. Supply Current (WRITE ) ICC1,2
0
0.5
1
1.5
2
2.5
0123456
SUPPLY VOLTAGE : VCC［V］
S U PP LY CURRENT (READ) : Ic c 3, 4 ［mA］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 14. Supply Current (READ) ICC3,4
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
Figure 15. Supply Current (READ) ICC5
Figure 17. SCK Frequency fSCK
Figure.16 Standby Current ISB
Figure 18. SCK High Time tSCKWH
0
2
4
6
8
10
12
0123456
SUPPLY VOLTAGE : VCC［V］
S T ANDB Y CURRENT : ISB ［μA］
SPEC
Ta= -40 ℃
Ta = 25℃
Ta= 125℃
0.1
1
10
100
0123456
SUPPL Y VOLTAGE : VCC［V］
SCK FREQUENCY : fSCK [MHz]
SPEC
Ta = -40℃
Ta = 25℃
Ta = 125℃
SPEC
0
1
2
3
4
5
0123456
SUPPLY VOLTAGE : VCC［V］
SUPPLY CURRENT : Icc5 ［mA］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
SCK HIGH TIME : tSCKWH ［ns］
SPEC
Ta= -4 0℃
Ta= 25℃
Ta= 125℃
SPEC
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0
20
40
60
80
100
0123456
SUPPL Y VOL TAGE : VCC［V］
CSB HIGH TIME : tCS［ns］
SPEC
Ta = -40℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 19. SCK low time tSCKWL Figure 20. CSB high time tCS
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
CSB SETUP TIME : tCSS ［ns］
SPEC
Ta = -40℃
Ta = 25℃
Ta = 125℃
SPEC
Figure 21. CSB setup time tCSS
0
20
40
60
80
100
0123456
SUPPL Y VOL TAGE : VCC［V］
CSB HOLD TIME : tCSH ［ns］
SPEC
Ta= -4 0℃
Ta= 25 ℃
Ta= 125℃
SPEC
Figure 22. CSB hold time tCSH
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
SCK L OW TIME : tSCKWL
［ns］
SPEC
Ta = -40℃
Ta = 2 5℃
Ta= 125℃
SPEC
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0
10
20
30
40
50
0123456
SUPPLY VOLTAGE : VCC［V］
SI SE TUP TIME : tDIS［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
0
10
20
30
40
50
0123456
SUPPLY VOLTAGE : VCC［V］
SI HOLD TIME : tDIH ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
0
20
40
60
80
100
0123456
SUPPL Y VOL TAGE : VCC［V］
DATA OUTPUT DE LA Y TIME : t PD1 ［ns］
SPEC
Ta = -40℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 23. SI Setup Time tDIS Figure 24. SI Hold Time tDIH
Figure 25. Data Output Delay Time tPD1 (CL=100pF)
0
20
40
60
80
100
0123456
SUPPL Y VOL TAGE : VCC［V］
DATA OUTP UT DELAY TIME2 : t PD2 ［ns］
SPEC
Ta= -4 0℃
Ta= 25 ℃
Ta= 125℃
SPEC
Figure 26. Data Output Delay Time tPD2 (CL=30pF)
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0
20
40
60
80
100
120
0123456
SUPPLY VOLTAGE : VCC［V］
OUTPUT DISABLE TIME : tOZ ［ns］
SPEC
Ta = -40℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 27.Output Disable Time tOZ
0
10
20
30
40
50
0123456
SUPPL Y VOL TAGE : VCC［V］
HOL DB SETTING HOLD TIME : tHFH ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
HOLDB RELEASE HOLD TIME : tHRH ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 29. HOLDB Release Hold Time tHRH
Figure 28. HOLDB Setting Hold Time tHFH
Figure 30. Time from HOLDB to Output High-Z tHOZ
0
30
60
90
120
0123456
SUPPLY VOLTAGE : VCC［V］
TIME FROM HOLDB TO OUTP UT HIGH-Z : tHOZ ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0
2
4
6
8
0123456
SUPPL Y VOL TAGE : VCC［V］
WRITE TIME : tE /W ［ms］
SPEC
Ta = -40℃
Ta = 25℃
Ta = 125℃
Figure 34. Write Cycle Time tE/W
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
OUTPUT FAL L TIME : tFO ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
Figure 33. Output Fall Time tFO
Figure 32. Output Rise Time tRO
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
OUTPUT RISE TIME : tRO ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
Figure 31. Time from HOLDB to Output Change tHPD
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
TI ME FRO M HO LDB TO OUTPUT CHANGE : tHPD［ns］
SPEC
Ta= -4 0℃
Ta= 25℃
Ta= 125℃
SPEC
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Features
○Status registers
This IC has status registers. The status registers are of 8 bits and express the following parameters.
BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are
valid even when power source is turned off.
Number of data rewrite times and data hold time are same as characteristics of the EEPROM.
WEN can be set by write ena ble command and write disable command. WEN becomes write disable status when power
source is turned off. R/B is for write confirmation, therefore c annot be set externally.
The value of status register can be read by read status command.
●Status registers
Product number bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
BR25H040-2C 1 1 1 1 BP1 BP0 WEN R
――/B
bit Memory
location Function Contents
BP1
BP0 EEPROM EEPROM write disable block designation bit This designates the write disable area of
EEPROM. Write designation areas of product
numbers are shown below.
WEN Register Write and write sta tus register w rite enable
/ disable status confirmation bit
WEN=0=prohibited , WEN=1=permitted This confirms prohibited status or permitted
status of the write and the write status register.
R
――/B Register Write cycle status (READY / BUSY) confirmation bit
R/B=0=READY , R/B=1=BUSY This confirms READY status or BUSY status of
the write cycle.
●Write disable block setting
BP1 BP0 BR25H040-2C
0 0 None
0 1 180h-1FFh
1 0 100h-1FFh
1 1 000h-1FFh
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
○WPB pin
By setting WPB=LOW, write command is prohibited. As for BR25H040-2C, both WRITE and WRSR commands ar e
prohibited. However, when write cycle is in execution, no interruption can be made.
Product number WRSR WRITE
BR25H040-2C Prohibition
possible Prohibition
possible
○HOLDB pin
By HOLDB pin, data transfer can be interrupted. When SCK=”0”, by making HOLDB from “1” into”0”, data transfer to
EEPROM is interrupted. When SCK = “0”, by making HOLDB from “0” into “1”, data transfer is restarted.
●Command mode
Command Contents Ope codes
WREN Write enable Write enable command 0000 *110
WRDI Write disable Write disable comman d 0000 *100
READ Read Read command 0000 A8011
WRITE Write Write command 0000 A8010
RDSR Read status
register Status register read command 0000 *101
WRSR Write status
register Status register write command 0000 *001
*=Don’t Care Bit.
BR25H040-2C
16/32
Datasheet
Datasheet
www.rohm.com
©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Timing Chart
1. Write enable (WREN) / disable (WRDI) cycle
○This IC has write enable status and write disable status. It is set to write enable status by write enable command, and
it is set to write disable status by write disable command. As for these commands, set C SB LOW, and then input the
respective ope codes. The respective commands accept command at the 7-th clock rise. Even with input over 7 clocks,
command becomes valid.
When to carry out write and write status register command, it is necessary to set write enable status by the write enable
command. If write or write status register command is input in the write disable status, commands are cancelled. And even in
the write enable status, once write and write status register command is executed. It gets in the write disable status. After
power on, this IC is in write disable status.
2. Read command (READ)
Product
number Address
length
BR25H040-2C A8-A0
By read command, data of EEPROM can be read. As for this command, set CSB LOW, then input address after read ope
code. EEPROM starts data output of the designated address. Data output is started from SCK fall of 15 clock, and from D7 to
D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input of SCK, data
of the next address can be read. Increment read can read all the addresses of EEPROM. After reading data of the most
significant address, by continuing increment read, data of the most insignific ant address is read.
WREN (WRITE ENABLE): Write enable
Figure 35. Write enable command
Figure 36. Write disable
WRDI (WRITE DISABLE): Write disable
*= Don’t care
*= Don’t care
High-Z
603 712 45
CSB
SCK
SO
SI
0000*1110
High-Z
00 0 0
SI
*1 1 0 0
0312 4 7
CSB
SCK
5 6
SO
Figure 37. Read command
High-Z
1 1 0
0 3 7 1 2
D6
SO
CSB
SCK
SI
4 5
A
4
6 8
A7
A
0
A
1
D7
15 2216
D0
0 0 0 0 A8
D2 D1
～
～
～
～
～
～～
～
～
～
～
～
～
～
～
～
～
～
9 10 11
A6 A5
*
*
BR25H040-2C
17/32
Datasheet
Datasheet
www.rohm.com
©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
3. Write command (WRITE)
By write command, data of EEPROM can be written. As for this command, set CSB LOW, then input address and data
after write ope code. Then, by making CSB HIGH, the EEPROM starts w riting. The write time of EEPROM requires time of
tE/W (Max 4ms). During tE/W, other than status read command is not accepted. Start CSB after taking the last data (D0),
and before the next SCK clock starts. At other timing, write command is not executed, and this write command is
cancelled. This IC has page write function, and after input of data for 1 byte (8 bits), by continuing data input without
starting CSB, data up to 16 bytes can be written for one tE/W. In page write, the insignificant 4 bit of the designated
address is incremented internally at every time when data of 1 byte is input and data is written to respective addresses.
When data of the maximum bytes or higher is input, address rolls over, and previously input data is overwritten.
Write command is executed when CSB rises between the SCK clock rising edge to recognize the 8th bits of data input and
the next SCK rising edge. At other timings the write command is not executed and cancelled (F igure.48 valid timing c). In
page write, the CSB valid timing is every 8 bits. If CSB rises at other timings page write is cancelled together w ith the write
command and the input data is reset.
page0 000h 001h 002h ･･･ 00Eh 00Fh
page 1 010h 011h 012h ･･･ 01Eh 01Fh
page 2 020h 021h 022h ･･･ 02Eh 02Fh
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
page m-1 n-31 n-30 n-29 ･･･ n-17 n-16
page *2 m n-15 n-14 n-13 ･･･ n-1
*1 n
Product
number Address
length
BR25H040-2C A8-A0
Figure 38. Write command
Figure 39. N Byte page write command
*1 n=511d=1FFh : BR25H040-2C
*2 m=31 : BR25H040-2C
Figure 40. EEPROM physical address for Page write command (16Byte)
16byte
This column addresses are
Top address of this page
n= up to 16bytes
High-Z
23
D0
0 0 0 0 A8 D2 D1D7
15 2216
D6
0 A0A1
1
1 2 4
0
CSB
SCK
SI
SO
0 3 7 85 6
A4
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
A5 A6 A7
～
～
～
～
High-Z
(8n+16)-1
24
D7
0 0 0 0 D1 D0D7
15 2316
D6
0
A
0
A
1
1
1 2 4
0
CSB
SCK
SI
SO
0 3 7 8 5 6
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
12
～
～
～
～
～
～
～
～
17 22 25
8n+16
D6 D7 D6 D0
～
～
～
～
～
～
CSB 立ち上げ有効区間
(8n+16)-2(8n+16)-7
(8n+16)-8
A
3
A
6
A
7
A
8
This
column
addresses
are
the last address of this page