LT1963A Series
1
1963afe
Typical applicaTion
DescripTion
1.5A, Low Noise,
Fast Transient Response
LDO Regulators
FeaTures
applicaTions
n Optimized for Fast Transient Response
n Output Current: 1.5A
n Dropout Voltage: 340mV
n Low Noise: 40µVRMS (10Hz to 100kHz)
n 1mA Quiescent Current
n No Protection Diodes Needed
n Controlled Quiescent Current in Dropout
n Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
n Adjustable Output from 1.21V to 20V
n <1µA Quiescent Current in Shutdown
n Stable with 10µF Output Capacitor*
n Stable with Ceramic Capacitors*
n Reverse Battery Protection
n No Reverse Current
n Thermal Limiting
n 5-Lead TO-220, DD, 3-Lead SOT-223 and
8-Lead SO Packages
The LT
®
1963A series are low dropout regulators optimized
for fast transient response. The devices are capable of
supplying 1.5A of output current with a dropout voltage of
340mV. Operating quiescent current is 1mA, dropping to
<1µA in shutdown. Quiescent current is well controlled; it
does not rise in dropout as it does with many other regula-
tors. In addition to fast transient response, the LT1963A
regulators have very low output noise which makes them
ideal for sensitive RF supply applications.
Output voltage range is from 1.21V to 20V. The LT1963A
regulators are stable with output capacitors as low as
10µF. Internal protection circuitry includes reverse bat-
tery protection, current limiting, thermal limiting and
reverse current protection. The devices are available in
fixed output voltages of 1.5V, 1.8V, 2.5V, 3.3V and as
an adjustable device with a 1.21V reference voltage. The
LT1963A regulators are available in 5-lead TO-220, DD,
3-lead SOT-223, 8-lead SO and 16-lead TSSOP packages.
3.3V to 2.5V Regulator
n 3.3V to 2.5V Logic Power Supplies
n Post Regulator for Switching Supplies
IN
SHDN
10µF*
*TANTALUM,
CERAMIC OR
ALUMINUM ELECTROLYTIC
1963A TA01
OUT
V
IN
> 3V
SENSE
GND
LT1963A-2.5
2.5V
1.5A
10µF*
++
OUTPUT CURRENT (A)
0
DROPOUT VOLTAGE (mV)
200
300
1.6
1963A TA02
100
00.4 0.8 1.2
0.2 0.6 1.0 1.4
400
150
250
50
350
Dropout Voltage
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners. Protected by U.S. Patents including 6118263, 6144250.
*See Applications Information Section.
LT1963A Series
2
1963afe
pin conFiguraTion
absoluTe MaxiMuM raTings
(Note 1)
IN Pin Voltage ........................................................ ±20V
OUT Pin Voltage ......................................................±20V
Input to Output Differential Voltage (Note 2) ........... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
SHDN Pin Voltage ................................................. ±20V
Output Short-Circuit Duration ........................ Indefinite
Operating Junction Temperature Range (Note 3)
LT1963AE ...........................................–40°C to 125°C
LT1963AI............................................–40°C to 125°C
LT1963AMP .......................................–55°C to 125°C
Storage Temperature Range ................... – 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
Q PACKAGE
5-LEAD PLASTIC DD
TAB IS
GND
FRONT VIEW
SENSE/ADJ*
OUT
GND
IN
SHDN
5
4
3
2
1
*PIN 5 = SENSE FOR LT1963A-1.5/LT1963A-1.8/
LT1963A-2.5/LT1963A-3.3
= ADJ FOR LT1963A
TJMAX = 150°C, θJA = 30°C/ W
T PACKAGE
5-LEAD PLASTIC TO-220
SENSE/
ADJ*
OUT
GND
IN
SHDN
FRONT VIEW
TAB IS
GND
5
4
3
2
1
*PIN 5 = SENSE FOR LT1963A-1.5/LT1963A-1.8/
LT1963A-2.5/LT1963A-3.3
= ADJ FOR LT1963A
TJMAX = 150°C, θJA = 50°C/ W
FE PACKAGE
16-LEAD PLASTIC TSSOP
EXPOSED PAD (PIN 17) IS GND. MUST BE
SOLDERED TO THE PCB.
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
GND
NC
OUT
OUT
OUT
SENSE/ADJ*
GND
GND
GND
NC
IN
IN
IN
NC
SHDN
GND
17
*PIN 6 = SENSE FOR LT1963A-1.5/LT1963A-1.8/
LT1963A-2.5/LT1963A-3.3
= ADJ FOR LT1963A
TJMAX = 150°C, θJA = 38°C/ W
3
2
1
FRONT VIEW
TAB IS
GND
OUT
GND
IN
ST PACKAGE
3-LEAD PLASTIC SOT-223
TJMAX = 150°C, θJA = 50°C/ W
1
2
3
4
8
7
6
5
TOP VIEW
IN
GND
GND
SHDN
OUT
SENSE/ADJ*
GND
NC
S8 PACKAGE
8-LEAD PLASTIC SO
*PIN 2 = SENSE FOR LT1963A-1.5/LT1963A-1.8/
LT1963A-2.5/LT1963A-3.3
= ADJ FOR LT1963A
TJMAX = 150°C, θJA = 70°C/ W
LT1963A Series
3
1963afe
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1963AEQ#PBF LT1963AEQ#TRPBF LT1963AEQ 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AIQ#PBF LT1963AIQ#TRPBF LT1963AIQ 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AMPQ#PBF LT1963AMPQ#TRPBF LT1963AMPQ 5-Lead Plastic DD-Pak –55°C to 125°C
LT1963AEQ-1.5#PBF LT1963AEQ-1.5#TRPBF LT1963AEQ-1.5 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AEQ-1.8#PBF LT1963AEQ-1.8#TRPBF LT1963AEQ-1.8 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AEQ-2.5#PBF LT1963AEQ-2.5#TRPBF LT1963AEQ-2.5 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AEQ-3.3#PBF LT1963AEQ-3.3#TRPBF LT1963AEQ-3.3 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AET#PBF LT1963AET#TRPBF LT1963AET 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AIT#PBF LT1963AIT#TRPBF LT1963AIT 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-1.5#PBF LT1963AET-1.5#TRPBF LT1963AET-1.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-1.8#PBF LT1963AET-1.8#TRPBF LT1963AET-1.8 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-2.5#PBF LT1963AET-2.5#TRPBF LT1963AET-2.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-3.3#PBF LT1963AET-3.3#TRPBF LT1963AET-3.3 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AEFE#PBF LT1963AEFE#TRPBF 1963AEFE 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AIFE#PBF LT1963AIFE#TRPBF 1963AIFE 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-1.5#PBF LT1963AEFE-1.5#TRPBF 1963AEFE15 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-1.8#PBF LT1963AEFE-1.8#TRPBF 1963AEFE18 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-2.5#PBF LT1963AEFE-2.5#TRPBF 1963AEFE25 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-3.3#PBF LT1963AEFE-3.3#TRPBF 1963AEFE33 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEST-1.5#PBF LT1963AEST-1.5#TRPBF 963A15 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-1.8#PBF LT1963AEST-1.8#TRPBF 963A18 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-2.5#PBF LT1963AEST-2.5#TRPBF 963A25 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-3.3#PBF LT1963AEST-3.3#TRPBF 963A33 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AES8#PBF LT1963AES8#TRPBF 1963A 8-Lead Plastic SO –40°C to 125°C
LT1963AIS8#PBF LT1963AIS8#TRPBF 1963A 8-Lead Plastic SO –40°C to 125°C
LT1963AMPS8#PBF LT1963AMPS8#TRPBF 963AMP 8-Lead Plastic SO –55°C to 125°C
LT1963AES8-1.5#PBF LT1963AES8-1.5#TRPBF 963A15 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-1.8#PBF LT1963AES8-1.8#TRPBF 963A18 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-2.5#PBF LT1963AES8-2.5#TRPBF 963A25 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-3.3#PBF LT1963AES8-3.3#TRPBF 963A33 8-Lead Plastic SO –40°C to 125°C
LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1963AEQ LT1963AEQ#TR LT1963AEQ 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AIQ LT1963AIQ#TR LT1963AIQ 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AMPQ LT1963AMPQ#TR LT1963AMPQ 5-Lead Plastic DD-Pak –55°C to 125°C
LT1963AEQ-1.5 LT1963AEQ-1.5#TR LT1963AEQ-1.5 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AEQ-1.8 LT1963AEQ-1.8#TR LT1963AEQ-1.8 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AEQ-2.5 LT1963AEQ-2.5#TR LT1963AEQ-2.5 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AEQ-3.3 LT1963AEQ-3.3#TR LT1963AEQ-3.3 5-Lead Plastic DD-Pak –40°C to 125°C
LT1963AET LT1963AET#TR LT1963AET 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AIT LT1963AIT#TR LT1963AIT 5-Lead Plastic TO-220 –40°C to 125°C
LT1963A Series
4
1963afe
orDer inForMaTion
LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1963AET-1.5 LT1963AET-1.5#TR LT1963AET-1.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-1.8 LT1963AET-1.8#TR LT1963AET-1.8 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-2.5 LT1963AET-2.5#TR LT1963AET-2.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-3.3 LT1963AET-3.3#TR LT1963AET-3.3 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AEFE LT1963AEFE#TR 1963AEFE 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AIFE LT1963AIFE#TR 1963AIFE 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-1.5 LT1963AEFE-1.5#TR 1963AEFE15 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-1.8 LT1963AEFE-1.8#TR 1963AEFE18 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-2.5 LT1963AEFE-2.5#TR 1963AEFE25 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-3.3 LT1963AEFE-3.3#TR 1963AEFE33 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEST-1.5 LT1963AEST-1.5#TR 963A15 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-1.8 LT1963AEST-1.8#TR 963A18 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-2.5 LT1963AEST-2.5#TR 963A25 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-3.3 LT1963AEST-3.3#TR 963A33 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AES8 LT1963AES8#TR 1963A 8-Lead Plastic SO –40°C to 125°C
LT1963AIS8 LT1963AIS8#TR 1963A 8-Lead Plastic SO –40°C to 125°C
LT1963AMPS8 LT1963AMPS8#TR 963AMP 8-Lead Plastic SO –55°C to 125°C
LT1963AES8-1.5 LT1963AES8-1.5#TR 963A15 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-1.8 LT1963AES8-1.8#TR 963A18 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-2.5 LT1963AES8-2.5#TR 963A25 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-3.3 LT1963AES8-3.3#TR 963A33 8-Lead Plastic SO –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LT1963A Series
5
1963afe
elecTrical characTerisTics
The l denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 3)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage (Notes 4,12) ILOAD = 0.5A
ILOAD = 1.5A
l
1.9
2.1
2.5
V
V
Regulated Output Voltage (Note 5) LT1963A-1.5 VIN = 2.21V, ILOAD = 1mA
2.5V < VIN < 20V, 1mA < ILOAD < 1.5A
l
1.477
1.447
1.500
1.500
1.523
1.545
V
V
LT1963A-1.8 VIN = 2.3V, ILOAD = 1mA
2.8V < VIN < 20V, 1mA < ILOAD < 1.5A
l
1.773
1.737
1.800
1.800
1.827
1.854
V
V
LT1963A-2.5 VIN = 3V, ILOAD = 1mA
3.5V < VIN < 20V, 1mA < ILOAD < 1.5A
l
2.462
2.412
2.500
2.500
2.538
2.575
V
V
LT1963A-3.3 VIN = 3.8V, ILOAD = 1mA
4.3V < VIN < 20V, 1mA < ILOAD < 1.5A
l
3.250
3.200
3.300
3.300
3.350
3.400
V
V
ADJ Pin Voltage (Notes 4, 5) LT1963A VIN = 2.21V, ILOAD = 1mA
2.5V < VIN < 20V, 1mA < ILOAD < 1.5A
l
1.192
1.174
1.210
1.210
1.228
1.246
V
V
Line Regulation LT1963A-1.5 ∆VIN = 2.21V to 20V, ILOAD = 1mA
LT1963A-1.8 ∆VIN = 2.3V to 20V, ILOAD = 1mA
LT1963A-2.5 ∆VIN = 3V to 20V, ILOAD = 1mA
LT1963A-3.3 ∆VIN = 3.8V to 20V, ILOAD = 1mA
LT1963A (Note 4) ∆VIN = 2.21V to 20V, ILOAD = 1mA
l
l
l
l
l
2.0
2.5
3.0
3.5
1.5
6
7
10
10
5
mV
mV
mV
mV
mV
Load Regulation LT1963A-1.5 VIN = 2.5V, ∆ILOAD = 1mA to 1.5A
VIN = 2.5V, ∆ILOAD = 1mA to 1.5A
●
2 9
18
mV
mV
LT1963A-1.8 VIN = 2.8V, ∆ILOAD = 1mA to 1.5A
VIN = 2.8V, ∆ILOAD = 1mA to 1.5A
●
2 10
20
mV
mV
LT1963A-2.5 VIN = 3.5V, ∆ILOAD = 1mA to 1.5A
VIN = 3.5V, ∆ILOAD = 1mA to 1.5A
●
2.5 15
30
mV
mV
LT1963A-3.3 VIN = 4.3V, ∆ILOAD = 1mA to 1.5A
VIN = 4.3V, ∆ILOAD = 1mA to 1.5A
●
3 20
35
mV
mV
LT1963A (Note 4) VIN = 2.5V, ∆ILOAD = 1mA to 1.5A
VIN = 2.5V, ∆ILOAD = 1mA to 1.5A
●
2 8
15
mV
mV
Dropout Voltage
VIN = VOUT(NOMINAL)
(Notes 6, 7, 12)
ILOAD = 1mA
ILOAD = 1mA
●
0.02 0.06
0.10
V
V
ILOAD = 100mA
ILOAD = 100mA
●
0.10 0.17
0.22
V
V
ILOAD = 500mA
ILOAD = 500mA
●
0.19 0.27
0.35
V
V
ILOAD = 1.5A
ILOAD = 1.5A
●
0.34 0.45
0.55
V
V
GND Pin Current
VIN = VOUT(NOMINAL) + 1V
(Notes 6, 8)
ILOAD = 0mA
ILOAD = 1mA
ILOAD = 100mA
ILOAD = 500mA
ILOAD = 1.5A
●
●
●
●
●
1.0
1.1
3.8
15
80
1.5
1.6
5.5
25
120
mA
mA
mA
mA
mA
Output Voltage Noise COUT = 10µF, ILOAD = 1.5A, BW = 10Hz to 100kHz 40 µVRMS
ADJ Pin Bias Current (Notes 4, 9) 3 10 µA
Shutdown Threshold VOUT = Off to On
VOUT = On to Off
●
●
0.25
0.90
0.75
2 V
V
SHDN Pin Current (Note 10) VSHDN = 0V
VSHDN = 20V
0.01
3
1
30
µA
µA
Quiescent Current in Shutdown VIN = 6V, VSHDN = 0V 0.01 1 µA
LT1963A Series
6
1963afe
elecTrical characTerisTics
The l denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 3)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Ripple Rejection VIN – VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P,
fRIPPLE = 120Hz, ILOAD = 0.75A
55 63 dB
Current Limit VIN = 7V, VOUT = 0V
VIN = VOUT(NOMINAL) + 1V, ∆VOUT = –0.1V
●
1.6
2 A
A
Input Reverse Leakage Current (Note 13) Q, T, S8 Packages VIN = –20V, VOUT = 0
ST Package VIN = –20V, VOUT = 0
●
●
1
2
mA
mA
Reverse Output Current (Note 11) LT1963A-1.5 VOUT = 1.5V, VIN < 1.5V
LT1963A-1.8 VOUT = 1.8V, VIN < 1.8V
LT1963A-2.5 VOUT = 2.5V, VIN < 2.5V
LT1963A-3.3 VOUT = 3.3V, VIN < 3.3V
LT1963A (Note 4) VOUT = 1.21V, VIN < 1.21V
600
600
600
600
300
1200
1200
1200
1200
600
µA
µA
µA
µA
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Absolute maximum input to output differential voltage can not
be achieved with all combinations of rated IN pin and OUT pin voltages.
With the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT can not exceed ±20V.
Note 3: The LT1963A regulators are tested and specified under pulse load
conditions such that TJ ≈ TA. The LT1963AE is 100% tested at TA = 25°C.
Performance at –40°C and 125°C is assured by design, characterization and
correlation with statistical process controls. The LT1963AI is guaranteed
over the full –40°C to 125°C operating junction temperature range. The
LT1963AMP is 100% tested and guaranteed over the –55°C to 125°C
operating junction temperature range.
Note 4: The LT1963A (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: To satisfy requirements for minimum input voltage, the LT1963A
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 4.12k resistors) for an output voltage of 2.4V.
The external resistor divider will add a 300µA DC load on the output.
Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: VIN – VDROPOUT.
Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 1V and a
current source load. The GND pin current will decrease at higher input
voltages.
Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 12: For the LT1963A, LT1963A-1.5 and LT1963A-1.8 dropout voltage
will be limited by the minimum input voltage specification under some
output voltage/load conditions.
Note 13: For the ST package, the input reverse leakage current increases
due to the additional reverse leakage current for the SHDN pin, which is
tied internally to the IN pin.
LT1963A Series
7
1963afe
Typical perForMance characTerisTics
OUTPUT CURRENT (A)
0
DROPOUT VOLTAGE (mV)
500
450
400
350
300
250
200
150
100
50
00.4 0.8 1.0
1963A G01
0.2 0.6 1.2 1.4 1.6
T
J
= 125°C
T
J
= 25°C
OUTPUT CURRENT (A)
GUARANTEED DROPOUT VOLTAGE (mV)
600
500
400
300
200
100
000.4 0.8 1.0
1963A G02
0.2 0.6 1.2 1.4 1.6
T
J
≤ 125°C
T
J
≤ 25°C
= TEST POINTS
TEMPERATURE (°C)
–50
DROPOUT VOLTAGE (mV)
500
450
400
350
300
250
200
150
100
50
0050 75
1963A G03
–25 25 100 125
I
L
= 100mA
I
L
= 1mA
I
L
= 0.5A
I
L
= 1.5A
Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage
TEMPERATURE (°C)
–50
1.4
1.2
1.0
0.8
0.6
0.4
0.2
025 75
1963A G04
–25 0 50 100 125
QUIESCENT CURRENT (mA)
LT1963A-1.5/1.8/-2.5/-3.3
LT1963A
V
IN
= 6V
R
L
= ∞, I
L
= 0
V
SHDN
= V
IN
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
100
1963A G05
0 50
1.84
1.83
1.82
1.81
1.80
1.79
1.78
1.77
1.76 –25 25 75 125
I
L
= 1mA
Quiescent Current LT1963A-1.8 Output Voltage
LT1963A-1.5 Output Voltage
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
100
1963A G07
0 50
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22 –25 25 75 125
I
L
= 1mA
TEMPERATURE (°C)
–50
ADJ PIN VOLTAGE (V)
100
1963A G08
0 50
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190 –25 25 75 125
I
L
= 1mA
LT1963A-3.3 Output Voltage LT1963A ADJ Pin Voltage
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
100
1963A G06
0 50
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42 –25 25 75 125
I
L
= 1mA
LT1963A-2.5 Output Voltage
LT1963A Series
8
1963afe
LT1963A-1.8 GND Pin Current LT1963A-2.5 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
25
20
15
10
5
04
1963A G15
1231098765
R
L
= 330, I
L
= 100mA*
R
L
= 33, I
L
= 100mA*
R
L
= 11, I
L
= 300mA*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 3.3V
LT1963A-3.3 GND Pin Current
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
14
12
10
8
6
4
2
0
1963A G09
25 6 7 8 9 10
13 4
TJ = 25°C
RL = ∞
VSHDN = VIN
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
14
12
10
8
6
4
2
0
1963A G10
2105 6 7 8 9
13 4
TJ = 25°C
RL = ∞
VSHDN = VIN
LT1963A-1.8 Quiescent Current LT1963A-2.5 Quiescent Current
LT1963A-1.5 Quiescent Current
INPUT VOLTAGE (V)
0
0
QUIESCENT CURRENT (mA)
2
6
8
10
14
157
1963A G41
4
12
4910
236 8
T
J
= 25°C
R
L
= ∞
V
SHDN
= V
IN
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
14
12
10
8
6
4
2
0
1963A G11
2105 6 7 8 9
13 4
TJ = 25°C
RL = ∞
VSHDN = VIN
LT1963A-3.3 Quiescent Current
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1963A G12
42010 12 14 16 18
26 8
T
J
= 25°C
R
L
= 4.3k
V
SHDN
= V
IN
LT1963A Quiescent Current LT1963A-1.5 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
15
20
25
8
1963A G42
10
5
0123456 7 9 10
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.5V
R
L
= 5, I
L
= 300mA*
R
L
= 15, I
L
= 100mA*
R
L
= 150, I
L
= 10mA*
Typical perForMance characTerisTics
LT1963A Series
9
1963afe
Typical perForMance characTerisTics
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
10
8
6
4
2
04
1963A G16
1231098765
R
L
= 121, I
L
= 10mA*
R
L
= 12.1, I
L
= 100mA*
R
L
= 4.33, I
L
= 300mA*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.21V
LT1963A GND Pin Current
INPUT VOLTAGE (V)
100
90
80
70
60
50
40
30
20
10
0
GND PIN CURRENT (mA)
1963A G17
0123456 7 8 9 10
R
L
= 1.8, I
L
= 1A*
R
L
= 1.2, I
L
= 1.5A*
R
L
= 3.6, I
L
= 500mA*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.8V
LT1963A-1.8 GND Pin CurrentLT1963A-1.5 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
60
80
100
8
1963A G43
40
20
50
70
90
30
10
021 43 6 7 9
510
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.5V
R
L
= 1, I
L
= 1.5A*
R
L
= 1.5, I
L
= 1A*
R
L
= 3, I
L
= 500mA*
INPUT VOLTAGE (V)
100
90
80
70
60
50
40
30
20
10
0
GND PIN CURRENT (mA)
1963A G18
0123456 7 8 9 10
R
L
= 2.5, I
L
= 1A*
R
L
= 1.67, I
L
= 1.5A*
R
L
= 5, I
L
= 500mA*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 2.5V
INPUT VOLTAGE (V)
100
90
80
70
60
50
40
30
20
10
0
GND PIN CURRENT (mA)
1963A G19
0123456 7 8 9 10
R
L
= 3.3, I
L
= 1A*
R
L
= 2.2, I
L
= 1.5A*
R
L
= 6.6, I
L
= 500mA*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 3.3V
INPUT VOLTAGE (V)
100
90
80
70
60
50
40
30
20
10
0
GND PIN CURRENT (mA)
1963A G20
0123456 7 8 9 10
R
L
= 1.21, I
L
= 1A*
R
L
= 0.81, I
L
= 1.5A*
R
L
= 2.42, I
L
= 500mA*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.21V
LT1963A-2.5 GND Pin Current LT1963A-3.3 GND Pin Current LT1963A GND Pin Current
OUTPUT CURRENT (A)
100
90
80
70
60
50
40
30
20
10
0
GND PIN CURRENT (mA)
1963A G21
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
V
IN
=
V
OUT (NOMINAL)
+1V
TEMPERATURE (°C)
–50
SHDN PIN THRESHOLD (V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0050 75
1963A G23
–25 25 100 125
I
L
= 1mA
I
L
= 1.5A
TEMPERATURE (°C)
–50
SHDN PIN THRESHOLD (V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0050 75
1963A G22
–25 25 100 125
I
L
= 1mA
GND Pin Current vs ILOAD SHDN Pin Threshold (On-to-Off) SHDN Pin Threshold (Off-to-On)
LT1963A Series
10
1963afe
Typical perForMance characTerisTics
TEMPERATURE (°C)
–50
7
6
5
4
3
2
1
025 75
1963A G25
–25 0 50 100 125
SHDN PIN INPUT CURRENT (µA)
V
SHDN
= 20V
TEMPERATURE (°C)
–50
ADJ PIN BIAS CURRENT (µA)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0050 75
1963A G26
–25 25 100 125
ADJ Pin Bias Current
SHDN PIN VOLTAGE (V)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
SHDN PIN INPUT CURRENT (µA)
1963A G24
0246810 12 14 16 18 20
INPUT/OUTPUT DIFFERENTIAL (V)
0 2 6 10 14 18
CURRENT LIMIT (A)
3.0
2.5
2.0
1.5
1.0
0.5
04 8 12 16
1963A G27
20
TJ = 125°C
TJ = 25°C
TJ = –50°C
ΔVOUT = 100mV
Current Limit Current Limit
TEMPERATURE (°C)
–50
CURRENT LIMIT (A)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0050 75
1963A G28
–25 25 100 125
VIN = 7V
VOUT = 0V
OUTPUT VOLTAGE (V)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
REVERSE OUTPUT CURRENT (mA)
1963A G29
0123456 7 8 9 10
LT1963A
LT1963A-1.5
LT1963A-3.3 T
J
= 25°C
V
IN
= 0V
CURRENT FLOWS INTO
OUTPUT PIN
V
OUT
= V
ADJ
(LT1963A)
V
OUT
= V
FB
(LT1963A-1.5/1.8/-2.5/-3.3)
LT1963A-2.5
LT1963A-1.8
TEMPERATURE (°C)
–50
REVERSE OUTPUT CURRENT (mA)
050 75
1963A G30
–25 25 100 125
LT1963A-1.8/-2.5/-3.3
LT1963A
V
IN
= 0V
V
OUT
= 1.21V (LT1963A)
V
OUT
= 1.5V (LT1963A-1.5)
V
OUT
= 1.8V (LT1963A-1.8)
V
OUT
= 2.5V (LT1963A-2.5)
V
OUT
= 3.3V (LT1963A-3.3)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Reverse Output Current Reverse Output Current
SHDN Pin Input Current
SHDN Pin Input Current
LT1963A Series
11
1963afe
Typical perForMance characTerisTics
FREQUENCY (Hz)
RIPPLE REJECTION (dB)
80
70
60
50
40
30
20
10
010 1k 10k 1M
1963A G31
100 100k
COUT = 10µF TANTALUM
COUT = 100µF TANTALUM
+10 × 1µF CERAMIC
IL = 0.75A
VIN = VOUT(NOMINAL) +1V + 50mVRMS RIPPLE
TEMPERATURE (°C)
–50
76
74
72
70
68
66
64
62 25 75
1963A G32
–25 0 50 100 125
RIPPLE REJECTION (dB)
I
L
= 0.75A
V
IN
= V
OUT(NOMINAL)
+1V + 0.5V
P-P
RIPPLE AT f = 120Hz
Ripple Rejection Ripple Rejection
TEMPERATURE (°C)
–50
MINIMUM INPUT VOLTAGE (V)
3.0
2.5
2.0
1.5
1.0
0.5
025 75
1963A G33
–25 0 50 100 125
I
L
= 1.5A I
L
= 500mA
I
L
= 100mA
LT1963A Minimum Input Voltage
TEMPERATURE (°C)
–50
LOAD REGULATION (mV)
10
5
0
–5
–10
–15
–20 25 75
1963A G34
–25 0 50 100 125
LT1963A
LT1963A-3.3
LT1963A-1.8
LT1963A-2.5
LT1963A-1.5
V
IN
= V
OUT(NOMINAL)
+1V
(LT1963A-1.8/-2.5/-3.3)
V
IN
= 2.7V (LT1963A/LT1963A-1.5)
ΔI
L
= 1mA TO 1.5A
FREQUENCY (Hz)
0.01
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
0.1
10 100 1k 10k 100k
1.0
1963A G35
C
OUT
= 10µF
I
L
=1.5A
LT1963A-3.3 LT1963A-2.5
LT1963A-1.8 LT1963A
LT1963A-1.5
Load Regulation Output Noise Spectral Density
LOAD CURRENT (A)
OUTPUT NOISE VOLTAGE (µVRMS)
50
45
40
35
30
25
20
15
10
5
0
0.0001 0.01 0.1 10
1963A G36
0.001 1
COUT = 10µF
LT1963A-3.3
LT1963A-2.5
LT1963A-1.8
LT1963A-1.5
LT1963A
V
OUT
100µV/DIV
1ms/DIV
C
OUT
= 10µF
I
LOAD
= 1.5A
1963A G37
RMS Output Noise vs Load
Current (10Hz to 100kHz) LT1963A-3.3 10Hz to 100kHz Output Noise
LT1963A Series
12
1963afe
Typical perForMance characTerisTics
TIME (µs)
200
150
100
50
0
–50
–100
0.6
0.4
0.2
0
OUTPUT VOLTAGE
DEVIATION (mV)
1963A G38
0246810 12 14 16 18 20
V
IN
= 4.3V
C
IN
= 3.3µF TANTALUM
C
OUT
= 10µF TANTALUM
LOAD
CURRENT (A)
TIME (µs)
150
100
50
0
–50
–100
–150
1.5
1.0
0.5
0
OUTPUT VOLTAGE
DEVIATION (mV)
LOAD
CURRENT (A)
1963A G39
0 50 100 150 250 300 350 400 450 500200
V
IN
= 4.3V
C
IN
= 33µF TANTALUM
C
OUT
= 100µF TANTALUM
+10 × 1µF CERAMIC
LT1963A-3.3 Transient Response LT1963A-3.3 Transient Response
LT1963A Series
13
1963afe
pin FuncTions
be off when the SHDN pin is pulled low. The SHDN pin can
be driven either by 5V logic or open-collector logic with a
pull-up resistor. The pull-up resistor is required to supply
the pull-up current of the open-collector gate, normally
several microamperes, and the SHDN pin current, typically
3µA. If unused, the SHDN pin must be connected to VIN.
The device will be in the low power shutdown state if the
SHDN pin is not connected.
IN: Input. Power is supplied to the device through the IN
pin. A bypass capacitor is required on this pin if the device
is more than six inches away from the main input filter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor in
the range of 1µF to 10µF is sufficient. The LT1963A regula-
tors are designed to withstand reverse voltages on the IN
pin with respect to ground and the OUT pin. In the case of
a reverse input, which can happen if a battery is plugged
in backwards, the device will act as if there is a diode in
series with its input. There will be no reverse current flow
into the regulator and no reverse voltage will appear at
the load. The device will protect both itself and the load.
OUT: Output. The output supplies power to the load.
A minimum output capacitor of 10µF is required to
prevent oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
SENSE: Sense. For fixed voltage versions of the LT1963A
(LT1963A-1.5/LT1963A-1.8/LT1963A-2.5/LT1963A-3.3),
the SENSE pin is the input to the error amplifier. Optimum
regulation will be obtained at the point where the SENSE
pin is connected to the OUT pin of the regulator. In criti-
cal applications, small voltage drops are caused by the
resistance (RP) of PC traces between the regulator and the
load. These may be eliminated by connecting the SENSE
pin to the output at the load as shown in Figure 1 (Kelvin
Sense Connection). Note that the voltage drop across
the external PC traces will add to the dropout voltage of
the regulator. The SENSE pin bias current is 600µA at
the nominal rated output voltage. The SENSE pin can be
pulled below ground (as in a dual supply system where
the regulator load is returned to a negative supply) and
still allow the device to start and operate.
ADJ: Adjust. For the adjustable LT1963A, this is the input
to the error amplifier. This pin is internally clamped to ±7V.
It has a bias current of 3µA which flows into the pin. The
ADJ pin voltage is 1.21V referenced to ground and the
output voltage range is 1.21V to 20V.
SHDN: Shutdown. The SHDN pin is used to put the LT1963A
regulators into a low power shutdown state. The output will Figure 1. Kelvin Sense Connection
IN
SHDN
1963A F01
RP
OUT
VIN
SENSE
GND
LT1963A
RP
+
+LOAD
LT1963A Series
14
1963afe
The LT1963A series are 1.5A low dropout regulators opti-
mized for fast transient response. The devices are capable
of supplying 1.5A at a dropout voltage of 350mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1963A regulators incorporate several protection features
which make them ideal for use in battery-powered systems.
The devices are protected against both reverse input and
reverse output voltages. In battery backup applications
where the output can be held up by a backup battery when
the input is pulled to ground, the LT1963A-X acts like it
has a diode in series with its output and prevents reverse
current flow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.
Adjustable Operation
The adjustable version of the LT1963A has an output volt-
age range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2.
The device servos the output to maintain the voltage at
the ADJ pin at 1.21V referenced to ground. The current
in R1 is then equal to 1.21V/R1 and the current in R2 is
the current in R1 plus the ADJ pin bias current. The ADJ
pin bias current, 3µA at 25°C, flows through R2 into the
ADJ pin. The output voltage can be calculated using the
formula in Figure 2. The value of R1 should be less than
4.17k to minimize errors in the output voltage caused by
the ADJ pin bias current. Note that in shutdown the output
is turned off and the divider current will be zero.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage
to 1.21V: VOUT/1.21V. For example, load regulation for an
output current change of 1mA to 1.5A is –3mV typical at
VOUT = 1.21V. At VOUT = 5V, load regulation is:
(5V/1.21V)(–3mV) = –12.4mV
Output Capacitors and Stability
The LT1963A regulator is a feedback circuit. Like any
feedback circuit, frequency compensation is needed to
make it stable. For the LT1963A, the frequency compensa-
tion is both internal and external—the output capacitor.
The size of the output capacitor, the type of the output
capacitor, and the ESR of the particular output capacitor
all affect the stability.
In addition to stability, the output capacitor also affects
the high frequency transient response. The regulator
loop has a finite band width. For high frequency transient
loads, recovery from a transient is a combination of the
output capacitor and the bandwidth of the regulator. The
LT1963A was designed to be easy to use and accept a
wide variety of output capacitors. However, the frequency
compensation is affected by the output capacitor and opti-
mum frequency stability may require some ESR, especially
with ceramic capacitors.
For ease of use, low ESR polytantalum capacitors (POSCAP)
are a good choice for both the transient response and
stability of the regulator. These capacitors have intrinsic
ESR that improves the stability. Ceramic capacitors have
extremely low ESR, and while they are a good choice in
many cases, placing a small series resistance element
will sometimes achieve optimum stability and minimize
ringing. In all cases, a minimum of 10µF is required while
the maximum ESR allowable is 3Ω.
The place where ESR is most helpful with ceramics is
low output voltage. At low output voltages, below 2.5V,
some ESR helps the stability when ceramic output capaci-
tors are used. Also, some ESR allows a smaller capaci-
tor value to be used. When small signal ringing occurs
with ceramics due to insufficient ESR, adding ESR or
increas-ing the capacitor value improves the stability and
reduces the ringing. Table 1 gives some recommended
values of ESR to minimize ringing caused by fast, hard
current transitions.
IN
1963A F02
R2
OUT
VIN
VOUT
ADJ
GND
LT1963A
R1
+
Figure 2. Adjustable Operation
VOUT =1.21V 1+R2
R1
+IADJ
( )
R2
( )
VADJ =1.21V
IADJ =3µA AT 25°C
OUTPUT RANGE = 1.21V TO 20V
applicaTions inForMaTion
LT1963A Series
15
1963afe
POSCAP capacitors are used. The output voltage is at the
worst case value of 1.2V. Trace A, is with a 10µF ceramic
output capacitor and shows significant ringing with a peak
amplitude of 25mV. For Trace B, a 22µF/45mΩ POSCAP
is added in parallel with the 10µF ceramic. The output is
well damped and settles to within 10mV in less than 20µs.
For Trace C, a 100µF/35mΩ POSCAP is connected in
parallel with the 10µF ceramic capacitor. In this case the
peak output deviation is less than 20mV and the output
settles in about 10µs. For improved transient response
the value of the bulk capacitor (tantalum or aluminum
electrolytic) should be greater than twice the value of the
ceramic capacitor.
Tantalum and Polytantalum Capacitors
There is a variety of tantalum capacitor types available,
with a wide range of ESR specifications. Older types have
ESR specifications in the hundreds of mΩ to several Ohms.
Some newer types of polytantalum with multi-electrodes
have maximum ESR specifications as low as 5mΩ. In gen-
eral the lower the ESR specification, the larger the size and
the higher the price. Polytantalum capacitors have better
surge capability than older types and generally lower ESR.
Some types such as the Sanyo TPE and TPB series have
ESR specifications in the 20mΩ to 50mΩ range, which
provide near optimum transient response.
Aluminum Electrolytic Capacitors
Aluminum electrolytic capacitors can also be used with the
LT1963A. These capacitors can also be used in conjunction
with ceramic capacitors. These tend to be the cheapest
and lowest performance type of capacitors. Care must be
used in selecting these capacitors as some types can have
ESR which can easily exceed the 3Ω maximum value.
Ceramic Capacitors
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior over
temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Table 1. Capacitor Minimum ESR
VOUT 10µF 22µF 47µF 100µF
1.2V 20mΩ 15mΩ 10mΩ 5mΩ
1.5V 20mΩ 15mΩ 10mΩ 5mΩ
1.8V 15mΩ 10mΩ 10mΩ 5mΩ
2.5V 5mΩ 5mΩ 5mΩ 5mΩ
3.3V 0mΩ 0mΩ 0mΩ 5mΩ
≥5V 0mΩ 0mΩ 0mΩ 0mΩ
Figures 3 through 8 show the effect of ESR on the transient
response of the regulator. These scope photos show the
transient response for the LT1963A at three different output
voltages with various capacitors and various values of ESR.
The output load conditions are the same for all traces. In
all cases there is a DC load of 500mA. The load steps up
to 1A at the first transition and steps back to 500mA at
the second transition.
At the worst case point of 1.2VOUT with 10µF COUT
(Figure 3), a minimum amount of ESR is required. While
20mΩ is enough to eliminate most of the ringing, a value
closer to 50mΩ provides a more optimum response. At
2.5V output with 10µF COUT (Figure 4) the output rings
at the transitions with 0Ω ESR but still settles to within
10mV in 20µs after the 0.5A load step. Once again a small
value of ESR will provide a more optimum response.
At 5VOUT with 10µF COUT (Figure 5) the response is well
damped with 0Ω ESR.
With a COUT of 100µF at 0Ω ESR and an output of 1.2V
(Figure 6), the output rings although the amplitude is
only 20mVp-p. With COUT of 100µF it takes only 5mΩ to
20mΩ of ESR to provide good damping at 1.2V output.
Performance at 2.5V and 5V output with 100µF COUT shows
similar characteristics to the 10µF case (see Figures 7-8).
At 2.5VOUT 5mΩ to 20mΩ can improve transient response.
At 5VOUT the response is well damped with 0Ω ESR.
Capacitor types with inherently higher ESR can be combined
with 0mΩ ESR ceramic capacitors to achieve both good
high frequency bypassing and fast settling time. Figure
9 illustrates the improvement in transient response that
can be seen when a parallel combination of ceramic and
applicaTions inForMaTion
LT1963A Series
16
1963afe
VOUT = 1.2V
IOUT = 500mA WITH
500mA PULSE
COUT = 10µF
0
20
50
100
RESR (mΩ)
Figure 3
VOUT = 1.2V
IOUT = 500mA WITH 500mA PULSE
COUT =
A = 10µF CERAMIC
B = 10µF CERAMIC II 22µF/45mΩ POLY
C = 10µF CERAMIC II 100µF/35mΩ POLY
Figure 9
RESR (mΩ)
A
B
C
1963A F09
1963A F03
20µs/DIV
50mV/DIV
50µs/DIV
50mV/DIV
VOUT = 1.2V
IOUT = 500mA WITH
500mA PULSE
COUT = 100µF
VOUT = 2.5V
IOUT = 500mA WITH
500mA PULSE
COUT = 10µF
VOUT = 5V
IOUT = 500mA WITH
500mA PULSE
COUT = 10µF
VOUT = 5V
IOUT = 500mA WITH
500mA PULSE
COUT = 100µF
Figure 8
RESR (mΩ)
0
5
10
20
1963A F08
50µs/DIV
50mV/DIV
Figure 5
0
20
50
100
RESR (mΩ)
1963A F05
20µs/DIV
50mV/DIV
Figure 4
RESR (mΩ)
1963A F04
0
20
50
100
20µs/DIV
50mV/DIV
Figure 6
RESR (mΩ)
0
5
10
20
1963A F06
50µs/DIV
50mV/DIV
VOUT = 2.5V
IOUT = 500mA WITH
500mA PULSE
COUT = 100µF
Figure 7
RESR (mΩ)
0
5
10
20
1963A F07
50µs/DIV
50mV/DIV
applicaTions inForMaTion
LT1963A Series
17
1963afe
Y5V dielectrics are good for providing high capacitances in
a small package, but exhibit strong voltage and temperature
coefficients as shown in Figures 10 and 11. When used
with a 5V regulator, a 10µF Y5V capacitor can exhibit an
effective value as low as 1µF to 2µF over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
“FREE” Resistance with PC Traces
The resistance values shown in Table 2 can easily be made
using a small section of PC trace in series with the output
capacitor. The wide range of non-critical ESR makes it
easy to use PC trace. The trace width should be sized to
handle the RMS ripple current associated with the load.
The output capacitor only sources or sinks current for a few
microseconds during fast output current transitions. There
is no DC current in the output capacitor. Worst case ripple
current will occur if the output load is a high frequency
(>100kHz) square wave with a high peak value and fast
edges (< 1µs). Measured RMS value for this case is 0.5
times the peak-to-peak current change. Slower edges or
lower frequency will significantly reduce the RMS ripple
current in the capacitor.
Figure 10. Ceramic Capacitor DC Bias Characteristics
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
1963A F10
20
0
–20
–40
–60
–80
–100 04810
2 6 12 14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
Figure 11. Ceramic Capacitor Temperature Characteristics
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100 25 75
1963A F11
–25 0 50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
applicaTions inForMaTion
Table 2. PC Trace Resistors
10mΩ20mΩ30mΩ
0.5oz CUWidth
Length
0.011" (0.28mm)
0.102" (2.6mm)
0.011" (0.28mm)
0.204" (5.2mm)
0.011" (0.28mm)
0.307" (7.8mm)
1.0oz CUWidth
Length
0.006" (0.15mm)
0.110" (2.8mm)
0.006" (0.15mm)
0.220" (5.6mm)
0.006" (0.15mm)
0.330" (8.4mm)
2.0oz CUWidth
Length
0.006" (0.15mm)
0.224" (5.7mm)
0.006" (0.15mm)
0.450" (11.4mm)
0.006" (0.15mm)
0.670" (17mm)
LT1963A Series
18
1963afe
applicaTions inForMaTion
typically 40nV/√Hz over this frequency bandwidth for
the LT1963A (adjustable version). For higher output
voltages (generated by using a resistor divider), the
output voltage noise will be gained up accordingly. This
results in RMS noise over the 10Hz to 100kHz bandwidth
of 14µVRMS for the LT1963A increasing to 38µVRMS for
the LT1963A-3.3.
Higher values of output voltage noise may be measured
when care is not exercised with regard to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1963A-X.
Power supply ripple rejection must also be considered; the
LT1963A regulators do not have unlimited power supply
rejection and will pass a small portion of the input noise
through to the output.
Thermal Considerations
The power handling capability of the device is limited by the
maximum rated junction temperature (125°C). The power
dissipated by the device is made up of two components:
1. Output current multiplied by the input/output voltage
differential: (IOUT)(VIN – VOUT), and
2. GND pin current multiplied by the input voltage: (IGND)
(VIN).
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteristics.
Power dissipation will be equal to the sum of the two
components listed above.
The LT1963A series regulators have internal thermal
limiting designed to protect the device during overload
conditions. For continuous normal conditions, the maxi-
mum junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambi-
ent. Additional heat sources mounted nearby must also
be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
This resistor should be made using one of the inner
layers of the PC board which are well defined. The resistiv-
ity is determined primarily by the sheet resistance of the
copper laminate with no additional plating steps. Table
2 gives some sizes for 0.75A RMS current for various
copper thicknesses. More detailed information regarding
resistors made from PC traces can be found in Application
Note 69, Appendix A.
Overload Recovery
Like many IC power regulators, the LT1963A-X has safe op-
erating area protection. The safe area protection decreases
the current limit as input-to-output voltage increases and
keeps the power transistor inside a safe operating region
for all values of input-to-output voltage. The protection
is designed to provide some output current at all values
of input-to-output voltage up to the device breakdown.
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential
is small, allowing the regulator to supply large output
currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1963A-X.
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Common
situations are immediately after the removal of a short-
circuit or when the shutdown pin is pulled high after the
input voltage has already been turned on. The load line for
such a load may intersect the output current curve at two
points. If this happens, there are two stable output operat-
ing points for the regulator. With this double intersection,
the input power supply may need to be cycled down to
zero and brought up again to make the output recover.
Output Voltage Noise
The LT1963A regulators have been designed to provide
low output voltage noise over the 10Hz to 100kHz band-
width while operating at full load. Output voltage noise is
LT1963A Series
19
1963afe
applicaTions inForMaTion
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.
Table 3. Q Package, 5-Lead DD
COPPER AREA THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm22500mm22500mm223°C/W
1000mm22500mm22500mm225°C/W
125mm22500mm22500mm233°C/W
*Device is mounted on topside
Table 4. S0-8 Package, 8-Lead SO
COPPER AREA THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm22500mm22500mm255°C/W
1000mm22500mm22500mm255°C/W
225mm22500mm22500mm263°C/W
125mm22500mm22500mm269°C/W
*Device is mounted on topside
Table 5. SOT-223 Package, 3-Lead SOT-223
COPPER AREA THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm22500mm22500mm242°C/W
1000mm22500mm22500mm242°C/W
225mm22500mm22500mm250°C/W
100mm22500mm22500mm256°C/W
1000mm21000mm21000mm249°C/W
1000mm20mm21000mm252°C/W
*Device is mounted on topside
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 4°C/W
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input volt-
age range of 4V to 6V, an output current range of 0mA
to 500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX))
where,
IOUT(MAX) = 500mA
VIN(MAX) = 6V
IGND at (IOUT = 500mA, VIN = 6V) = 10mA
So,
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
1.41W(28°C/W) = 39.5°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
TJMAX = 50°C + 39.5°C = 89.5°C
Protection Features
The LT1963A regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages
of 20V. Current flow into the device will be limited to less
than 1mA (typically less than 100µA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries that can be plugged in backward.
LT1963A Series
20
1963afe
applicaTions inForMaTion
The output of the LT1963A can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp volt-
age if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the
1.21V reference when the output is forced to 20V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 13V difference between OUT and ADJ
pins divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 2.6k. Figure 12. Reverse Output Current
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (mA)
3.0
4.0
5.0
8
1963A F12
2.0
1.0
2.5
3.5
4.5
1.5
0.5
02
13469
7
510
LT1963A
V
OUT
= V
ADJ
T
J
= 25°C
V
IN
= 0V
CURRENT FLOWS
INTO OUTPUT PIN
LT1963A-2.5
V
OUT
= V
FB
LT1963A-3.3
V
OUT
= V
FB
LT1963A-1.8
V
OUT
= V
FB
LT1963A-1.5
V
OUT
= V
FB
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 12.
When the IN pin of the LT1963A is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input cur-
rent will typically drop to less than 2µA. This can happen
if the input of the device is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit. The state
of the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
LT1963A Series
21
1963afe
Typical applicaTions
10VAC AT
115VIN
10VAC AT
115VIN
–
+
–
+
–
+
750Ω
+V
+V
+V
+V
+V
1/2
LT1018
1/2
LT1018
LT1006
10k
10k 10k
200k
0.1µF
22µF
1µF
0.033µF
1N4148
1N4148
LT1004
1.2V
750Ω
A1
C1A
C1B
34k*
12.1k*
3.3VOUT
1.5A
L1
500µH
10000µF
TO ALL “+V”
POINTS
22µF
1N4002
1N4002 1N4002
1N4148
“SYNC”
1k
L2
90-140
VAC
1963A TA03
LT1963A-3.3
IN
SHDN
OUT
FB
GND
2.4k
+
+
+
L1 = COILTRONICS CTX500-2-52
L2 = STANCOR P-8559
* = 1% FILM RESISTOR
= NTE5437
SCR Pre-Regulator Provides Efficiency Over Line Variations
LT1963A-3.3
GND
LT1963A
IN
SHDN
OUT
FB
IN
SHDN
OUT
FB
GND
+
+
R1, 0.01Ω
R2
0.01Ω
R3
2.2k
R4
2.2k
R5
1k
R6
6.65k
R7
4.12k
C1
100µF
C3
0.01µF
C2
22µF
V
IN
> 3.7V
SHDN
3.3V
3A
8
4
3
2
1
–
+
1/2
LT1366
1963A TA05
Paralleling of Regulators for Higher Output Current
LT1963A Series
22
1963afe
pacKage DescripTion
Q(DD5) 0610 REV E
.028 – .038
(0.711 – 0.965)
TYP
.143 +.012
–.020
( )
3.632+0.305
–0.508
.067
(1.702)
BSC
.013 – .023
(0.330 – 0.584)
.095 – .115
(2.413 – 2.921)
.004 +.008
–.004
( )
0.102+0.203
–0.102
.050 ± .012
(1.270 ± 0.305)
.059
(1.499)
TYP
.045 – .055
(1.143 – 1.397)
.165 – .180
(4.191 – 4.572)
.330 – .370
(8.382 – 9.398)
.060
(1.524)
TYP
.390 – .415
(9.906 – 10.541)
15° TYP
.420
.350
.585
.090
.042
.067
RECOMMENDED SOLDER PAD LAYOUT
.325
.205
.080
.585
.090
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
.042
.067
.420
.276
.320
NOTE:
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
.300
(7.620)
.075
(1.905)
.183
(4.648)
.060
(1.524)
.060
(1.524)
.256
(6.502)
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461 Rev E)
Q Package
5-Lead Plastic DD-Pak
(Reference LTC DWG # 05-08-1461 Rev E)
LT1963A Series
23
1963afe
pacKage DescripTion
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
LT1963A Series
24
1963afe
pacKage DescripTion
ST Package
3-Lead Plastic SOT-223
(Reference LTC DWG # 05-08-1630)
.114 – .124
(2.90 – 3.15)
.248 – .264
(6.30 – 6.71)
.130 – .146
(3.30 – 3.71)
.264 – .287
(6.70 – 7.30)
.0905
(2.30)
BSC
.033 – .041
(0.84 – 1.04)
.181
(4.60)
BSC
.024 – .033
(0.60 – 0.84)
.071
(1.80)
MAX
10°
MAX
.012
(0.31)
MIN
.0008 – .0040
(0.0203 – 0.1016)
10° – 16°
.010 – .014
(0.25 – 0.36)
10° – 16°
RECOMMENDED SOLDER PAD LAYOUT
ST3 (SOT-233) 0502
.129 MAX
.059 MAX
.059 MAX
.181 MAX
.039 MAX
.248 BSC
.090
BSC
LT1963A Series
25
1963afe
pacKage DescripTion
T Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
T5 (TO-220) 0801
.028 – .038
(0.711 – 0.965)
.067
(1.70) .135 – .165
(3.429 – 4.191)
.700 – .728
(17.78 – 18.491)
.045 – .055
(1.143 – 1.397)
.095 – .115
(2.413 – 2.921)
.013 – .023
(0.330 – 0.584)
.620
(15.75)
TYP
.155 – .195*
(3.937 – 4.953)
.152 – .202
(3.861 – 5.131)
.260 – .320
(6.60 – 8.13)
.165 – .180
(4.191 – 4.572)
.147 – .155
(3.734 – 3.937)
DIA
.390 – .415
(9.906 – 10.541)
.330 – .370
(8.382 – 9.398)
.460 – .500
(11.684 – 12.700)
.570 – .620
(14.478 – 15.748)
.230 – .270
(5.842 – 6.858)
BSC
SEATING PLANE
* MEASURED AT THE SEATING PLANE
LT1963A Series
26
1963afe
pacKage DescripTion
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev H)
Exposed Pad Variation BB
FE16 (BB) TSSOP REV G 0910
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
1 3 4 5678
10 9
4.90 – 5.10*
(.193 – .201)
16 1514 13 12 11
1.10
(.0433)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC
2.94
(.116)
0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
2.94
(.116)
3.58
(.141)
3.58
(.141)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev H)
Exposed Pad Variation BB
LT1963A Series
27
1963afe
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
E 02/11 Updated FE and Q package drawings in Package Description section 22, 26
(Revision history begins at Rev E)
LT1963A Series
28
1963afe
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 2005
LT 0211 REV E • PRINTED IN USA
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT1175 500mA, Micropower, Negative LDO VIN: –20V to –4.3V, VOUT(MIN) = –3.8V, VDO = 0.50V, IQ = 45µA, ISD 10µA,
DD, SOT-223, PDIP8 Packages
LT1185 3A, Negative LDO VIN: –35V to –4.2V, VOUT(MIN) = –2.40V, VDO = 0.80V, IQ = 2.5mA, ISD <1µA,
TO220-5 Package
LT1761 100mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 20µA, ISD <1µA
ThinSOT™ Package
LT1762 150mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25µA, ISD <1µA, MS8 Package
LT1763 500mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30µA, ISD <1µA, S8 Package
LT1764/
LT1764A
3A, Low Noise, Fast Transient Response,
LDO
VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1µA,
DD, TO220 Packages
LTC1844 150mA, Very Low Drop-Out LDO VIN: 6.5V to 1.6V, VOUT(MIN) = 1.25V, VDO = 0.08V, IQ = 40µA, ISD < 1µA,
ThinSOT Package
LT1962 300mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30µA, ISD <1µA, MS8 Package
LT1964 200mA, Low Noise Micropower,
Negative LDO
VIN: –0.9V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30µA, ISD 3µA,
ThinSOT Package
LT1965 1.1A, Low Noise, Low Dropout Linear
Regulator
290mV Dropout Voltage, Low Noise: 40µVRMS, VIN: 1.8V to 20V, VOUT: 1.2V to 19.5V,
stable with ceramic caps, TO-220, DD-Pak, MSOP and 3mm × 3mm DFN Packages
LT3020 100mA, Low Voltage VLDO,
VIN(MIN) = 0.9V
VIN: 0.9V to 10V, VOUT(MIN) = 0.20, VDO = 0.15V, IQ = 120µA, ISD <3µA,
DFN, MS8 Packages
LT3023 Dual, 2x 100mA, Low Noise
Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 40µA, ISD <1µA,
DFN, MS10 Packages
LT3024 Dual, 100mA/500mA, Low Noise
Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 60µA, ISD <1µA,
DFN, TSSOP Packages
LT3080/
LT3080-1
1.1A, Parallelable, Low Noise, Low
Dropout Linear Regulator
300mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V,
VOUT: 0V to 35.7V, current-based reference with 1-resistor VOUT set; directly parallelable
(no op amp required), stable with ceramic caps, TO-220, SOT-223, MSOP and 3mm × 3mm
DFN Packages; “–1” version has integrated internal ballast resistor
+
LT1004-1.2
V
IN
> 2.7V C1
10µF
R3
2k
R1
1k
R2
80.6k
R4
2.2k
R5
0.01Ω
R6
2.2k
LT1963A-1.8
IN
SHDN
OUT
FB
GND
–
+
1/2
LT1366
R8
100k
LOAD
R7
470Ω
2
1
8
34
C3
1µF
C2
3.3µF
1963A TA04
NOTE: ADJUST R1 FOR
0A TO 1.5A CONSTANT CURRENT
Adjustable Current Source