REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
AD8074/AD8075
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2001
500 MHz, G = +1 and +2 Triple
Video Buffers with Disable
FUNCTIONAL BLOCK DIAGRAM
OE
DGND
IN2
AGND
IN1
AGND
IN0
V
EE
V
CC
V
CC
OUT2
V
EE
OUT1
V
CC
OUT0
V
EE
AD8074 /AD8075
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
G =
+1/+2
G =
+1/+2
G =
+1/+2
FEATURES
Dual Supply ⴞ5 V
High-Speed Fully Buffered Inputs and Outputs
600 MHz Bandwidth (–3 dB) 200 mV p-p
500 MHz Bandwidth (–3 dB) 2 V p-p
1600 V/s Slew Rate, G = +1
1350 V/s Slew Rate, G = +2
Fast Settling Time: 4 ns
Low Supply Current: <30 mA
Excellent Video Specifications (RL = 150 ⍀):
Gain Flatness of 0.1 dB to 50 MHz
0.01% Differential Gain Error
0.01ⴗ Differential Phase Error
“All Hostile“ Crosstalk
–80 dB @ 10 MHz
–50 dB @ 100 MHz
High “OFF” Isolation of 90 dB @ 10 MHz
Low Cost
Fast Output Disable Feature
APPLICATIONS
RGB Buffer in LCD and Plasma Displays
RGB Driver
Video Routers
PRODUCT DESCRIPTION
The AD8074/AD8075 are high-speed triple video buffers with
G = +1 and +2 respectively. They have a –3 dB full signal band-
width in excess of 450 MHz, along with slew rates in excess of
1400 V/µs. With better than –80 dB of all hostile crosstalk and
90 dB isolation, they are useful in many high-speed applica-
tions. The differential gain and differential phase error are 0.01%
and 0.01°. Gain flatness of 0.1 dB up to 50 MHz makes the
AD8074/AD8075 ideal for RGB buffering or driving. They
consume less than 30 mA on a ±5 V supply.
Both devices offer a high-speed disable feature that allows the
outputs to be put into a high impedance state. This allows the
building of larger input arrays while minimizing “OFF” chan-
nel output loading. The AD8074/AD8075 are offered in a
16-lead TSSOP package.
Table I. Truth Table
OE OUT0, 1, 2
0 IN0, IN1, IN2
1 High Z
REV. A
–2–
AD8074/AD8075–SPECIFICATIONS
(TA = 25ⴗC, VS = ⴞ5 V, unless otherwise noted.)
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth (Small Signal) V
IN
= 200 mV p-p, C
L
= 5 pF 330/310 600/550 MHz
V
IN
= 200 mV p-p, R
L
= 150 Ω250/230 400/400 MHz
–3 dB Bandwidth (Large Signal) V
IN
= 2 V p-p, C
L
= 5 pF 330/300 500/500 MHz
V
IN
= 2 V p-p, R
L
= 150 Ω250/230 350/350 MHz
0.1 dB Bandwidth V
IN
= 200 mV p-p, C
L
= 5 pF 70/65 MHz
V
IN
= 200 mV p-p, R
L
= 150 Ω70/65 MHz
Slew Rate 2 V Step, R
L
= 1 kΩ/150 Ω1600/1350 V/µs
Settling Time to 0.1% 2 V Step, R
L
= 1 kΩ/150 Ω4/7.5 ns
NOISE/DISTORTION PERFORMANCE
Differential Gain V = 3.58 MHz, 150 Ω0.01 %
Differential Phase V = 3.58 MHz, 150 Ω0.01 Degrees
All Hostile Crosstalk V = 10 MHz, R
L
= 1 kΩ–80/–74 dB
V = 100 MHz, R
L
= 1 kΩ–50/–44 dB
OFF Isolation V = 10 MHz, R
L
= 150 Ω90 dB
Voltage Noise V = 10 kHz to 100 MHz 19.5/22 nV/√Hz
DC PERFORMANCE
Voltage Gain Error No Load ±0.1/±0.2 ±0.15/±0.65 %
Input Offset Voltage 2.5 27/40 mV
T
MIN
to T
MAX
3mV
Input Offset Drift 10 µV/°C
Input Bias Current 5 9.5/10 µA
INPUT CHARACTERISTICS
Input Resistance 10 MΩ
Input Capacitance Channel Enabled 1.5 pF
Channel Disabled 1.5 pF
Input Voltage Range ±2.8/±1.4 V
OUTPUT CHARACTERISTICS
Output Voltage Swing R
L
= 1 kΩ+V
S
– 1.95 +V
S
– 1.8 V
–V
S
+ 2.1 –V
S
+ 1.8 V
R
L
= 150 Ω+V
S
– 2.35 +V
S
– 2.2 V
–V
S
+ 2.30 –V
S
+ 2.2 V
Short Circuit Current (Protected) 70 mA
Output Resistance Enabled 0.5 Ω
Disabled 3.5 7.5 MΩ
Output Capacitance Disabled 2.2 pF
POWER SUPPLY
Operating Range ±4.5 ±5.5 V
Power Supply Rejection Ratio +PSRR: +V
S
= +4.5 V to +5.5 V, –V
S
= –5 V 60 74 dB
–PSRR: –V
S
= –4.5 V to –5.5 V, +V
S
= +5 V 56 64 dB
Quiescent Current All Channels “ON” 21.5/24 30 mA
All Channels “OFF” 3/4 5.5 mA
T
MIN
to T
MAX
23/26 mA
DIGITAL INPUT
Logic “1” Voltage OE Input 2.0 V
Logic “0” Voltage OE Input 0.8 V
Logic “1” Input Current OE = 4 V 100 nA
Logic “0” Input Current OE = 0.4 V 1 µA
OPERATING TEMPERATURE RANGE
Temperature Range Operating (Still Air) –40 +85 °C
θ
JA
Operating (Still Air) 150.4 °C/W
θ
JC
Operating 27.6 °C/W
Specifications subject to change without notice.
REV. A
AD8074/AD8075
–3–
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.0 V
Internal Power Dissipation
2, 3
AD8074/AD8075 16-Lead TSSOP (RU) . . . . . . . . . . . . . 1 W
Input Voltage
IN0, IN1, IN2 . . . . . . . . . . . . . . . . . . . . . . . . . V
EE
≤ V
IN
≤ V
CC
OE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND ≤ V
IN
≤ V
CC
Output Short Circuit Duration . . . . . . . . . . . . . . . . . . Indefinite
3
Storage Temperature Range . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air (T
A
= 25°C).
3
16-lead plastic TSSOP; θ
JA
= 150.4°C/W. Maximum internal power dissipa-
tion (P
D
) should be derated for ambient temperature (T
A
) such that
P
D
< (150°C – T
A
)/θ
JA
.
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
AD8074ARU –40°C to +85°C 16-Lead Plastic TSSOP RU-16
AD8075ARU –40°C to +85°C 16-Lead Plastic TSSOP RU-16
AD8074-EVAL Evaluation Board
AD8075-EVAL Evaluation Board
PIN CONFIGURATION
OE
DGND
IN2
AGND
IN1
AGND
IN0
V
EE
V
CC
V
CC
OUT2
V
EE
OUT1
V
CC
OUT0
V
EE
AD8074 /AD8075
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
G =
+1/+2
G =
+1/+2
G =
+1/+2
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the AD8074/
AD8075 is limited by the associated rise in junction temperature.
The maximum safe junction temperature for plastic encapsulated
devices is determined by the glass transition temperature of the
plastic, approximately 150°C. Temporarily exceeding this limit
may cause a shift in parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding a junc-
tion temperature of 175°C for an extended period can result in
device failure.
While the AD8074/AD8075 is internally short circuit protected,
this may not be sufficient to guarantee that the maximum junction
temperature (150°C) is not exceeded under all conditions. To
ensure proper operation, it is necessary to observe the maximum
power derating curves shown in Figure 1.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8074/AD8075 features proprietary ESD protection circuitry, permanent damage may occur
on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
AMBIENT TEMPERATURE – ⴗC
MAXIMUM POWER DISSIPATION – Watts
TJ = 150ⴗC
010 30 50 70 90
0
0.5
1.0
1.5
–50 –30 –10
Figure 1. Maximum Power Dissipation vs. Temperature