TNY263-268 TinySwitch-II Family (R) Enhanced, Energy Efficient, Low Power Off-line Switcher Product Highlights TinySwitch-II Features Reduce System Cost * Fully integrated auto-restart for short circuit and open loop fault protection - saves external component costs * Built-in circuitry practically eliminates audible noise with ordinary dip-varnished transformer * Programmable line under-voltage detect feature prevents power on/off glitches - saves external components * Frequency jittering dramatically reduces EMI (~10 dB) - minimizes EMI filter component costs * 132 kHz operation reduces transformer size - allows use of EF12.6 or EE13 cores for low cost and small size * Very tight tolerances and negligible temperature variation on key parameters eases design and lowers cost * Lowest component count switcher solution * Expanded scalable device family for low system cost Better Cost/Performance over RCC & Linears * Lower system cost than RCC, discrete PWM and other integrated/hybrid solutions * Cost effective replacement for bulky regulated linears * Simple ON/OFF control - no loop compensation needed * No bias winding - simpler, lower cost transformer * Simple design practically eliminates rework in manufacturing (R) EcoSmart - Extremely Energy Efficient * No load consumption <50 mW with bias winding and <250 mW without bias winding at 265 VAC input * Meets California Energy Commission (CEC), Energy Star, and EU requirements * Ideal for cell-phone charger and PC standby applications High Performance at Low Cost * High voltage powered - ideal for charger applications * High bandwidth provides fast turn on with no overshoot * Current limit operation rejects line frequency ripple * Built-in current limit and thermal protection improves safety Description TinySwitch-II integrates a 700 V power MOSFET, oscillator, high voltage switched current source, current limit and thermal shutdown circuitry onto a monolithic device. The start-up and operating power are derived directly from the voltage on the DRAIN pin, eliminating the need for a bias winding and associated circuitry. In addition, the + + Optional UV Resistor DC Output - Wide-Range HV DC Input D TinySwitch-II EN/UV BP S - PI-2684-101700 Figure 1. Typical Standby Application. OUTPUT POWER TABLE PRODUCT3 TNY263 P or G TNY264 P or G TNY265 P or G TNY266 P or G TNY267 P or G TNY268 P or G 230 VAC 15% Adapter1 5W 5.5 W 8.5 W 10 W 13 W 16 W 85-265 VAC Open Open Adapter1 Frame2 Frame2 7.5 W 9W 11 W 15 W 19 W 23 W 3.7 W 4W 5.5 W 6W 8W 10 W 4.7 W 6W 7.5 W 9.5 W 12 W 15 W Table 1. Notes: 1. Minimum continuous power in a typical non-ventilated enclosed adapter measured at 50 C ambient. 2. Minimum practical continuous power in an open frame design with adequate heat sinking, measured at 50 C ambient (See Key Applications Considerations). 3. Packages: P: DIP-8B, G: SMD-8B. For lead-free package options, see Part Ordering Information. TinySwitch-II devices incorporate auto-restart, line undervoltage sense, and frequency jittering. An innovative design minimizes audio frequency components in the simple ON/OFF control scheme to practically eliminate audible noise with standard taped/varnished transformer construction. The fully integrated auto-restart circuit safely limits output power during fault conditions such as output short circuit or open loop, reducing component count and secondary feedback circuitry cost. An optional line sense resistor externally programs a line under-voltage threshold, which eliminates power down glitches caused by the slow discharge of input storage capacitors present in applications such as standby supplies. The operating frequency of 132 kHz is jittered to significantly reduce both the quasi-peak and average EMI, minimizing filtering cost. April 2005 TNY263-268 BYPASS (BP) DRAIN (D) REGULATOR 5.8 V LINE UNDER-VOLTAGE 240 A 50 A FAULT PRESENT + AUTORESTART COUNTER 5.8 V 4.8 V BYPASS PIN UNDER-VOLTAGE VI LIMIT RESET CURRENT LIMIT COMPARATOR ENABLE + JITTER CLOCK 1.0 V + VT THERMAL SHUTDOWN DCMAX OSCILLATOR ENABLE/ UNDERVOLTAGE (EN/UV) S Q R Q LEADING EDGE BLANKING SOURCE (S) PI-2643-030701 Figure 2. Functional Block Diagram. Pin Functional Description DRAIN (D) Pin: Power MOSFET drain connection. Provides internal operating current for both start-up and steady-state operation. BYPASS (BP) Pin: Connection point for a 0.1 F external bypass capacitor for the internally generated 5.8 V supply. ENABLE/UNDER-VOLTAGE (EN/UV) Pin: This pin has dual functions: enable input and line under-voltage sense. During normal operation, switching of the power MOSFET is controlled by this pin. MOSFET switching is terminated when a current greater than 240 A is drawn from this pin. This pin also senses line under-voltage conditions through an external resistor connected to the DC line voltage. If there is no external resistor connected to this pin, TinySwitch-II detects its absence and disables the line undervoltage function. Figure 3. Pin Configuration. SOURCE (S) Pin: Control circuit common, internally connected to output MOSFET source. SOURCE (HV RTN) Pin: Output MOSFET source connection for high voltage return. 2 G 4/05 TNY263-268 TinySwitch-II Functional Description TinySwitch-II combines a high voltage power MOSFET switch with a power supply controller in one device. Unlike conventional PWM (pulse width modulator) controllers, TinySwitch-II uses a simple ON/OFF control to regulate the output voltage. The TinySwitch-II controller consists of an oscillator, enable circuit (sense and logic), current limit state machine, 5.8 V regulator, BYPASS pin under-voltage circuit, overtemperature protection, current limit circuit, leading edge blanking and a 700 V power MOSFET. TinySwitch-II incorporates additional circuitry for line under-voltage sense, auto-restart and frequency jitter. Figure 2 shows the functional block diagram with the most important features. Oscillator The typical oscillator frequency is internally set to an average of 132 kHz. Two signals are generated from the oscillator: the maximum duty cycle signal (DCMAX) and the clock signal that indicates the beginning of each cycle. The TinySwitch-II oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 8 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter is set to 1 kHz to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in Figure 4 illustrates the frequency jitter of the TinySwitch-II. 600 500 VDRAIN 400 PI-2741-041901 Enable Input and Current Limit State Machine The enable input circuit at the EN/UV pin consists of a low impedance source follower output set at 1.0 V. The current through the source follower is limited to 240 A. When the current out of this pin exceeds 240 A, a low logic level (disable) is generated at the output of the enable circuit. This enable circuit output is sampled at the beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled). If low, the power MOSFET remains off (disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the EN/UV pin voltage or current during the remainder of the cycle are ignored. The current limit state machine reduces the current limit by discrete amounts at light loads when TinySwitch-II is likely to switch in the audible frequency range. The lower current limit raises the effective switching frequency above the audio range and reduces the transformer flux density, including the associated audible noise. The state machine monitors the sequence of EN/UV pin voltage levels to determine the load condition and adjusts the current limit level accordingly in discrete amounts. Under most operating conditions (except when close to no-load), the low impedance of the source follower keeps the voltage on the EN/UV pin from going much below 1.0 V in the disabled state. This improves the response time of the optocoupler that is usually connected to this pin. 5.8 V Regulator and 6.3 V Shunt Voltage Clamp The 5.8 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.8 V by drawing a current from the voltage on the DRAIN pin whenever the MOSFET is off. The BYPASS pin is the internal supply voltage node for the TinySwitch-II. When the MOSFET is on, the TinySwitch-II operates from the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows TinySwitch-II to operate continuously from current it takes from the DRAIN pin. A bypass capacitor value of 0.1 F is sufficient for both high frequency decoupling and energy storage. In addition, there is a 6.3 V shunt regulator clamping the BYPASS pin at 6.3 V when current is provided to the BYPASS pin through an external resistor. This facilitates powering of TinySwitch-II externally through a bias winding to decrease the no-load consumption to about 50 mW. BYPASS Pin Under-Voltage The BYPASS pin under-voltage circuitry disables the power MOSFET when the BYPASS pin voltage drops below 4.8 V. Once the BYPASS pin voltage drops below 4.8 V, it must rise back to 5.8 V to enable (turn-on) the power MOSFET. 300 200 100 0 136 kHz 128 kHz 0 5 Time (s) 10 Over Temperature Protection The thermal shutdown circuitry senses the die temperature. The threshold is typically set at 135 C with 70 C hysteresis. When the die temperature rises above this threshold the power MOSFET is disabled and remains disabled until the die temperature falls by 70 C, at which point it is re-enabled. A large hysteresis of Figure 4. Frequency Jitter. G 4/05 3 TNY263-268 70 C (typical) is provided to prevent overheating of the PC board due to a continuous fault condition. Current Limit The current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold (ILIMIT), the power MOSFET is turned off for the remainder of that cycle. The current limit state machine reduces the current limit threshold by discrete amounts under medium and light loads. The leading edge blanking circuit inhibits the current limit comparator for a short time (tLEB) after the power MOSFET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and secondary-side rectifier reverse recovery time will not cause premature termination of the switching pulse. Auto-Restart In the event of a fault condition such as output overload, output short circuit, or an open loop condition, TinySwitch-II enters into auto-restart operation. An internal counter clocked by the oscillator gets reset every time the EN/UV pin is pulled low. If the EN/UV pin is not pulled low for 50 ms, the power MOSFET switching is normally disabled for 850 ms (except in the case of line under-voltage condition, in which case it is disabled until the condition is removed). The auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is removed. Figure 5 illustrates auto-restart circuit operation in the presence of an output short circuit. V 300 PI-2699-030701 In the event of a line under-voltage condition, the switching of the power MOSFET is disabled beyond its normal 850 ms time until the line under-voltage condition ends. DRAIN 200 100 0 10 V DC-OUTPUT 5 0 1000 0 Time (ms) Figure 5. TinySwitch-II Auto-Restart Operation. 4 G 4/05 2000 Line Under-Voltage Sense Circuit The DC line voltage can be monit o Map TNY263-268 the SOURCE pin. The optocoupler LED is connected in series with a Zener diode across the DC output voltage to be regulated. When the output voltage exceeds the target regulation voltage level (optocoupler LED voltage drop plus Zener voltage), the optocoupler LED will start to conduct, pulling the EN/UV pin low. The Zener diode can be replaced by a TL431 reference circuit for improved accuracy. the beginning of each clock cycle, it samples the EN/UV pin to decide whether or not to implement a switch cycle, and based on the sequence of samples over multiple cycles, it determines the appropriate current limit. At high loads, when the EN/UV pin is high (less than 240 A out of the pin), a switching cycle with the full current limit occurs. At lighter loads, when EN/UV is high, a switching cycle with a reduced current limit occurs. ON/OFF Operation with Current Limit State Machine The internal clock of the TinySwitch-II runs all the time. At At near maximum load, TinySwitch-II will conduct during nearly all of its clock cycles (Figure 6). At slightly lower load, it will "skip" additional cycles in order to maintain voltage regulation at the power supply output (Figure 7). At medium loads, cycles will be skipped and the current limit will be reduced (Figure 8). At very light loads, the current limit will be reduced even further (Figure 9). Only a small percentage of cycles will occur to satisfy the power consumption of the power supply. V EN CLOCK D The response time of the TinySwitch-II ON/OFF control scheme is very fast compared to normal PWM control. This provides tight regulation and excellent transient response. MAX I DRAIN V DRAIN PI-2749-050301 Figure 6. TinySwitch-II Operation at Near Maximum Loading. Power Up/Down The TinySwitch-II requires only a 0.1 F capacitor on the BYPASS pin. Because of its small size, the time to charge this capacitor is kept to an absolute minimum, typically 0.6 ms. Due to the fast nature of the ON/OFF feedback, there is no overshoot at the power supply output. When an external resistor (2 M) is connected from the positive DC input to the EN/UV pin, the power MOSFET switching will be delayed during power-up until the DC line voltage exceeds the threshold (100 V). Figures 10 and 11 show the power-up timing waveform of TinySwitch-II in applications with and without an external resistor (2 M) connected to the EN/UV pin. V EN V EN CLOCK CLOCK D D MAX I DRAIN MAX I DRAIN V DRAIN V DRAIN PI-2667-090700 Figure 7. TinySwitch-II Operation at Moderately Heavy Loading. PI-2377-091100 Figure 8. TinySwitch-II Operation at Medium Loading. G 4/05 5 TNY263-268 V EN CLOCK D MAX I DRAIN V DRAIN Figure 11. TinySwitch-II Power-up without Optional External UV Resistor Connected to EN/UV Pin. PI-2661-072400 Figure 9. TinySwitch-II Operation at Very Light Load. During power-down, when an external resistor is used, the power MOSFET will switch for 50 ms after the output loses regulation. The power MOSFET will then remain off without any glitches since the under-voltage function prohibits restart when the line voltage is low. Figure 12 illustrates a typical power-down timing waveform of TinySwitch-II. Figure 13 illustrates a very slow power-down timing waveform of TinySwitch-II as in standby applications. The external resistor (2 M) is connected to the EN/UV pin in this case to prevent unwanted restarts. PI-2383-030801 200 V DC-INPUT 100 200 0 100 10 0 5 400 0 300 400 200 200 100 0 V DC-INPUT V DRAIN 0 1 0 Time (ms) Figure 10. TinySwitch-II Power-up with Optional External UV Resistor (2 M) Connected to EN/UV Pin. 6 PI-2395-030801 Figure 12. Normal Power-down Timing (without UV). G 4/05 2 0 2.5 Time (s) Figure 13. Slow Power-down Timing with Optional External (2 M) UV Resistor Connected to EN/UV Pin. 5 TNY263-268 C8 680 pF Y1 Safety Shield T1 1 D1 1N4005 R2 200 k RF1 8.2 C2 3.3 F 400 V U1 TNY264 TinySwitch-II Fusible D3 1N4005 D4 1N4005 R1 1.2 k L1 2.2 mH L2 3.3 H C5 330 F 16 V 4 D2 1N4005 C1 3.3 F 400 V D5 1N5819 C3 2.2 nF C6 100 F 35 V +5V 500 mA RTN 5 R8 270 D6 1N4937 85-265 VAC 8 U2 LTV817 D R7 100 R9 47 Q1 2N3904 S C3 0.1 F R3 22 VR1 BZX79B3V9 3.9 V C7 10 F 10 V R4 1.2 1/2 W R6 1 1/2 W PI-2706-080404 Figure 14. 2.5 W Constant Voltage, Constant Current Battery Charger with Universal Input (85-265 VAC). G 4/05 7 TNY263-268 2.5 W CV/CC Cell-Phone Charger As an example, Figure 14 shows a TNY264 based 5 V, 0.5 A, cellular phone charger operating over a universal input range (85 VAC to 265 VAC). The inductor (L1) forms a -filter in conjunction with C1 and C2. The resistor R1 damps resonances in the inductor L1. Frequency jittering operation of TinySwitch-II allows the use of a simple -filter described above in combination with a single low value Y1-capacitor (C8) to meet worldwide conducted EMI standards. The addition of a shield winding in the transformer allows conducted EMI to be met even with the output capacitively earthed (which is the worst case condition for EMI). The diode D6, capacitor C3 and resistor R2 comprise the clamp circuit, limiting the leakage inductance turn-off voltage spike on the TinySwitch-II DRAIN pin to a safe value. The output voltage is determined by the sum of the optocoupler U2 LED forward drop (~1 V), and Zener diode VR1 voltage. Resistor R8 maintains a bias current through the Zener diode to ensure it is operated close to the Zener test current. A simple constant current circuit is implemented using the VBE of transistor Q1 to sense the voltage across the current sense resistor R4. When the drop across R4 exceeds the VBE of transistor Q1, it turns on and takes over control of the loop by driving the optocoupler LED. Resistor R6 assures sufficient voltage to keep the control loop in operation down to zero volts at the output. With the output shorted, the drop across R4 and R6 (~1.2 V) is sufficient to keep the Q1 and LED circuit active. Resistors R7 and R9 limit the forward current that could be drawn through VR1 by Q1 under output short circuit conditions, due to the voltage drop across R4 and R6. 10 and 15 W Standby Circuits Figures 15 and 16 show examples of circuits for standby applications. They both provide two outputs: an isolated 5 V and a 12 V primary referenced output. The first, using TNY266P, provides 10 W, and the second, using TNY267P, 15 W of output power. Both operate from an input range of 140 VDC to 375 VDC, corresponding to a 230 VAC or 100/115 VAC with doubler input. The designs take advantage of the line undervoltage detect, auto-restart and higher switching frequency of TinySwitch-II. Operation at 132 kHz allows the use of a smaller and lower cost transformer core, EE16 for 10 W and EE22 for 15 W. The removal of pin 6 from the 8 pin DIP TinySwitch-II packages provides a large creepage distance which improves reliability in high pollution environments such as fan cooled power supplies. Capacitor C1 provides high frequency decoupling of the high voltage DC supply, only necessary if there is a long trace length from the DC bulk capacitors of the main supply. The 8 G 4/05 line sense resistors R2 and R3 sense the DC input voltage for line under-voltage. When the AC is turned off, the undervoltage detect feature of the TinySwitch-II prevents auto-restart glitches at the output caused by the slow discharge of large storage capacitance in the main converter. This is achieved by preventing the TinySwitch-II from switching when the input voltage goes below a level needed to maintain output regulation, and keeping it off until the input voltage goes above the undervoltage threshold, when the AC is turned on again. With R2 and R3, giving a combined value of 2 M, the power up undervoltage threshold is set at 200 VDC, slightly below the lowest required operating DC input voltage, for start-up at 170 VAC, with doubler. This feature saves several components needed to implement the glitch-free turn-off compared with discrete or TOPSwitch-II based designs. During turn-on the rectified DC input voltage needs to exceed 200 V under-voltage threshold for the power supply to start operation. But, once the power supply is on it will continue to operate down to 140 V rectified DC input voltage to provide the required hold up time for the standby output. The auxiliary primary side winding is rectified and filtered by D2 and C2 to create a 12 V primary bias output voltage for the main power supply primary controller. In addition, this voltage is used to power the TinySwitch-II via R4. Although not necessary for operation, supplying the TinySwitch-II externally reduces the device quiescent dissipation by disabling the internal drain derived current source normally used to keep the BYPASS pin capacitor (C3) charged. An R4 value of 10 k provides 600 A into the BYPASS pin, which is slightly in excess of the current consumption of TinySwitch-II. The excess current is safely clamped by an on-chip active Zener diode to 6.3 V. The secondary winding is rectified and filtered by D3 and C6. For a 15 W design an additional output capacitor, C7, is required due to the larger secondary ripple currents compared to the 10 W standby design. The auto-restart function limits output current during short circuit conditions, removing the need to over rate D3. Switching noise filtering is provided by L1 and C8. The 5 V output is sensed by U2 and VR1. R5 is used to ensure that the Zener diode is biased at its test current and R6 centers the output voltage at 5 V. In many cases the Zener regulation method provides sufficient accuracy (typically 6% over a 0 C to 50 C temperature range). This is possible because TinySwitch-II limits the dynamic range of the optocoupler LED current, allowing the Zener diode to operate at near constant bias current. However, if higher accuracy is required, a TL431 precision reference IC may be used to replace VR1. TNY263-268 PERFORMANCE SUMMARY Continuous Output Power: Efficiency: 10.24 W 75% 140-375 VDC INPUT C1 0.01 F 1 kV U1 TNY266P C4 1 nF Y1 C5 R1 2.2 nF 200 k 1 kV D1 1N4005GP R2 1 M D2 1N4148 1 10 2 8 C6 1000 F 10 V 4 C2 82 F 35 V 5 R4 10 k EN BP R6 59 1% U2 TLP181Y TinySwitch-II S C8 470 F 10 V VR1 BZX79B3V9 R3 1 M D +5 V 2A RTN T1 +12 VDC 20 mA L1 10 H 2A D3 1N5822 R5 680 C3 0.1 F 50 V 0V PI-2713-080404 Figure 15. 10 W Standby Supply. PERFORMANCE SUMMARY Continuous Output Power: Efficiency: 15.24 W 78% C5 2.2 nF R1 100 k 1 kV 140-375 VDC INPUT C1 0.01 F 1 kV U1 TNY267P D1 1N4005GP R2 1 M D2 1N4148 1 10 2 8 EN BP S R4 10 k TinySwitch-II C3 0.1 F 50 V C6 1000 F 10 V C7 1000 F 10 V +5 V 3A C8 470 F 10 V RTN 4 VR1 BZX79B3V9 5 R6 59 1% R3 1 M D L1 10 H 3A D3 SB540 T1 +12 VDC 20 mA C2 82 F 35 V C4 1 nF Y1 U2 TLP181Y R5 680 0V PI-2712-080404 Figure 16. 15 W Standby Supply. G 4/05 9 TNY263-268 Key Application Considerations Design TinySwitch-II vs. TinySwitch Output Power Table 1 (front page) shows the practical continuous output power levels that can be obtained under the following conditions: Table 2 compares the features and performance differences between the TNY254 device of the TinySwitch family with the TinySwitch-II family of devices. Many of the new features eliminate the need for or reduce the cost of circuit components. Other features simplify the design and enhance performance. 1. The minimum DC input voltage is 90 V or higher for 85 VAC input, or 240 V or higher for 230 VAC input or 115 VAC input with a voltage doubler. This corresponds to a filter capacitor of 3 F/W for universal input and 1 F/W for 230 VAC or 115 VAC with doubler input. TinySwitch TNY254 TinySwitch-II TNY263-268 Switching Frequency and Tolerance Temperature Variation (0-100 C)** 44 kHz 10% (at 25 C) 132 kHz 6% (at 25 C) +8% +2% Active Frequency Jitter N/A* 4 kHz * Lower EMI minimizing filter component costs Transformer Audible Noise Reduction N/A* Yes-built into controller * Practically eliminates audible noise with ordinary dip varnished transformer - no special construction or gluing required Line UV Detect N/A* Single resistor programmable * Prevents power on/off glitches Current Limit Tolerance Temperature Variation (0-100 C)** 11% (at 25 C) -8% 7% (at 25 C) 0% * Increases power capability and simplifies design for high volume manufacturing Auto-Restart N/A* 6% effective on-time * Limits output short-circuit current to less than full load current - No output diode size penalty * Protects load in open loop fault conditions - No additional components required BYPASS Pin Zener Clamp N/A* Internally clamped to 6.3 V * Allows TinySwitch-II to be powered from a low voltage bias winding to improve efficiency and to reduce on-chip power dissipation DRAIN Creepage at Package 0.037 in. / 0.94 mm 0.137 in. / 3.48 mm * Greater immunity to arcing as a result of dust, debris or other contaminants build-up Function *Not available. ** See typical performance curves. Table 2. Comparison Between TinySwitch and TinySwitch-II. 10 G 4/05 TinySwitch-II Advantages * * * * Smaller transformer for low cost Ease of design Manufacturability Optimum design for lower cost TNY263-268 2. A secondary output of 5 V with a Schottky rectifier diode. 3. Assumed efficiency of 77% (TNY267 & TNY268), 75% (TNY265 & TNY266) and 73% (TNY263 & TNY264). 4. The parts are board mounted with SOURCE pins soldered to sufficient area of copper to keep the die temperature at or below 100 C. In addition to the thermal environment (sealed enclosure, ventilated, open frame, etc.), the maximum power capability of TinySwitch-II in a given application depends on transformer core size and design (continuous or discontinuous), efficiency, minimum specified input voltage, input storage capacitance, output voltage, output diode forward drop, etc., and can be different from the values shown in Table 1. Audible Noise The TinySwitch-II practically eliminates any transformer audio noise using simple ordinary varnished transformer construction. No gluing of the cores is needed. The audio noise reduction is accomplished by the TinySwitch-II controller reducing the current limit in discrete steps as the load is reduced. This minimizes the flux density in the transformer when switching at audio frequencies. Worst Case EMI & Efficiency Measurement Since identical TinySwitch-II supplies may operate at several different frequencies under the same load and line conditions, care must be taken to ensure that measurements are made under worst case conditions. When measuring efficiency or EMI verify that the TinySwitch-II is operating at maximum frequency and that measurements are made at both low and high line input voltages to ensure the worst case result is obtained. Layout Single Point Grounding Use a single point ground connection at the SOURCE pin for the BYPASS pin capacitor and the Input Filter Capacitor (see Figure 17). Primary Loop Area The area of the primary loop that connects the input filter capacitor, transformer primary and TinySwitch-II together should be kept as small as possible. Primary Clamp Circuit A clamp is used to limit peak voltage on the DRAIN pin at turn-off. This can be achieved by using an RCD clamp (as shown in Figure 14). A Zener and diode clamp (200 V) across the primary or a single 550 V Zener clamp from DRAIN to SOURCE can also be used. In all cases care should be taken to minimize the circuit path from the clamp components to the transformer and TinySwitch-II. Thermal Considerations Copper underneath the TinySwitch-II acts not only as a single point ground, but also as a heatsink. The hatched areas shown in Figure 17 should be maximized for good heat sinking of TinySwitch-II and the same applies to the output diode. EN/UV pin If a line under-voltage detect resistor is used then the resistor should be mounted as close as possible to the EN/UV pin to minimize noise pick up. The voltage rating of a resistor should be considered for the undervoltage detect (Figure 15: R2, R3) resistors. For 1/4 W resistors, the voltage rating is typically 200 V continuous, whereas for 1/2 W resistors the rating is typically 400 V continuous. Y-Capacitor The placement of the Y-capacitor should be directly from the primary bulk capacitor positive rail to the common/return terminal on the secondary side. Such placement will maximize the EMI benefit of the Y-capacitor and avoid problems in common-mode surge testing. Optocoupler It is important to maintain the minimum circuit path from the optocoupler transistor to the TinySwitch-II EN/UV and SOURCE pins to minimize noise coupling. The EN/UV pin connection to the optocoupler should be kept to an absolute minimum (less than 12.7 mm or 0.5 in.), and this connection should be kept away from the DRAIN pin (minimum of 5.1 mm or 0.2 in.). Output Diode For best performance, the area of the loop connecting the secondary winding, the output diode and the output filter capacitor, should be minimized. See Figure 17 for optimized layout. In addition, sufficient copper area should be provided at the anode and cathode terminals of the diode for adequate heatsinking. Input and Output Filter Capacitors There are constrictions in the traces connected to the input and output filter capacitors. These constrictions are present for two reasons. The first is to force all the high frequency currents to flow through the capacitor (if the trace were wide then it could flow around the capacitor). Secondly, the constrictions minimize the heat transferred from the TinySwitch-II to the input filter capacitor and from the secondary diode to the output filter capacitor. The common/return (the negative output terminal in Figure 17) terminal of the output filter capacitor should be connected with a short, low impedance path to the secondary winding. In addition, the common/return output connection should be taken directly from the secondary winding pin and not from the Y-capacitor connection point. G 4/05 11 TNY263-268 Safety Spacing Input Filter Capacitor Y1Capacitor + Output Filter Capacitor HV -- PRI D S TOP VIEW T r a n s f o r m e r SEC TinySwitch-II CBP Optocoupler BP S EN/UV -- DC + Out Maximize hatched copper areas ( ) for optimum heat sinking PI-2707-012901 Figure 17. Recommended Circuit Board Layout for TinySwitch-II with Under-Voltage Lock Out Resistor. PC Board Cleaning Power Integrations does not recommend the use of "no clean" flux. 12 G 4/05 For the most up-to-date information visit the PI website at: www.powerint.com. TNY263-268 ABSOLUTE MAXIMUM RATINGS(1,4) DRAIN Voltage .................................................. -0.3 V to 700 V DRAIN Peak Current: TNY263......................................400 mA TNY264......................................400 mA TNY265......................................440 mA TNY266......................................560 mA TNY267......................................720 mA TNY268......................................880 mA EN/UV Voltage ................................................ -0.3 V to 9 V EN/UV Current .................................................... 100 mA BYPASS Voltage ..................................................-0.3 V to 9 V Storage Temperature ......................................-65 C to 150 C Operating Junction Temperature(2) .................-40 C to 150 C Lead Temperature(3) ....................................................... 260 C Notes: 1. All voltages referenced to SOURCE, TA = 25 C. 2. Normally limited by internal circuitry. 3. 1/16 in. from case for 5 seconds. 4. Maximum ratings specified may be applied one at a time, without causing permanent damage to the product. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect product reliability. THERMAL IMPEDANCE Thermal Impedance: P or G Package: Notes: (JA) ........................... 70 C/W(2); 60 C/W(3) 1. Measured on the SOURCE pin close to plastic interface. (JC)(1) ............................................... 11 C/W 2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad. 3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad. Conditions Parameter Symbol SOURCE = 0 V; TJ = -40 to 125 C See Figure 18 (Unless Otherwise Specified) Min Typ Max 124 132 140 Units CONTROL FUNCTIONS Output Frequency Maximum Duty Cycle fOSC Average TJ = 25 C See Figure 4 Peak-Peak Jitter 8 kHz DCMAX S1 Open 62 65 68 % EN/UV Pin Turnoff Threshold Current IDIS TJ = -40 C to 125 C -300 -240 -170 A EN/UV Pin Voltage VEN IEN/UV = -125 A 0.4 1.0 1.5 IEN/UV = 25 A 1.3 2.3 2.7 430 500 TNY263 200 250 TNY264 225 270 TNY265 245 295 TNY266 265 320 TNY267 315 380 TNY268 380 460 IS1 DRAIN Supply Current BYPASS Pin Charge Current IS2 VEN/UV = 0 V EN/UV Open (MOSFET Switching) See Note A, B ICH1 VBP = 0 V, TJ = 25 C See Note C, D TNY263-264 -5.5 -3.3 -1.8 TNY265-268 -7.5 -4.6 -2.5 ICH2 VBP = 4 V, TJ = 25 C See Note C, D TNY263-264 -3.8 -2.0 -1.0 TNY265-268 -4.5 -3.0 -1.5 V A A mA G 4/05 13 TNY263-268 Conditions Parameter Symbol SOURCE = 0 V; TJ = -40 to 125 C See Figure 18 (Unless Otherwise Specified) CONTROL FUNCTIONS (cont.) BYPASS Pin VBP Voltage BYPASS Pin VBPH Voltage Hysteresis EN/UV Pin Line ILUV Under-Voltage Threshold CIRCUIT PROTECTION Current Limit Initial Current Limit Leading Edge Blanking Time Current Limit Delay Thermal Shutdown Temperature Thermal Shutdown Hysteresis 14 G 4/05 ILIMIT See Note C TJ = 25 C Min Typ Max Units 5.6 5.85 6.15 V 0.80 0.95 1.20 V 44 49 54 A TNY263 TJ = 25 C di/dt = 42 mA/s See Note E 195 210 225 TNY264 TJ = 25 C di/dt = 50 mA/s See Note E 233 250 267 TNY265 TJ = 25 C di/dt = 55 mA/s See Note E 255 275 295 TNY266 TJ = 25 C di/dt = 70 mA/s See Note E 325 350 375 TNY267 TJ = 25 C di/dt = 90 mA/s See Note E 419 450 481 TNY268 TJ = 25 C di/dt = 110 mA/s See Note E 512 550 588 mA IINIT See Figure 21 TJ = 25 C 0.65 x ILIMIT(MIN) tLEB TJ = 25 C See Note F 170 tILD TJ = 25 C See Note F, G 125 mA 215 ns 150 ns 135 70 150 C C TNY263-268 Conditions Parameter Symbol SOURCE = 0 V; TJ = -40 to 125 C See Figure 18 (Unless Otherwise Specified) Min Typ Max TJ = 25 C 33 38 TJ = 100 C 50 57 TJ = 25 C 28 32 TJ = 100 C 42 48 TJ = 25 C 19 22 TJ = 100 C 29 33 TJ = 25 C 14 16 TJ = 100 C 21 24 TJ = 25 C 7.8 9.0 TJ = 100 C 11.7 13.5 TJ = 25 C 5.2 6.0 TJ = 100 C 7.8 9.0 Units OUTPUT TNY263 ID = 21 mA TNY264 ID = 25 mA ON-State Resistance RDS(ON) TNY265 ID = 28 mA TNY266 ID = 35 mA TNY267 ID = 45 mA TNY268 ID = 55 mA OFF-State Drain Leakage Current Breakdown Voltage IDSS BVDSS Rise Time tR Fall Time tF Drain Supply Voltage Output EN/UV Delay Output Disable Setup Time Auto-Restart ON-Time Auto-Restart Duty Cycle VBP = 6.2 V, VEN/UV = 0 V, VDS = 560 V, TJ = 125 C TNY263-266 50 TNY267-268 100 VBP = 6.2 V, VEN/UV = 0 V, See Note H, TJ = 25 C A 700 Measured in a Typical Flyback Converter Application V 50 ns 50 ns 50 tEN/UV See Figure 20 tDST tAR DCAR V TJ = 25 C See Note I 10 s 0.5 s 50 ms 5.6 % G 4/05 15 TNY263-268 NOTES: A. Total current consumption is the sum of IS1 and IDSS when EN/UV pin is shorted to ground (MOSFET not switching) and the sum of IS2 and IDSS when EN/UV pin is open (MOSFET switching). B Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the DRAIN. An alternative is to measure the BYPASS pin current at 6.1 V. C. BYPASS pin is not intended for sourcing supply current to external circuitry. D. See Typical Performance Characteristics section for BYPASS pin start-up charging waveform. E. For current limit at other di/dt values, refer to Figure 25. F. This parameter is derived from characterization. G. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the ILIMIT specification. H. Breakdown voltage may be checked against minimum BVDSS specification by ramping the DRAIN pin voltage up to but not exceeding minimum BVDSS. I. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency). 16 G 4/05 TNY263-268 470 5W S2 470 D EN/UV S1 S S S S BP 2 M 50 V 10 V 0.1 F 150 V NOTE: This test circuit is not applicable for current limit or output characteristic measurements. PI-2686-101700 Figure 18. TinySwitch-II General Test Circuit. DCMAX (internal signal) tP EN/UV VDRAIN tP = tEN/UV 1 fOSC PI-2364-012699 Figure 19. TinySwitch-II Duty Cycle Measurement. Figure 20. TinySwitch-II Output Enable Timing. 0.8 Figure 21. Current Limit Envelope. G 4/05 17 TNY263-268 Typical Performance Characteristics 1.0 PI-2680-012301 1.2 Output Frequency (Normalized to 25 C) PI-2213-012301 1.0 0.8 0.6 0.4 0.2 0 0.9 -50 -25 0 25 50 -50 75 100 125 150 Figure 22. Breakdown vs. Temperature. 0.6 0.4 0.2 0 50 100 100 125 PI-2697-033104 1.0 0.8 TNY263 TNY264 TNY265 TNY266 TNY267 TNY268 0.6 0.4 0.2 Normalized di/dt = 1 42 mA/s 50 mA/s 55 mA/s 70 mA/s 90 mA/s 110 mA/s Normalized Current Limit = 1 210 mA 250 mA 275 mA 350 mA 450 mA 550 mA 0 150 1 2 Temperature (C) 3 4 Normalized di/dt Figure 24. Current Limit vs. Temperature. Figure 25. Current Limit vs. di/dt. 6 5 4 3 2 1 300 TCASE = 25 C TCASE = 100 C 250 Drain Current (mA) PI-2240-012301 7 BYPASS Pin Voltage (V) 75 1.2 0 -50 50 1.4 Normalized Current Limit TNY263 TNY264-266 TNY267 TNY268 0.8 25 Figure 23. Frequency vs. Temperature. PI-2714-040704 Current Limit (Normalized to 25 C) 1 0 Junction Temperature (C) Junction Temperature (C) 1.2 -25 PI-2221-032504 Breakdown Voltage (Normalized to 25 C) 1.1 Scaling Factors: TNY263 0.85 TNY264 1.0 TNY265 1.5 TNY266 2.0 TNY267 3.5 TNY268 5.5 200 150 100 50 0 0 0 0.2 0.4 0.6 0.8 Time (ms) Figure 26. BYPASS Pin Start-up Waveform. 18 G 4/05 1.0 0 2 4 6 Drain Voltage (V) Figure 27. Output Characteristic. 8 10 TNY263-268 35 PI-2683-033104 30 Scaling Factors: TNY263 1.0 TNY264 1.0 TNY265 1.5 TNY266 2.0 TNY267 3.5 TNY268 5.5 25 100 Power (mW) Drain Capacitance (pF) 1000 Scaling Factors: TNY263 1.0 TNY264 1.0 TNY265 1.5 TNY266 2.0 TNY267 3.5 TNY268 5.5 10 20 15 PI-2225-033104 Typical Performance Characteristics (cont.) 10 5 1 0 0 100 200 300 400 500 600 0 200 Drain Voltage (V) 400 600 Drain Voltage (V) Figure 28. COSS vs. Drain Voltage. Figure 29. Drain Capacitance Power. PI-2698-012301 Under-Voltage Threshold (Normalized to 25 C) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 Junction Temperature (C) Figure 30. Under-voltage Threshold vs. Temperature. G 4/05 19 TNY263-268 PART ORDERING INFORMATION TinySwitch Product Family Series Number Package Identifier G Plastic Surface Mount SMD-8B P Plastic DIP-8B Lead Finish Blank Standard (Sn Pb) N Pure Matte Tin (Pb-Free) Tape & Reel and Other Options Blank Standard Configurations TNY 264 G N - TL TL Tape & Reel, 1 k pcs minimum, G Package only DIP-8B D S .004 (.10) -E- .137 (3.48) MINIMUM .240 (6.10) .260 (6.60) Pin 1 -D- .125 (3.18) .145 (3.68) -T- SEATING PLANE .100 (2.54) BSC 20 G 4/05 .367 (9.32) .387 (9.83) .057 (1.45) .068 (1.73) (NOTE 6) Notes: 1. Package dimensions conform to JEDEC specification MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP) package with .300 inch row spacing. 2. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 4. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. The notch and/or dimple are aids in locating Pin 1. Pin 6 is omitted. 5. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 6. Lead width measured at package body. 7. Lead spacing measured with the leads constrained to be perpendicular to plane T. .015 (.38) MINIMUM .120 (3.05) .140 (3.56) .048 (1.22) .053 (1.35) .014 (.36) .022 (.56) T E D S .010 (.25) M .008 (.20) .015 (.38) .300 (7.62) BSC (NOTE 7) .300 (7.62) .390 (9.91) P08B PI-2551-121504 TNY263-268 SMD-8B D S .004 (.10) .137 (3.48) MINIMUM -E- .372 (9.45) .388 (9.86) E S .010 (.25) .240 (6.10) .260 (6.60) Pin 1 .100 (2.54) (BSC) -D- .367 (9.32) .387 (9.83) .057 (1.45) .068 (1.73) (NOTE 5) .125 (3.18) .145 (3.68) .032 (.81) .037 (.94) .048 (1.22) .053 (1.35) Notes: 1. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 2. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. .420 3. Pin locations start with Pin 1, and continue counter-clock.046 .060 .060 .046 wise to Pin 8 when viewed from the top. Pin 6 is omitted. 4. Minimum metal to metal .080 spacing at the package body Pin 1 for the omitted lead location is .137 inch (3.48 mm). .086 5. Lead width measured at .186 package body. .286 6. D and E are referenced Solder Pad Dimensions datums on the package body. .004 (.10) .009 (.23) .004 (.10) .012 (.30) .036 (0.91) .044 (1.12) 0- 8 G08B PI-2546-121504 G 4/05 21 TNY263-268 22 G 4/05 TNY263-268 Revision Notes Date A - 3/01 B 1) Corrected first page spacing and sentence in description describing innovative design. 2) Corrected Frequency Jitter in Figure 4 and Frequency Jitter in Parameter Table. 3) Added last sentence to Over Temperature Protection section. 4) Clarified detecting when there is no external resistor connected to the EN/UV pin. 5) Corrected Figure 6 and its description in the text. 6) Corrected formatting, grammer and style errors in text and figures. 7) Corrected and moved Worst Case EMI & Efficiency Measurement section. 8) Added PC Board Cleaning section. 9) Replaced Figure 21 and SMD-8B Package Drawing. 7/01 C 1) Corrected JA for P/G package. 2) Updated Figures 15 and 16 and text description for Zener performance. 3) Corrected DIP-8B and SMD-8B Package Drawings. 4/03 D 1) Corrected EN/UV under-voltage threshold in text. 2) Corrected 2 M connected between positive DC input to EN/UV pin in text and Figures 15 and 16. 3/04 E 1) Added TNY263 and TNY265. 4/04 F 1) Added lead-free ordering information. 12/04 G 1) Typographical correction in OFF-STATE Drain Leakage Current parameter condition. 2) Removed IDS condition from BVDSS parameter and added new Note H. 3) Added Note 4 to Absolute Maximum Ratings specifications. 4/05 G 4/05 23 TNY263-268 For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. PATENT INFORMATION The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. LIFE SUPPORT POLICY POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. 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