1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
 
NPN Silicon
MAXIMUM RATINGS
Rating Symbol Value Unit
Collector–Emitter Voltage VCEO 25 Vdc
Collector–Base Voltage VCBO 30 Vdc
Emitter–Base Voltage VEBO 3.0 Vdc
DEVICE MARKING
MMBTH10LT1 = 3EM
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation FR-5 Board (1)
TA = 25°C
Derate above 25°C
PD225
1.8
mW
mW/°C
Thermal Resistance Junction to Ambient RθJA 556 °C/W
Total Device Dissipation
Alumina Substrate, (2) TA = 25°C
Derate above 25°C
PD300
2.4
mW
mW/°C
Thermal Resistance Junction to Ambient RθJA 417 °C/W
Junction and Storage Temperature TJ, Tstg 55 to +150 °C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage (IC = 1.0 mAdc, IB = 0) V(BR)CEO 25 Vdc
Collector–Base Breakdown Voltage (IC = 100 µAdc, IE = 0) V(BR)CBO 30 Vdc
Emitter–Base Breakdown Voltage (IE = 10 µAdc, IC = 0) V(BR)EBO 3.0 Vdc
Collector Cutof f Current (VCB = 25 Vdc, IE = 0) ICBO 100 nAdc
Emitter Cutof f Current (VEB = 2.0 Vdc, IC = 0) IEBO 100 nAdc
1. FR–5 = 1.0 x 0.75 x 0.062 in.
2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina
Thermal Clad is a registered trademark of the Berquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by MMBTH10LT1/D

SEMICONDUCTOR TECHNICAL DATA

CASE 318-08, STYLE 6
SOT-23 (TO-236AB)
1
2
3
Motorola Preferred Device
Motorola, Inc. 1997
COLLECTOR
3
1
BASE
2
EMITTER
MMBTH10LT1
2 Motorola Small–Signal Transistors, FETs and Diodes Device Data
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Typ Max Unit
ON CHARACTERISTICS
DC Current Gain (IC = 4.0 mAdc, VCE = 10 Vdc) hFE 60
Collector–Emitter Saturation V oltage (IC = 4.0 mAdc, IB = 0.4 mAdc) VCE(sat) 0.5 Vdc
Base–Emitter On Voltage (IC = 4.0 mAdc, VCE = 10 Vdc) VBE 0.95 Vdc
SMALL–SIGNAL CHARACTERISTICS
Current–Gain – Bandwidth Product
(IC = 4.0 mAdc, VCE = 10 Vdc, f = 100 MHz) fT650 MHz
Collector–Base Capacitance
(VCB= 10 Vdc, IE = 0, f = 1.0 MHz) Ccb 0.7 pF
Common–Base Feedback Capacitance
(VCB= 10 Vdc, IE = 0, f = 1.0 MHz) Crb 0.65 pF
Collector Base T ime Constant
(IC= 4.0 mAdc, VCB = 10 Vdc, f = 31.8 MHz) rbCc 9.0 ps
TYPICAL CHARACTERISTICS
600
f, FREQUENCY (MHz)
Figure 1. Rectangular Form
gib (mmhos)
Figure 2. Polar Form
f, FREQUENCY (MHz)
Figure 3. Rectangular Form
gfb (mmhos)
Figure 4. Polar Form
70 60 50 10 0 10
0204060
0
80100
70
60
50
40
30
20
0
60
30
20
10
10 30 50 70
–10
10
200 300 400 500 700 1000
80
–20
–30
–40
–50
–60
40 30 20 20 30
50
40
100 200 300 400 500 700 1000
0
–10
–20
–30
30
20
10
40
70
60
50
bfb
–gfb
100
200 400
700
1000 MHz
1000 MHz
100
200
400
700
gib
–bib
jb (mmhos)
ib
jb (mmhos)
fb
, FORWARD TRANSFER ADMITTANCE (mmhos) , INPUT ADMITTANCE (mmhos)
ib
yfb, FORWARD TRANSFER ADMITTANCE
COMMON–BASE y PARAMETERS versus FREQUENCY
(VCB = 10 Vdc, IC = 4.0 mAdc, TA = 25°C)
yib, INPUT ADMITTANCE
ib yy
MMBTH10LT1
3
Motorola Small–Signal Transistors, FETs and Diodes Device Data
TYPICAL CHARACTERISTICS
f, FREQUENCY (MHz)
Figure 5. Rectangular Form
grb (mmhos)
Figure 6. Polar Form
f, FREQUENCY (MHz)
Figure 7. Rectangular Form
gob (mmhos)
Figure 8. Polar Form
0 2.0 4.0 6.0 8.0 10
–2.0 –1.2 –0.4 0.4
0
5.0 1.2 2.0
10
4.0
2.0
0
–1.8 –0.8 0 0.8 1.6
8.0
6.0
4.0
3.0
2.0
1.0
100
4.0
3.0
1.0
0200 300 400 500 700 1000
5.0
100 200 300 400 500 700 1000
0
3.0
2.0
1.0
4.0
7.0
6.0
5.0
10
9.0
8.0
2.0
bob
gob
–brb –brb
–grb
MPS H11
MPS H10
100
200
400
700
1000 MHz
100
200
400
700
1000 MHz
jb (mmhos)
rb
jb (mmhos)
ob
, OUTPUT ADMITTANCE (mmhos)
ob , REVERSE TRANSFER ADMITTANCE (mmhos)
rb
yob, OUTPUT ADMITTANCE
COMMON–BASE y PARAMETERS versus FREQUENCY
(VCB = 10 Vdc, IC = 4.0 mAdc, TA = 25°C)
yrb, REVERSE TRANSFER ADMITTANCE
yy
MMBTH10LT1
4 Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT–23
mm
inches
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD = TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T A of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD = 150°C – 25°C
556°C/W = 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and soldering
should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
MMBTH10LT1
5
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PACKAGE DIMENSIONS
CASE 318–08
ISSUE AF
SOT–23 (TO–236AB)
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
DJ
K
L
A
C
BS
H
GV
3
12DIM
AMIN MAX MIN MAX
MILLIMETERS
0.1102 0.1197 2.80 3.04
INCHES
B0.0472 0.0551 1.20 1.40
C0.0350 0.0440 0.89 1.11
D0.0150 0.0200 0.37 0.50
G0.0701 0.0807 1.78 2.04
H0.0005 0.0040 0.013 0.100
J0.0034 0.0070 0.085 0.177
K0.0140 0.0285 0.35 0.69
L0.0350 0.0401 0.89 1.02
S0.0830 0.1039 2.10 2.64
V0.0177 0.0236 0.45 0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIUMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
MMBTH10LT1
6 Motorola Small–Signal Transistors, FETs and Diodes Device Data
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MMBTH10LT1/D