SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Member of the Texas Instruments
Widebus Family
D
DOC Circuitry Dynamically Changes
Output Impedance, Resulting in Noise
Reduction Without Speed Degradation
D
Dynamic Drive Capability Is Equivalent to
Standard Outputs With IOH and IOL of
±24 mA at 2.5-V VCC
D
Control Inputs VIH/VIL Levels are
Referenced to VCCB Voltage
D
If Either VCC Input Is at GND, Both Ports
Are in the High-Impedance State
D
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
D
Ioff Supports Partial-Power-Down Mode
Operation
D
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.4-V to
3.6-V Power Supply Range
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The
A-port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed
to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCB164245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74A VCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB.
T o ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND,
both ports are in the high-impedance state.
Copyright 2002, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DOC and Widebus are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
terminal assignments
DGG OR DGV PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA
2A5
2A6
GND
2A7
2A8
2OE
terminal assignments
123456
A1DIR NC NC NC NC 1OE
B1B2 1B1 GND GND 1A1 1A2
C1B4 1B3 VCCB VCCA 1A3 1A4
D1B6 1B5 GND GND 1A5 1A6
E1B8 1B7 1A7 1A8
F2B1 2B2 2A2 2A1
G2B3 2B4 GND GND 2A4 2A3
H2B5 2B6 VCCB VCCA 2A6 2A5
J2B7 2B8 GND GND 2A8 2A7
K2DIR NC NC NC NC 2OE
NC – No internal connection
GQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
213465
K
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
TSSOP – DGG Tape and reel SN74AVCB164245GR AVCB164245
–40°C to 85°CTVSOP – DGV Tape and reel SN74AVCB164245VR WB4245
VFBGA – GQL Tape and reel SN74AVCB164245KR WB4245
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE DIR
OPERATION
L L B data to A bus
LH A data to B bus
H X Isolation
logic diagram (positive logic)
To Seven Other Channels
1DIR
1A1
1B1
1OE
To Seven Other Channels
2DIR
2A1
2B1
2OE
1
47
24
36
48
2
25
13
Pin numbers shown are for the DGG and DGV packages.
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCCA and VCCB –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1): I/O ports (A port) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports (B port) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control inputs –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1): (A port) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(B port) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2): (A port) –0.5 V to VCCA + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(B port) –0.5 V to VCCB + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCCA, VCCB, or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 3): DGG package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GQL package 28°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Notes 4 through 6)
VCCI VCCO MIN MAX UNIT
VCCA Supply voltage 1.4 3.6 V
VCCB Supply voltage 1.4 3.6 V
Hi h l l i t
1.4 V to 1.95 V VCCI ×0.65 VCCI
VIH High-level input
voltage
Data inputs 1.95 V to 2.7 V 1.7 VCCI V
voltage
2.7 V to 3.6 V 2 VCCI
Lllit
1.4 V to 1.95 V 0 VCCI ×0.35
VIL Low-level input
voltage
Data inputs 1.95 V to 2.7 V 0 0.7 V
voltage
2.7 V to 3.6 V 0 0.8
Hi h l l i t
Ctli t
1.4 V to 1.95 V VCCB ×0.65 VCCB
VIH High-level input
voltage
Control inputs
(Referenced to VCCB)
1.95 V to 2.7 V 1.7 VCCB V
voltage
(Referenced
to
VCCB)
2.7 V to 3.6 V 2 VCCB
Lllit
Ctli t
1.4 V to 1.95 V 0 VCCB ×0.35
VIL Low-level input
voltage
Control inputs
(Referenced to VCCB)
1.95 V to 2.7 V 0 0.7 V
voltage
(Referenced
to
VCCB)
2.7 V to 3.6 V 0 0.8
VOOutput voltage 0 VCCO V
1.4 V to 1.6 V –2
IOH
High level out
p
ut current
1.65 V to 1.95 V –4
mA
I
OH
High
-
level
output
current
2.3 V to 2.7 V –8
mA
3 V to 3.6 V –12
1.4 V to 1.6 V 2
IOL
Low level out
p
ut current
1.65 V to 1.95 V 4
mA
I
OL
Low
-
level
output
current
2.3 V to 2.7 V 8
mA
3 V to 3.6 V 12
∆t/∆vInput transition rise or fall rate 5 ns/V
TAOperating free-air temperature –40 85 °C
NOTES: 4. VCCI is the VCC associated with the data input port.
5. VCCO is the VCC associated with the output port.
6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Note 7 and 8)
PARAMETER TEST CONDITIONS VCCA VCCB MIN TYP†MAX UNIT
IOH = –100 µA VI = VIH 1.4 V to 3.6 V 1.4 V to 3.6 V VCCO–0.2 V
IOH = –2 mA VI = VIH 1.4 V 1.4 V 1.05
VOH IOH = –4 mA VI = VIH 1.65 V 1.65 V 1.2 V
IOH = –8 mA VI = VIH 2.3 V 2.3 V 1.75
IOH = –12 mA VI = VIH 3 V 3 V 2.3
IOH = 100 µA VI = VIL 1.4 V to 3.6 V 1.4 V to 3.6 V 0.2
IOH = 2 mA VI = VIL 1.4 V 1.4 V 0.35
VOL IOH = 4 mA VI = VIL 1.65 V 1.65 V 0.45 V
IOH = 8 mA VI = VIL 2.3 V 2.3 V 0.55
IOH = 12 mA VI = VIL 3 V 3 V 0.7
IIControl inputs VI = VCCB or GND 1.4 V to 3.6 V 3.6 V ±2.5 µA
Iff
A port
VIor VO=0to36V
0 V 0 to 3.6 V ±10
I
off B port
V
I
or
V
O =
0
to
3
.
6
V
0 to 3.6 V 0 V ±10 µ
‡
A or B ports
V V GND
OE = VIH 3.6 V 3.6 V ±12.5
IOZ
‡
B port VO = VCCO or GND,
VI
=
VCCI or GND
OE = don’t0 V 3.6 V ±12.5 µA
A port
VI
=
VCCI
or
GND
care 3.6 V 0 V ±12.5
1.6 V 1.6 V 20
1.95 V 1.95 V 20
ICCA
VI=V
CCI or GND
IO=0
2.7 V 2.7 V 30
I
CCA
V
I =
V
CCI
or
GND
,
I
O =
0
0 V 3.6 V –40 µ
3.6 V 0 V 40
3.6 V 3.6 V 40
1.6 V 1.6 V 20
1.95 V 1.95 V 20
ICCB
VI=V
CCI or GND
IO=0
2.7 V 2.7 V 30
I
CCB
V
I =
V
CCI
or
GND
,
I
O =
0
0 V 3.6 V 40 µ
3.6 V 0 V –40
3.6 V 3.6 V 40
CiControl inputs VI = 3.3 V or GND 3.3 V 3.3 V 4 pF
Cio A or B ports VO = 3.3 V or GND 3.3 V 3.3 V 5 pF
†All typical values are at TA = 25°C.
‡For I/O ports, the parameter IOZ includes the input leakage current.
NOTES: 7. VCCO is the VCC associated with the output port.
8. VCCI is the VCC associated with the input port.
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCCA = 1.5 V ± 0.1 V (see Figure 2)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
td
A B 1.7 6.7 1.9 6.3 1.8 5.5 1.7 5.8
ns
t
pd B A 1.8 6.8 2.2 7.4 2.1 7.6 2.1 7.3
ns
t
OE A 2.5 8.4 2.4 7.4 2.1 5.2 1.9 4.2
ns
t
en OE B 2.1 9 2.9 9.8 3.2 10 3 9.8
ns
tdi
OE A 2.2 6.9 2.3 6.1 1.3 3.6 1.3 3
ns
t
dis OE B 2.1 7.1 2.3 6.4 1.7 5.1 1.6 4.8
ns
switching characteristics over recommended operating free-air temperature range,
VCCA = 1.8 V ± 0.15 V (see Figure 2)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
td
A B 1.7 6.4 1.8 6 1.7 4.7 1.6 4.3
ns
t
pd B A 1.4 5.5 1.8 6 1.8 5.8 1.8 5.5
ns
t
OE A 2.6 8.5 2.5 7.5 2.2 5.3 1.9 4.2
ns
t
en OE B 1.8 7.6 2.6 7.7 2.6 7.6 2.6 7.4
ns
tdi
OE A 2.3 7 2.3 6.1 1.3 3.6 1.3 3
ns
t
dis OE B 1.8 7 2.5 6.3 1.8 4.7 1.7 4.4
ns
switching characteristics over recommended operating free-air temperature range,
VCCA = 2.5 V ± 0.2 V (see Figure 2)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
td
A B 1.6 6 1.8 5.6 1.5 4 1.4 3.4
ns
t
pd B A 1.3 4.6 1.7 4.4 1.5 4 1.4 3.7
ns
t
OE A 3.1 8.5 2.5 7.5 2.2 5.3 1.9 4.2
ns
t
en OE B 1.7 5.7 2.2 5.5 2.2 5.3 2.2 5.1
ns
tdi
OE A 2.4 7 3 6.1 1.4 3.6 1.2 3
ns
t
dis OE B 1.2 5.8 1.9 5 1.4 3.6 1.3 3.3
ns
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCCA = 3.3 V ± 0.3 V (see Figure 2)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
td
A B 1.5 5.9 1.7 5.4 1.5 3.7 1.4 3.1
t
pd B A 1.3 4.5 1.6 3.8 1.5 3.3 1.4 3.1
t
OE A 2.6 8.3 2.5 7.4 2.2 5.2 1.9 4.1
t
en OE B 1.6 4.9 2 4.5 2 4.3 1.9 4.1
tdi
OE A 2.3 7 3 6 1.3 3.5 1.2 3.5
t
dis OE B 1.3 6.9 2.1 5.5 1.6 3.8 1.5 3.5
operating characteristics, VCCA and VCCB = 3.3 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Power dissipation capacitance per transceiver, Outputs enabled 14
CpdA A port input, B port output Outputs disabled
CL=0
f=10MHz
7p
dA
(VCCA)Power dissipation capacitance per transceiver, Outputs enabled
CL
=
0
,
f
=
10
MHz
20
B port input, A port output Outputs disabled 7
Power dissipation capacitance per transceiver, Outputs enabled 20
CpdB A port input, B port output Outputs disabled
CL=0
f=10MHz
7p
dB
(VCCB)Power dissipation capacitance per transceiver, Outputs enabled
C
L =
0
,
f
=
10
MHz
14
,
B port input, A port output Outputs disabled 7
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
output description
The DOC circuitry is implemented, which, during the transition, initially lowers the output impedance to
effectively drive the load and, subsequently , raises the impedance to reduce noise. Figure 1 shows typical VOL
vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the
beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC ) Circuitry
Technology and Applications, literature number SCEA009.
136 –128–144–160
0.4
0.8
1.2
1.6
2.0
2.4
2.8
17015311910285685134170
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2 TA = 25°C
Process = Nominal
IOL – Output Current – mA
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
– Output Voltage – V
OL
V
TA = 25°C
Process = Nominal
IOH – Output Current – mA
VCC = 3.3 V VCC = 2.5 V
VCC = 1.8 V
– Output Voltage – V
OH
V
–80–96–112 –32–48–64 0–16
Figure 1. Typical Output Voltage vs Output Current
SN74AVCB164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES394 – JUNE 2002
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOH
VOL
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
2 × VCCO
Open
GND
RL
RL
tPLH tPHL
Output
Control
(low-level
enabling)
Output
W aveform 1
S1 at 2 × VCCO
(see Note B)
Output
W aveform 2
S1 at GND
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
VCCB/2VCCB/2
VCCI/2 VCCI/2 VCCI
0 V
VCCO/2 VCCO/2
VOH
VOL
0 V
VCCO/2 VOL + VTP
VCCO/2 VOH – VTP
0 V
VCCI
0 V
VCCI/2 VCCI/2
tw
Input
VCCB
VCCO
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
Input
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
v
10 MHz, ZO = 50 Ω, dv/dt ≥1 V/ns,
dv/dt ≥1 V/ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2 kΩ
1 kΩ
500 Ω
500 Ω
VCCO RL0.1 V
0.15 V
0.15 V
0.3 V
VTP
CL
15 pF
30 pF
30 pF
30 pF
Figure 2. Load Circuit and Voltage Waveforms
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
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