90308 MS PC/61199RM(KI) No.6183-1/15
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer
'
s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
'
sproductsor
equipment.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
LB11847
Overview
The LB11847 is a driver IC for stepping motors with PWM current control bipolar drive (fixed OFF time). A special
feature of this IC is that VREF voltage is constant while the current can be set in 15 steps, allowing drive of motors ranging
from 1-2 phase exciter types to 4W 1-2 phase exciter types. The current decay pattern can also be selected (SLOW
DECAY, FAST DECAY, MIX DECAY) to increase the decay of regenerative current at chopping OFF, thereby
improving response characteristics. This is especially useful for carriage and paper feed stepping motors in printers and
similar applications where highprecision control and low vibrations are required.
Features
PWM current control (fixed OFF time)
Load current digital selector (1-2, W1-2, 2W1-2, 4W1-2 phase exciter drive possible)
Selectable current decay pattern (SL OW DECAY, FAST DECAY, MIX DECAY)
Simultaneous ON prevention function (feedthrough current prevention)
Noise canceler
Built-in thermal shutdown circuit
Built-in logic low-vo ltage OFF circuit
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter Symbol Conditions Ratings Unit
Motor supply voltage VBB 50 V
Output peak current IOPEAK t
W 20μs 1.75 A
Output continuous current IO max 1.5 A
Logic supply voltage VCC 7.0 V
Logic input voltage range VIN -0.3 to VCC V
Emitter output voltage VE 1.0 V
Continued on next page.
Monolithic Digital IC
PWM Current Control Type
Stepping Motor Driver
Orderin
g
numbe
r
: EN6183A
LB11847
No.6183-2/15
Continued from preceding page.
Parameter Symbol Conditions Ratings Unit
Ta = 25°C 3.0 W Allowable power dissipation Pd max
With heat sink 20 W
Operating temperature Topr -20 to +85 °C
Storage temperature Tstg -55 to +150 °C
Allowable Operating Conditions at Ta = 25°C
Parameter Symbol Conditions Ratings Unit
Motor supply voltage range VBB 10 to 45 V
Logic supply voltage range VCC 4.75 to 5.25 V
Reference voltage range VREF 0.0 to 3.0 V
Electrical Characteristics at Ta = 25°C, VBB = 45V, VCC = 5V, VREF = 1.52V
Ratings
Parameter Symbol Conditions min typ max
Unit
Output block
IBB ON 2.3 3.5 5.0 mA Output stage supply voltage
IBB OFF 0.5 0.8 1.1 mA
VO(sat) 1 IO = +1.0A, sink 1.2 1.6 V
VO(sat) 2 IO = +1.5A, sink 1.5 1.9 V
VO(sat) 3 IO = -1.0A, source 1.9 2.2 V
Output saturation voltage
VO(sat) 4 IO = -1.5A, source 2.2 2.4 V
IO(leak) 1 VO = VBB, sink 50 μA Output leak current
IO(leak) 2 VO = 0V, source -50 μA
Output sustain voltage VSUS L = 15 mH, IO = 1.5A, Guaranteed design value 45 V
Logic block
ICC ON I
4 = 2.0V, I3 = 2.0V, I2 = 2.0V, I1 = 2.0V 19.5 26 36.5 mA Logic supply current
ICC OFF ENABLE = 2.0V 10.5 15 19.5 mA
VIH 2.0 V Input voltage
VIL 0.8 V
IIH V
IH = 2.0V 100 μA Input current
IIL V
IL = 0.8V -10 μA
I4 = 2.0V, I3 = 2.0V, I2 = 2.0V, I1 = 2.0V 0.470 0.50 0.525 V
I4 = 2.0V, I3 = 2.0V, I2 = 2.0V, I1 = 0.8V 0.445 0.48 0.505 V
I4 = 2.0V, I3 = 2.0V, I2 = 0.8V, I1 = 2.0V 0.425 0.46 0.485 V
I4 = 2.0V, I3 = 2.0V, I2 = 0.8V, I1 = 0.8V 0.410 0.43 0.465 V
I4 = 2.0V, I3 = 0.8V, I2 = 2.0V, I1 = 2.0V 0.385 0.41 0.435 V
I4 = 2.0V, I3 = 0.8V, I2 = 2.0V, I1 = 0.8V 0.365 0.39 0.415 V
I4 = 2.0V, I3 = 0.8V, I2 = 0.8V, I1 = 2.0V 0.345 0.37 0.385 V
I4 = 2.0V, I3 = 0.8V, I2 = 0.8V, I1 = 0.8V 0.325 0.35 0.365 V
I4 = 0.8V, I3 = 2.0V, I2 = 2.0V, I1 = 2.0V 0.280 0.30 0.325 V
I4 = 0.8V, I3 = 2.0V, I2 = 2.0V, I1 = 0.8V 0.240 0.26 0.285 V
I4 = 0.8V, I3 = 2.0V, I2 = 0.8V, I1 = 2.0V 0.195 0.22 0.235 V
I4 = 0.8V, I3 = 2.0V, I2 = 0.8V, I1 = 0.8V 0.155 0.17 0.190 V
I4 = 0.8V, I3 = 0.8V, I2 = 2.0V, I1 = 2.0V 0.115 0.13 0.145 V
Sensing voltage VE
I4 = 0.8V, I3 = 0.8V, I2 = 2.0V, I1 = 0.8V 0.075 0.09 0.100 V
Reference current IREF V
REF = 1.5V -0.5 μA
CR pin current ICR CR = 1.0V -4.6 -1.0 mA
MD pin current IMD MD = 1.0V, CR = 4.0V -5.0 μA
DECAY pin current Low IDECL V
DEC = 0.8V -10 μA
DECAY pin current High IDECH V
DEC = 2.0V 5 μA
Thermal shutdown temperature TSD 170 °C
Logic ON voltage LVSD1 3.35 3.65 3.95 V
Logic OFF voltage LVSD2 3.20 3.50 3.80 V
LVSD hysteresis width ΔLVSD 0.065 0.15 0.23 V
LB11847
No.6183-3/15
Package Dimensions
unit : mm (typ)
3147C
Pin Assignment
SANYO : DIP28H(500mil)
114
28 15
0.4
0.6
4.04.0
26.75
20.0
R1.7
8.4
(1.81) 1.78 1.0
12.7
11.2
Pd max – Ta
0
20
15
10
5
25
20 80
20.0
10.4
1.56
3.0
6020 400 100
Independent IC
With an arbitrary large heat sink
Ambient temperature, Ta °C
Allowable power dissipation, Pd max W
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
PHASE1
ENABLE1
IA1
IA2
IA3
IA4
IB4
IB3
IB2
IB1
ENABLE2
PHASE2
GND
MD
VREF1
CR1
E1
DECAY1
OUTA
OUTA
OUTB
OUTB
DECAY2
E2
CR2
VREF2
VBB
LB11847
Top view
LB11847
No.6183-4/15
Pin Function
Pin number Pin name Function descripyion
1 MD Sets the OFF time for FAST mode and SLOW mode in MIX DECAY.
Setting input range: 4V to 1.5V
2
13
VREF1
VREF2
Output set current reference supply pins.
Setting voltage range: 0V to 3V
3
12
CR1
CR2
Output OFF time setting pins for switching operation.
4
11
E1
E2
Pins for controlling the set current with sensing resistor RE.
5
10
DECAY1
DECYA2
SLOW mode/FAST mode selector pins.
SLOW DECAY : H
FAST DECAY : L
6
7
8
9
OUT A
OUT A
OUT B
OUT B
Output pins.
14 VBB Output stage supply voltage pin.
15 GND Ground pin.
27
16
PHASE1
PHASE2
Output phase selector input pins.
26
17
ENABLE1
ENABLE2
Output ON/OFF setting input pins.
22, 23
24, 25
21, 20
19, 18
IA4, IA3
IA2, IA1
IB4, IB3
IB2, IB1
Output set current digital input pins.
15-stage voltage setting.
28 VCC Logic block supply voltage pin.
Truth Table
PHASE ENABLE OUT
A OUT
A
H L H L
L L L H
- H OFF OFF
Set Current Truth Table
IA4 IA3 IA2 IA1 Set current IOUT Current ratio (%)
1 1 1 1 11.5/11.5 × VREF/3.04RE = IOUT 100
1 1 1 0 11.0/11.5 × VREF/3.04RE = IOUT 95.65
1 1 0 1 10.5/11.5 × VREF/3.04RE = IOUT 91.30
1 1 0 0 10.0/11.5 × VREF/3.04RE = IOUT 86.95
1 0 1 1 9.5/11.5 × VREF/3.04RE = IOUT 82.61
1 0 1 0 9.0/11.5 × VREF/3.04RE = IOUT 78.26
1 0 0 1 8.5/11.5 × VREF/3.04RE = IOUT 73.91
1 0 0 0 8.0/11.5 × VREF/3.04RE = IOUT 69.56
0 1 1 1 7.0/11.5 × VREF/3.04RE = IOUT 60.87
0 1 1 0 6.0/11.5 × VREF/3.04RE = IOUT 52.17
0 1 0 1 5.0/11.5 × VREF/3.04RE = IOUT 43.48
0 1 0 0 4.0/11.5 × VREF/3.04RE = IOUT 34.78
0 0 1 1 3.0/11.5 × VREF/3.04RE = IOUT 26.08
0 0 1 0 2.0/11.5 × VREF/3.04RE = IOUT 17.39
* Current ratio (%) is the calculated set current value.
Current Decay Switching Truth Table
Current decay mode DECAY pin MD pin Output chopping
SLOW DECAY H L Upper-side chopping
FAST DECAY L L Dual-side chopping
MIX DECAY L 4V to 1.5V input
voltage setting
CR voltage > MD : dual-side chopping
CR voltage < MD : upper-side chopping
LB11847
No.6183-5/15
Block Diagram
Control logic
circuit
Thermal shutdown
circuit
Control logic
circuit
Cuttent
selector
circuit
Cuttent
selector
circuit
One-shot
multi-
blanking
circuit
One-shot
multi-
blanking
circuit
MD
PHASE1
DECAY1
ENABLE1
IA1
IA2
IA3
IA4
VREF1
GND
VCC
OUTB
OUTB
VBB
OUTA
OUTA
PHASE2
DECAY2
ENABLE2
IB1
IB2
IB3
IB4
VREF2
CR1 E1 E2 CR2
LB11847
No.6183-6/15
Sequence Table
Phase A Phase B
No. IA4 IA3 IA2 IA1 ENA1 PHA1 IOUT I
B4I
B3I
B2I
B1 ENA2 PHA2 IOUT
Phase
1-2
Phase
W1-2
Phase
2W1-2
Phase
4W1-2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
100%
100
100
95.65
91.30
86.95
82.61
78.26
73.91
69.56
60.87
52.17
43.48
34.78
26.08
17.39
0
17.39
26.08
34.78
43.48
52.17
60.87
69.56
73.91
78.26
82.61
86.95
91.30
95.65
100
100
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0%
17.39
26.08
34.78
43.48
52.17
60.87
69.56
73.91
78.26
82.61
86.95
91.30
95.65
100
100
100
100
100
95.65
91.30
86.95
82.61
78.26
73.91
69.56
60.87
52.17
43.48
34.78
26.08
17.39
* : Iout percentage (%) is the calculated setting value.
LB11847
No.6183-7/15
Switch Timing Chart during PWM Drive
Output pin
RC pin
Output pin
E pin
Output pin
RC pin
Output pin
E pin
tn
Switching waveform
Switching waveform
Noise spike
FAST DECAY
SLOW DECAY (upper-side chopping)
DECAY pin : High
DECAY pin : High
MD pin : Low
MD pin : Low
LB11847
No.6183-8/15
t
on : Output ON time
t
off : Output OFF time
t
m : FAST DECAY time in MIX DECAY mode
t
n : Noise cancelling time
MIX DECAY logic setting
DECAY pin : L
MD pin : 1.5V to 4.0V voltage setting
CR voltage and MD pin voltage are compared to select dual-side chopping
or upper-side chopping.
CR voltage > MD pi n v ol t a g e: dual -si de c h op pi n g
CR voltage < MD pi n v ol t a g e : top -si de choppinng
tm
tn
Switching wavwform
Output pin
RC pin
Output pin
E pin
MIX DECAY
t off
t on
Noise spike
LB11847
No.6183-9/15
SLOW DECAY current path
Regenerative current during upper-side transistor switching operation
Current path in FAST DECAY mode
ON
Constant Sensing voltage comparato
r
Current path at output ON
Regenerative circuit
when upper-side transistor is OFF
Sensing voltage comparato
r
Current path at output ON
Current path in FAST DECAY mode
ON
OUTASBD
SBD
Re
OUTA
VBB
OFF
ON
ON
OFF
OUTASBD
SBD
Re
VBB
OFF
OUTA
LB11847
No.6183-10/15
Composite Vectors of Set Current (1 step normalized to 90°)
No. θ Rotation angles Composite vectors
0 θ0 0° 100.0
1 θ1 9.87° 101.5
2 θ2 14.6° 103.35
3 θ3 20.0° 101.78
4 θ4 25.5° 101.12
5 θ5 30.96° 101.4
6 θ6 36.38° 102.61
7 θ7 41.63° 104.7
8 θ8 45.0° 104.5
9 θ9 48.37° 104.7
10 θ10 53.62° 102.61
11 θ11 59.04° 101.4
12 θ12 64.5° 101.12
13 θ13 70.0° 101.78
14 θ14 75.4° 103.35
15 θ15 80.13° 101.5
16 θ16 90.0° 100.0 * Rotation angle and composite spectrum are calculated values.
Phase B
IOUT
Phase A
IOUT
16 15 14 13
12 11 10
9
8
7
6
5
4
3
2
1
0
Sequence No.
LB11847
No.6183-11/15
Set Current Waveform Model
IOUT
IOUT
Phase A
Phase B
PHASE1
PHASE2
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
LB11847
No.6183-12/15
Sample Application Circuit
Notes on Usage
1. External diodes
Because this IC uses upper-side transistor switching in SLOW DECAY mode and dual-side transistor switching in
FAST DECAY mode, it req uires external diodes bet ween the OUT pins and ground fo r the regene rative current during
switching OFF. Use Schottky barrier diodes with low VF.
2. VREF pin
Because the VREF pin serves for input of the set current reference voltage, precautions against noise must be taken.
The input voltage range is 0 to 3.0V.
3. GND pin
The ground circuit for this IC must be designed so as to allow for high-current switching. Blocks where high current
flows must use low-impedance patterns and must be removed from small-signal lines. Especially the ground
connection fo r the sensi ng resi stor RE at pi n E, an d the gro und c onnect ion for t he Sch ottk y barrie r di ode s shoul d be in
close proxim i ty to the IC gro un d.
The capacitors between VCC and ground, and VBB and ground should be placed close to the VCC and VBB pins,
respectively.
1.5V to 4.0V
voltage setting
Logic input
28 27 26 25 24 23 22 21 20 19 18 17 16 15
1 2 3 4 5 6 7 8 9 10 11 12 13 14
VCC
PHASE1
ENABLE1
IA1
IA2
IA3
IA4
IB4
IB3
IB2
IB1
ENABLE2
PHASE2
GND
MD
VREF1
CR1
E1
DECAY1
OUTA
OUTA
OUTB
OUTB
DECAY2
E2
CR2
VREF2
VBB
10μF5V
470pF
470pF
47μF
42V
0.51Ω
0.51Ω 15kΩ
15kΩ
1.5V
SBD
SBD SBD
SBD
LL
LB11847
LB11847
No.6183-13/15
4. Simult aneou s ON prevention fu nct i o n
This IC incorporates a circu it to prevent feedthrough current when phase switching. For reference, the output ON and
OFF delay times at PHASE and ENABLE switching are given below.
Reference data * typical value
Sink side Source side
ON delay time 1.9μs 2.2μs PHASE switching
(Low High) OFF delay time 0.8μs 1.8μs
ON delay time 1.4μs 1.7μs PHASE switching
(High Low) OFF delay time 0.9μs 1.35μs
ON delay time 2.15μs 2.75μs ENABLE switching
OFF delay time 1.2μs 5.8μs
5. Noise canceler
This IC has a noise canceling function to prevent malfunction due to noise spikes generated when switching ON. The
noise cancel time tn is determined by internal resistance of the CR pin and the constant of t he externally connected CR
components. The constant also determines the switching OFF time.
Figure 1 shows the internal con figuration at the CR pin, and Figure 2 shows the CR pin constant setting range.
Equation when logic voltage VCC = 5V
CR pin voltage E1 = VCC • R/(R1+R2+R) [V]
Noise cancel time tn (R1+R2) • C • 1n {(E1-1.5)/(E1-4.0)} [s]
Switching OFF time toff –R • C • 1n (1.5/E1) [s]
Internal resistance at CR pin : R1 = 1kΩ, R2 = 300Ω (typ.)
*The CR constant setting range in Figure 2 on page 16 is given for reference. It applies to a switching OFF time in the
range from 8 to 100μs. The switching time can also be made higher than 100μs. However, a capacitor value of more
than several thousand pF will result in longer no ise canceling time, which can cause the output current to become
higher than the set current. The longer switching OFF time results in higher output current ripple, cau sing a drop in
average current and rotation efficiency. Whe n keeping the switching OFF time within 100μs, it is recommended to stay
within the CR constant range shown in Figure 2.
Internal configuration at CR pin
Figure 1
CR pin
E1
One-shot multi-blanking
time circuit
VCC line
R:15kΩ
C:470pF
300Ω
R1
R2
1kΩ
LB11847
No.6183-14/15
Switching OFF Ti me and CR Setting Range
(toff time : approx. 8 to 100μs)
Figure 2
50k0 100k
0
t off time : 30μs
t off time : 50μs
t off time : 100μs
R [Ω]
1000
2000
3000
C [pF]
LB11847
PS No.6183-15/15
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
This catalog provides information as of September, 2008. Specifications and information herein are subject
to change without notice.
0
10
20
30
40
0.4
0.8
1.2
1.6
2.0
2.4
50
0453216
1.6 2.01.20.80.4
7
Output ON
Source side
[typical value]
Sink side
[typical value]
Output OFF
Output ON
Output OFF
ICC -- VCC
Logic supply voltage, VCC mV Output stage supply voltage, VBB –V
Logic supply current, ICC –mA
0
2.8
0.4
0.8
1.2
1.6
2.0
2.4
0
2.8
0 2.4 1.6 2.01.20.80.40 2.4
VO(sat) -- IOVO(sat) -- IO
Output current, IO–A
Output saturation voltage, VO(sat) –V
0
1
2
3
4
5
040302010 50 60
IBB -- VBB
Output current, IO–A
Output stage supply current, IBB –mAOutput saturation voltage, VO(sat) –V
Logic supply voltage : IA1, 2, 3, 4
PHA, ENA = VCC
typical value
Logic supply voltage : IA1, 2, 3, 4
PHA, ENA = VCC
typical value