LTC1064-1
1
10641fa
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATIO
U
8th Order Filter in a 14-Pin Package
No External Components
100:1 Clock to Center Ratio
150µV
RMS
Total Wideband Noise
0.03% THD or Better
50kHz Maximum Corner Frequency
Operates from ±2.37V to ±8V Power Supplies
Passband Ripple Guaranteed Over Full Military
Temperature Range
Low Noise, 8th Order, Clock
Sweepable Elliptic Lowpass Filter
The LTC
®
1064-1 is an 8th order, clock sweepable elliptic
(Cauer) lowpass switched capacitor filter. The passband
ripple is typically ±0.15dB, and the stopband attenuation
at 1.5 times the cutoff frequency is 68dB or more.
An external TTL or CMOS clock programs the value of the
filter’s cutoff frequency. The clock to cutoff frequency ratio
is 100:1.
No external components are needed for cutoff frequencies
up to 20kHz. For cutoff frequencies over 20kHz two low
value capacitors are required to maintain passband flatness.
The LTC1064-1 features low wideband noise and low
harmonic distortion even for input voltages up to 3V
RMS
.
In fact the LTC1064-1 overall performance completes with
equivalent multiple op amp RC active realizations.
The LTC1064-1 is available in a 14-pin DIP or 16-pin
surface mounted SW package.
The LTC1064-1 is pin compatible with the LTC1064-2.
, LTC and LT are registered trademarks of Linear Technology Corporation.
8th Order Clock Sweepable Lowpass
Elliptic Antialiasing Filter Frequency Response
VOUT/VIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105
FREQUENCY (kHz)
040
1064 TA02
105152535
20 30
8th ORDER CLOCK SWEEPABLE LOWPASS ELLIPTIC ANTIALIASING
FILTER MAINTAINS, FOR 0.1Hz fCUTOFF 10kHz, A ±0.15dB PASSBAND
RIPPLE AND 72dB STOPBAND ATTENUATION AT 1.5 × fCUTOFF.
TOTAL WIDEBAND NOISE = 150µVRMS, THD = 0.03% FOR VIN = 1VRMS
LTC1064-1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
R(h, I)
COMP2*
V
fCLK
NC
VOUT
NC
INV C
VIN
AGND
V+
AGND
COMP1*
INV A
1064 TA01
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A 0.1µF
CAPACITOR CLOSE TO THE PACKAGE.
FOR SERVO OFFSET NULLING APPLICATIONS, PIN 1 IS THE 2ND
STAGE SUMMING JUNCTION.
*FOR CUTOFF FREQUENCY ABOVE 20kHz, USE COMPENSATION
CAPACITORS (5pF TO 56pF) BETWEEN PIN 13 AND PIN 1
AND PIN 6 AND PIN 7.
CLOCK
(TTL, 5MHz)
–8V
8V
VOUT
VIN
0.1µF
0.1µF
Antialiasing Filters
Telecom PCM Filters
LTC1064-1
2
10641fa
Total Supply Voltage (V
+
to V
) ............................ 16.5V
Power Dissipation.............................................. 400mW
Storage Temperature Range ................. 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC1064-1CN
LTC1064-1ACN
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Note 1)
1
2
3
4
5
6
7
TOP VIEW
J PACKAGE
14-LEAD CERDIP
N PACKAGE
14-LEAD PDIP
14
13
12
11
10
9
8
INV C
V
IN
AGND
V
+
AGND
COMP1
INV A
R(h, l)
COMP2
V
f
CLK
NC
V
OUT
NC
Operating Temperature Range
LTC1064-1M (OBSOLETE) ............... 55°C to 125°C
LTC1064-1C/AC.................................. 40°C to 85°C
ORDER PART
NUMBER
LTC1064-1CSW
T
JMAX
= 150°C, θ
JA
= 90°C/W
T
JMAX
= 110°C, θ
JA
= 70°C/W
LTC1064-1MJ
LTC1064-1CJ
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±7.5V, fCLK = 1MHz, R1 = 10k, C1 = 10pF, TTL or CMOS clock input
level unless otherwise specified.
OBSOLETE PACKAGE
Consider the N14 Package for Alternate Source
1
2
3
4
5
6
7
8
TOP VIEW
SW PACKAGE
16-LEAD PLASTIC (WIDE) SO
16
15
14
13
12
11
10
9
INV C
VIN
AGND
V+
AGND
NC
COMP1
INV A
R(h, l)
COMP2
V
NC
fCLK
NC
NC
VOUT
PARAMETER CONDITIONS MIN TYP MAX UNITS
Passband Gain, LTC1064-1, 1A Referenced to 0dB, 1Hz to 0.1f
C
±0.1 ±0.35 dB
Gain TempCo 0.0002 dB/°C
Passband Edge Frequency, f
C
10 ± 1% kHz
Gain at f
C
Referenced to Passband Gain
LTC1064-1 1.25 0.85 dB
LTC1064-1A –0.75 0.65 dB
–3dB Frequency 10.7 kHz
Passband Ripple (Note 1) 0.1f
C
to 0.85f
C
Referenced to Passband Gain,
LTC1064-1 Measured at 6.25kHz and 8.5kHz ±0.15 ±0.32 dB
LTC1064-1A ±0.1 ±0.19 dB
Ripple TempCo 0.0004 dB/°C
Stopband Attenuation At 1.5f
C
Referenced to 0dB
LTC1064-1 66 72 dB
LTC1064-1A 68 72 dB
Stopband Attenuation At 2f
C
Referenced to 0dB
LTC1064-1 67 72 dB
LTC1064-1A 68 72 dB
LTC1064-1
3
10641fa
ELECTRICAL CHARACTERISTICS
The denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±7.5V, fCLK = 1MHz, R1 = 10k, C1 = 10pF, TTL or CMOS clock input
level unless otherwise specified.
Note 2: For tighter specifications please contact LTC Marketing.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Frequency Range 0f
CLK
/2 kHz
Output Voltage Swing and V
S
= ±2.37V ±1V
Operating Input Voltage Range V
S
= ±5V ±3V
V
S
= ±7.5V ±5V
Total Harmonic Distortion V
S
= ±5V, Input = 1V
RMS
at 1kHz 0.015 %
V
S
= ±7.5V, Input = 3V
RMS
at 1kHz 0.03 %
Wideband Noise V
S
= ±5V, Input = GND 1Hz to 999kHz 150 µV
RMS
V
S
= ±7.5V, Input = GND 1Hz to 999kHz 165 µV
RMS
Output DC Offset V
S
= ±7.5V, Pin 2 Grounded
LTC1064-1 50 175 mV
LTC1064-1A 50 125 mV
Output DC Offset TempCo V
S
= ±5V –100 µV/°C
Input Impedance 10 20 k
Output Impedance f
OUT
= 10kHz 2
Output Short-Circuit Current Source/Sink 3/1 mA
Clock Feedthrough 200 µV
RMS
Maximum Clock Frequency 50% Duty Cycle, V
S
= ±7.5V 5 MHz
Power Supply Current V
S
= ±2.37V 10 22 mA
V
S
= ±5V 12 23 mA
26 mA
V
S
= ±7.5V, f
CLK
= 1MHz 16 28 mA
32 mA
Power Supply Voltage Range ±2.37 ±8V
FREQUENCY (kHz)
1
GAIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105 10 100
1064 G01
V
S
= ±5V
T
A
= 25°C
f
CLK
= 1MHz
f
C
= 10kHz ± 0.1dB
f
–3dB
= 10.7kHz
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Gain vs Frequency Phase vs Frequency Group Delay
FREQUENCY (kHz)
01 3 56
PHASE (DEG)
0
–45
–90
135
180
225
270
315
360
405
450
109
1064 G02
24 8711
V
S
= ±5V
T
A
= 25°C
f
CLK
= 1MHz
f
C
= 10kHz
FREQUENCY (kHz)
500
450
400
350
300
250
200
150
100
50
0
GROUP DELAY (µs)
1064 G03
0123456789 1210 11
VS = ±5V
TA = 25°C
fCLK = 1MHz
fC = 10kHz
LTC1064-1
4
10641fa
FREQUENCY (kHz)
1
GAIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105
10 100
1064 G04
fCLK = 2MHz, fC = 20kHz
COMP1 NOT USED,
COMP2 = 20pF
fCLK = 4MHz, fC = 40kHz
COMP1 = 36pF
COMP2 = 47pF
fCLK = 3MHz, fC = 30kHz
COMP1 = 24pF
COMP2 = 36pF
VS = ±5V
TA = 25°C
FREQUENCY (kHz)
1
GAIN (dB)
15
0
–15
–30
–45
–60
–75
–90
–105
10 100
1064 G05
fCLK = 3MHz, fC = 30kHz
COMP1 = 10pF
COMP2 = 15pF
fCLK = 4MHz, fC = 40kHz
COMP1 = 20pF
COMP2 = 30pF
VS = ±7.5V
TA = 25°C
fCLK = 5MHz, fC = 50kHz
COMP1 = 30pF
COMP2 = 47pF
Gain vs Frequency Gain vs Frequency Gain vs Frequency
Typical Wideband Noise
(151µVRMS) VS = ±5V, TA = 25°C
fCLK = 1MHz, fC = 10kHz Input
Grounded
Power Supply Current vs Power
Supply Voltage
TYPICAL PERFOR A CE CHARACTERISTICS
UW
TOTAL POWER SUPPLY VOLTAGE (V)
024681012141618202224
POWER SUPPLY CURRENT (mA)
48
44
40
36
32
28
24
20
16
12
8
4
0
1064 G09
T
A
= –55°C
T
A
= 25°C
T
A
= 125°C
f
CLK
= 1MHz
FREQUENCY (kHz)
1
GAIN (dB)
5
0
–5
–10
–15
–20
–25
–30
–35
10 100
1064 G06
VS = ±7.5V
fCLK = 5MHz
fC = 50kHz
COMP1 = 33pF
COMP2 = 56pF
25°C GAIN PEAK =
0.4dB AT 30kHz
125°C GAIN PEAK =
1dB AT 35kHz
is protected against static discharge. The device’s output,
Pin 9, is the output of an op amp which can typically source/
sink 3mA/1mA. Although the internal op amps are unity
gain stable, driving long coax cables is not recommended.
When testing the device for noise and distortion, the
output, Pin 9, should be buffered (Figure 4).
The op amp
power supply wire (or trace) should be connected
directly to the power source.
AGND (Pins 3, 5): For dual supply operation these pins
should be connected to a ground plane. For single supply
UU
U
PI FU CTIO S
COMP1, INV A, COMP2, INV C (Pins 1,6,7, and 13): For
filter cutoff frequencies higher than 20kHz, in order to
minimize the passband ripple, compensation capacitors
should be added between Pin 6 and Pin 7 (COMP1) and
Pin 1 and Pin 13 (COMP2). For COMP1 (COMP2), add 1pF
(1.5pF) mica capacitor for each kHz increase in cutoff
frequency above 20kHz. For more detail refer to Gain vs
Frequency graphs.
V
IN
, V
OUT
(Pins 2, 9): The input Pin 2 is connected to an
18k resistor tied to the inverting input of an op amp. Pin 2
(Pin Numbers Refer to the 14-Pin Package)
Total Harmonic Distortion
(0.025%) VS = ±7.5V, TA = 25°C
fCLK = 1MHz, fC = 10kHz
Input = 1kHz at 3VRMS
LTC1064-1
5
10641fa
operation both pins should be tied to one half supply
(Figure 2). Also Pin 8 and Pin 10, although they are not
internally connected should be tied to analog ground or
system ground. This improves the clock feedthrough
performance.
V
+
, V
(Pins 4, 12): The V
+
and V
pins should be
bypassed with a 0.1µF capacitor to an adequate analog
ground. Low noise, nonswitching power supplies are
recommended.
To avoid latchup when the power supplies
exhibit high turn-on transients, a 1N5817 Schottky diode
should be added from the V
+
and V
pins to ground
(Figure 1).
INV A, R(h, I) (Pins 7, 14): A very short connection
between Pin 14 and Pin 7 is recommended. This connec-
tion should be preferably done under the IC package. In a
UU
U
PI FU CTIO S
breadboard, use a one inch, or less, shielded coaxial cable;
the shield should be grounded. In a PC board, use a one
inch trace or less; surround the trace by a ground plane.
NC (Pins 8, 10): The “no connection” pins preferably
should be grounded.
f
CLK
(Pin 11): For ±5V supplies the logic threshold level is
1.4V. For ±8V and 0V to 5V supplies the logic threshold
levels are 2.2V and 3V respectively. The logic threshold
levels vary ±100mV over the full military temperature
range. The recommended duty cycle of the input clock is
50% although for clock frequencies below 500kHz the
clock “on” time can be as low as 200ns. The maximum
clock frequency for ±5V supplies is 4MHz. For ±7V sup-
plies and above, the maximum clock frequency is 5MHz.
Do not allow the clock levels to exceed the power supplies.
For clock level shifting (see Figure 3).
Figure 1. Using Schottky Diodes to Protect
the IC from Power Supply Spikes
Figure 2. Single Supply Operation. If Fast Power Up
or Down Transients are Expected, Use a 1N5817
Schottky Diode Between Pin 4 and Pin 5.
Figure 3. Level Shifting the Input T2L Clock
for Single Supply Operation, V+ >6V.
Figure 4. Buffering the Filter Output. The Buffer Op Amp
Should Not Share the LTC1064-1 Power Lines.
LTC1064-1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
0.1µF0.1µF
0.1µF
0.1µF
V
OUT
+
V
V
+
POWER SOURCE
10k
10k
1064 F04
RECOMMENDED OP AMPS:
LT1022, LT318, LT1056
COMP2*
V
f
CLK
NC
V
OUT
NC
INV C
V
IN
AGND
V
+
AGND
COMP1*
R(h, I)
INV A
V
IN
LTC1064-1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
+
1064 F03
0.1µF
5k
2.2k
5k
5k 1µF
T
2
L
LEVEL
V
+
R(h, I)
COMP2*
V
f
CLK
NC
V
OUT
NC
INV C
V
IN
AGND
V
+
AGND
COMP1*
INV A
V
OUT
V
IN
LTC1064-1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V+
V
1064 F01
0.1µF
0.1µF
1N5817
1N5817
R(h, I)
COMP2*
V
fCLK
NC
VOUT
NC
INV C
VIN
AGND
V+
AGND
COMP1*
INV A
VOUT
VIN
LTC1064-1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
+
= 15V 0V TO 10V
1064 F02
0.1µF
0.1µF
5k
5k
V
+
/2
R(h, I)
COMP2*
V
f
CLK
NC
V
OUT
NC
INV C
V
IN
AGND
V
+
AGND
COMP1*
INV A
V
OUT
V
IN
TYPICAL APPLICATIO S
U
(Pin Numbers Refer to the 14-Pin Package)
LTC1064-1
6
10641fa
TYPICAL APPLICATIO S
U
Transitional Elliptic-Bessel Dual 5th Order Lowpass Filter
Transient Response to a 2V Step
Input VOUT1
0.1ms/DIV
1V/DIV 1V/DIV
0.1ms/DIV
LTC1064-1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V+
V
fCLK = 200
× f–3dB
1064 TA06
0.1µF
0.1µF
VOUT1
VIN2
C
47.5k
+
LT1056
C
47.5k
C = (µF)
5
f–3dB
OUTPUT1 WIDEBAND NOISE: 50µVRMS
OUTPUT2 WIDEBAND NOISE: 110µVRMS
R(h, I)
COMP2*
V
fCLK
NC
VOUT
NC
INV C
VIN
AGND
V+
AGND
COMP1*
INV A
VOUT2
VIN1
Amplitude Response
f
IN
(kHz)
1
V
OUT
/V
IN
(dB)
15
0
–15
–30
–45
–60
–75
–90
–105 10 100
1064 TA09
V
OUT2
V
OUT1
f
–3dB
= 5kHz
f
CLK
= 1MHz
Adding an Output Buffer-Filter to Eliminate Any Clock Feedthrough
Over a 10:1 Clock Range, for fCLK = 2kHz to 20kHz
LTC1064-1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
+
V
1064 TA10
0.1µF
0.1µFV
OUT
+
LT1056
200pF
430pF
4.99k 4.99k
50
10k
0.027µF
R(h, I)
COMP2*
V
f
CLK
NC
V
OUT
NC
INV C
V
IN
AGND
V
+
AGND
COMP1*
INV A
V
IN
Transient Response to a 2V Step
Input VOUT2
LTC1064-1
7
10641fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTIO
U
N Package
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
J Package
14-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
OBSOLETE PACKAGE
J14 0801
.045 – .065
(1.143 – 1.651)
.100
(2.54)
BSC
.014 – .026
(0.360 – 0.660)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.125
(3.175)
MIN
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457) 0° – 15°
1234567
.220 – .310
(5.588 – 7.874)
.785
(19.939)
MAX
.005
(0.127)
MIN 14 11 891013 12
.025
(0.635)
RAD TYP
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
N14 1002
.020
(0.508)
MIN
.120
(3.048)
MIN
.130 ± .005
(3.302 ± 0.127)
.045 – .065
(1.143 – 1.651)
.065
(1.651)
TYP
.018 ± .003
(0.457 ± 0.076)
.005
(0.125)
MIN
.255 ± .015*
(6.477 ± 0.381)
.770*
(19.558)
MAX
31 24567
8910
11
1213
14
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
S16 (WIDE) 0502
NOTE 3
.398 – .413
(10.109 – 10.490)
NOTE 4
16 15 14 13 12 11 10 9
1
N
2345678
N/2
.394 – .419
(10.007 – 10.643)
.037 – .045
(0.940 – 1.143)
.004 – .012
(0.102 – 0.305)
.093 – .104
(2.362 – 2.642)
.050
(1.270)
BSC .014 – .019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 3
.009 – .013
(0.229 – 0.330)
.005
(0.127)
RAD MIN
.016 – .050
(0.406 – 1.270)
.291 – .299
(7.391 – 7.595)
NOTE 4
× 45°
.010 – .029
(0.254 – 0.737)
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP
AND CAVITIES ON THE BOTTOM
OF PACKAGES ARE THE
MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED
WITH OR WITHOUT ANY OF THE
OPTIONS
4. THESE DIMENSIONS DO NOT
INCLUDE MOLD FLASH OR
PROTRUSIONS. MOLD FLASH OR
PROTRUSIONS SHALL NOT
EXCEED .006" (0.15mm)
.420
MIN
.325 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
N
123 N/2
.050 BSC
.030 ±.005
TYP
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
LTC1064-1
8
10641fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
LINE AR TECHN O LOGY CORPORATION 1989
RELATED PARTS
U
TYPICAL APPLICATIO
PART NUMBER DESCRIPTION COMMENTS
LTC1069-1 8th Order Elliptic Lowpass S0-8 Package, Low Power
LTC1069-6 Single Supply, 8th Order Elliptic Lowpass S0-8 Package, Very Low Power
LTC1569-6 DC Accurate, 10th Order, Lowpass Internal Precision Clock, Low Power
LTC1569-7 DC Accurate, 10th Order, Lowpass Internal Precision Clock, S0-8 Package
LW/TP 1202 1K REV A • PRINTED IN USA
f
IN
(kHz)
1
V
OUT
/V
IN
(dB)
15
0
–15
–30
–45
–60
–75
–90
–105 10 100
1064 TA05
f
–3dB
= 3kHz
f
CLK
= 750kHz
Transitional Elliptic-Bessel 10th Order Lowpass Filter
Transient Response to a 2V Step Input
Amplitude Response
LTC1064-1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
+
V
f
CLK
= 250
× f
–3dB
1064 TA03
0.1µF
0.1µF
V
OUT
V
IN
C
47.5k
+
LT1056
C
47.5k
C = (µF)
3
f
–3dB
OUTPUT WIDEBAND NOISE:110µV
RMS
R(h, I)
COMP2*
V
f
CLK
NC
V
OUT
NC
INV C
V
IN
AGND
V
+
AGND
COMP1*
INV A
1V/DIV
0.1ms/DIV