LTC1064-1 Low Noise, 8th Order, Clock Sweepable Elliptic Lowpass Filter U FEATURES DESCRIPTIO 8th Order Filter in a 14-Pin Package No External Components 100:1 Clock to Center Ratio 150VRMS Total Wideband Noise 0.03% THD or Better 50kHz Maximum Corner Frequency Operates from 2.37V to 8V Power Supplies Passband Ripple Guaranteed Over Full Military Temperature Range U APPLICATIO S Antialiasing Filters Telecom PCM Filters The LTC(R)1064-1 is an 8th order, clock sweepable elliptic (Cauer) lowpass switched capacitor filter. The passband ripple is typically 0.15dB, and the stopband attenuation at 1.5 times the cutoff frequency is 68dB or more. An external TTL or CMOS clock programs the value of the filter's cutoff frequency. The clock to cutoff frequency ratio is 100:1. No external components are needed for cutoff frequencies up to 20kHz. For cutoff frequencies over 20kHz two low value capacitors are required to maintain passband flatness. The LTC1064-1 features low wideband noise and low harmonic distortion even for input voltages up to 3VRMS. In fact the LTC1064-1 overall performance completes with equivalent multiple op amp RC active realizations. The LTC1064-1 is available in a 14-pin DIP or 16-pin surface mounted SW package. The LTC1064-1 is pin compatible with the LTC1064-2. , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO 8th Order Clock Sweepable Lowpass Elliptic Antialiasing Filter VIN 2 R(h, I) INV C VIN COMP2* 14 0 13 3 8V 0.1F 12 V- AGND 4 + LTC1064-1 11 CLOCK fCLK V (TTL, 5MHz) 5 10 NC AGND 6 7 COMP1* INV A VOUT NC 9 -15 -8V 0.1F VOUT 8 VOUT/VIN (dB) 1 Frequency Response 15 -30 -45 -60 -75 -90 -105 1064 TA01 NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A 0.1F CAPACITOR CLOSE TO THE PACKAGE. 0 5 10 15 20 25 30 FREQUENCY (kHz) 35 40 1064 TA02 FOR SERVO OFFSET NULLING APPLICATIONS, PIN 1 IS THE 2ND STAGE SUMMING JUNCTION. *FOR CUTOFF FREQUENCY ABOVE 20kHz, USE COMPENSATION CAPACITORS (5pF TO 56pF) BETWEEN PIN 13 AND PIN 1 AND PIN 6 AND PIN 7. 8th ORDER CLOCK SWEEPABLE LOWPASS ELLIPTIC ANTIALIASING FILTER MAINTAINS, FOR 0.1Hz fCUTOFF 10kHz, A 0.15dB PASSBAND RIPPLE AND 72dB STOPBAND ATTENUATION AT 1.5 x fCUTOFF. TOTAL WIDEBAND NOISE = 150VRMS, THD = 0.03% FOR VIN = 1VRMS 10641fa 1 LTC1064-1 W W U W ABSOLUTE AXI U RATI GS (Note 1) Total Supply Voltage (V + to V -) ............................ 16.5V Power Dissipation .............................................. 400mW Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C Operating Temperature Range LTC1064-1M (OBSOLETE) ............... - 55C to 125C LTC1064-1C/AC .................................. - 40C to 85C U W U PACKAGE/ORDER I FOR ATIO TOP VIEW ORDER PART NUMBER INV C 1 14 R(h, l) VIN 2 13 COMP2 AGND 3 12 V - V+ 4 11 fCLK AGND 5 10 NC COMP1 6 9 VOUT INV A 7 8 NC INV C 1 LTC1064-1CN LTC1064-1ACN VIN 2 AGND 3 V+ 4 AGND 5 N PACKAGE 14-LEAD PDIP TJMAX = 110C, JA = 70C/W 15 COMP2 14 LTC1064-1CSW V- 13 NC 12 fCLK 11 NC COMP1 7 10 NC LTC1064-1MJ LTC1064-1CJ OBSOLETE PACKAGE 16 R(h, l) NC 6 INV A 8 J PACKAGE 14-LEAD CERDIP ORDER PART NUMBER TOP VIEW 9 VOUT SW PACKAGE 16-LEAD PLASTIC (WIDE) SO TJMAX = 150C, JA = 90C/W Consider the N14 Package for Alternate Source Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 7.5V, fCLK = 1MHz, R1 = 10k, C1 = 10pF, TTL or CMOS clock input level unless otherwise specified. PARAMETER CONDITIONS Passband Gain, LTC1064-1, 1A Referenced to 0dB, 1Hz to 0.1fC MIN TYP MAX 0.1 0.35 UNITS dB Gain TempCo 0.0002 dB/C Passband Edge Frequency, fC 10 1% kHz Gain at fC LTC1064-1 LTC1064-1A Referenced to Passband Gain -1.25 - 0.75 -3dB Frequency Passband Ripple (Note 1) LTC1064-1 LTC1064-1A 0.85 0.65 10.7 0.1fC to 0.85fC Referenced to Passband Gain, Measured at 6.25kHz and 8.5kHz 0.15 0.1 Ripple TempCo 0.0004 Stopband Attenuation LTC1064-1 LTC1064-1A At 1.5fC Referenced to 0dB Stopband Attenuation LTC1064-1 LTC1064-1A At 2fC Referenced to 0dB dB dB kHz 0.32 0.19 dB dB dB/C 66 68 72 72 dB dB 67 68 72 72 dB dB 10641fa 2 LTC1064-1 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 7.5V, fCLK = 1MHz, R1 = 10k, C1 = 10pF, TTL or CMOS clock input level unless otherwise specified. PARAMETER CONDITIONS MIN Input Frequency Range TYP 0 Output Voltage Swing and Operating Input Voltage Range VS = 2.37V VS = 5V VS = 7.5V Total Harmonic Distortion VS = 5V, Input = 1VRMS at 1kHz VS = 7.5V, Input = 3VRMS at 1kHz Wideband Noise VS = 5V, Input = GND 1Hz to 999kHz VS = 7.5V, Input = GND 1Hz to 999kHz Output DC Offset LTC1064-1 LTC1064-1A Output DC Offset TempCo VS = 7.5V, Pin 2 Grounded Clock Feedthrough Maximum Clock Frequency Power Supply Current % % 150 165 10 Source/Sink kHz V V V VS = 5V Output Short-Circuit Current fCLK/2 0.015 0.03 Input Impedance f OUT = 10kHz UNITS 1 3 5 50 50 -100 Output Impedance MAX VRMS VRMS 175 125 20 k 2 3/1 mA 200 VRMS 50% Duty Cycle, VS = 7.5V 5 VS = 2.37V VS = 5V Power Supply Voltage Range Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. 2.37 MHz 10 22 mA 12 23 26 mA mA 16 28 32 mA mA 8 V VS = 7.5V, f CLK = 1MHz mV mV V/C Note 2: For tighter specifications please contact LTC Marketing. U W TYPICAL PERFOR A CE CHARACTERISTICS Gain vs Frequency Phase vs Frequency 15 0 0 -45 -45 -60 -90 -105 1 10 FREQUENCY (kHz) -180 -225 -270 -315 VS = 5V TA = 25C f CLK = 1MHz fC = 10kHz 0.1dB f -3dB = 10.7kHz -75 GROUP DELAY (s) PHASE (DEG) GAIN (dB) -135 -30 1064 G01 VS = 5V 450 TA = 25C 400 f CLK = 1MHz fC = 10kHz 350 300 250 200 150 -360 100 -405 50 -450 100 500 VS = 5V TA = 25C f CLK = 1MHz fC = 10kHz -90 -15 Group Delay 0 1 2 3 4 5 6 7 8 FREQUENCY (kHz) 9 10 11 1064 G02 0 0 1 2 3 4 5 6 7 8 9 10 11 12 FREQUENCY (kHz) 1064 G03 10641fa 3 LTC1064-1 U W TYPICAL PERFOR A CE CHARACTERISTICS Gain vs Frequency Gain vs Frequency 15 5 0 0 0 GAIN (dB) -30 fCLK = 3MHz, fC = 30kHz COMP1 = 24pF COMP2 = 36pF fCLK = 4MHz, fC = 40kHz COMP1 = 36pF COMP2 = 47pF -45 -60 -75 -90 1 -30 -45 -60 fCLK = 5MHz, fC = 50kHz COMP1 = 30pF COMP2 = 47pF -90 100 1 10 FREQUENCY (kHz) 1064 G04 Typical Wideband Noise (151VRMS) VS = 5V, TA = 25C f CLK = 1MHz, f C = 10kHz Input Grounded -10 -15 -20 VS = 7.5V fCLK = 5MHz 125C GAIN PEAK = f = 50kHz 1dB AT 35kHz -30 C COMP1 = 33pF COMP2 = 56pF -35 1 10 FREQUENCY (kHz) -25 VS = 7.5V TA = 25C -105 10 FREQUENCY (kHz) 25C GAIN PEAK = 0.4dB AT 30kHz -5 fCLK = 4MHz, fC = 40kHz COMP1 = 20pF COMP2 = 30pF -75 VS = 5V TA = 25C -105 fCLK = 3MHz, fC = 30kHz COMP1 = 10pF COMP2 = 15pF -15 fCLK = 2MHz, fC = 20kHz COMP1 NOT USED, COMP2 = 20pF GAIN (dB) -15 GAIN (dB) Gain vs Frequency 15 100 100 1064 G06 1064 G05 Total Harmonic Distortion (0.025%) VS = 7.5V, TA = 25C f CLK = 1MHz, f C = 10kHz Input = 1kHz at 3VRMS Power Supply Current vs Power Supply Voltage 48 POWER SUPPLY CURRENT (mA) 44 f CLK = 1MHz 40 36 32 28 24 TA = -55C TA = 25C TA = 125C 20 16 12 8 4 0 0 2 4 6 8 10 12 14 16 18 20 22 24 TOTAL POWER SUPPLY VOLTAGE (V) 1064 G09 U U U PI FU CTIO S (Pin Numbers Refer to the 14-Pin Package) COMP1, INV A, COMP2, INV C (Pins 1,6,7, and 13): For filter cutoff frequencies higher than 20kHz, in order to minimize the passband ripple, compensation capacitors should be added between Pin 6 and Pin 7 (COMP1) and Pin 1 and Pin 13 (COMP2). For COMP1 (COMP2), add 1pF (1.5pF) mica capacitor for each kHz increase in cutoff frequency above 20kHz. For more detail refer to Gain vs Frequency graphs. is protected against static discharge. The device's output, Pin 9, is the output of an op amp which can typically source/ sink 3mA/1mA. Although the internal op amps are unity gain stable, driving long coax cables is not recommended. VIN, VOUT (Pins 2, 9): The input Pin 2 is connected to an 18k resistor tied to the inverting input of an op amp. Pin 2 AGND (Pins 3, 5): For dual supply operation these pins should be connected to a ground plane. For single supply When testing the device for noise and distortion, the output, Pin 9, should be buffered (Figure 4). The op amp power supply wire (or trace) should be connected directly to the power source. 10641fa 4 LTC1064-1 U U U PI FU CTIO S (Pin Numbers Refer to the 14-Pin Package) operation both pins should be tied to one half supply (Figure 2). Also Pin 8 and Pin 10, although they are not internally connected should be tied to analog ground or system ground. This improves the clock feedthrough performance. V +, V - (Pins 4, 12): The V+ and V- pins should be bypassed with a 0.1F capacitor to an adequate analog ground. Low noise, nonswitching power supplies are recommended. To avoid latchup when the power supplies exhibit high turn-on transients, a 1N5817 Schottky diode should be added from the V + and V - pins to ground (Figure 1). INV A, R(h, I) (Pins 7, 14): A very short connection between Pin 14 and Pin 7 is recommended. This connection should be preferably done under the IC package. In a breadboard, use a one inch, or less, shielded coaxial cable; the shield should be grounded. In a PC board, use a one inch trace or less; surround the trace by a ground plane. NC (Pins 8, 10): The "no connection" pins preferably should be grounded. fCLK (Pin 11): For 5V supplies the logic threshold level is 1.4V. For 8V and 0V to 5V supplies the logic threshold levels are 2.2V and 3V respectively. The logic threshold levels vary 100mV over the full military temperature range. The recommended duty cycle of the input clock is 50% although for clock frequencies below 500kHz the clock "on" time can be as low as 200ns. The maximum clock frequency for 5V supplies is 4MHz. For 7V supplies and above, the maximum clock frequency is 5MHz. Do not allow the clock levels to exceed the power supplies. For clock level shifting (see Figure 3). U TYPICAL APPLICATIO S 1 2 VIN R(h, I) INV C VIN COMP2* 3 13 0.1F 1N5817 5 6 7 NC AGND COMP1* VOUT NC INV A 0.1F VIN COMP2* V+= 15V 0.1F 5 5k 6 VOUT V+/2 8 0.1F 7 5k NC AGND COMP1* VOUT NC INV A 1064 F01 Figure 1. Using Schottky Diodes to Protect the IC from Power Supply Spikes 2 VIN 3 4 V+ 5 5k 6 0.1F 5k 7 R(h, I) INV C VIN COMP2* VIN 12 V- AGND LTC1064-1 11 fCLK V+ AGND COMP1* INV A NC VOUT NC 10 9 0V TO 10V 10 9 VOUT 8 Figure 2. Single Supply Operation. If Fast Power Up or Down Transients are Expected, Use a 1N5817 Schottky Diode Between Pin 4 and Pin 5. 14 13 13 1064 F02 1 1 14 12 V- AGND LTC1064-1 4 + 11 fCLK V V- 1N5817 R(h, I) INV C 3 10 9 2 VIN 12 V- AGND 4 + LTC1064-1 11 fCLK V V+ 1 14 V+ 2 INV C VIN POWER SOURCE V+ V- R(h, I) 14 COMP2* 13 3 12 V- AGND LTC1064-1 4 + 11 fCLK V 2.2k 2L T LEVEL 5k 1F 0.1F 5 6 VOUT NC AGND COMP1* VOUT 7 INV A NC 0.1F 10k 10 9 10k 0.1F - 8 VOUT + 8 1064 F03 Figure 3. Level Shifting the Input T2L Clock for Single Supply Operation, V+ >6V. RECOMMENDED OP AMPS: LT1022, LT318, LT1056 1064 F04 0.1F Figure 4. Buffering the Filter Output. The Buffer Op Amp Should Not Share the LTC1064-1 Power Lines. 10641fa 5 LTC1064-1 U TYPICAL APPLICATIO S Transitional Elliptic-Bessel Dual 5th Order Lowpass Filter Amplitude Response C 15 f -3dB = 5kHz f CLK = 1MHz 0 47.5k 2 VIN1 R(h, I) INV C VIN COMP2* 3 V+ 0.1F 7 47.5k 13 INV A VOUT NC VOUT1 LT1056 V- + 12 V- COMP1* -15 - AGND LTC1064-1 4 + 11 fCLK = 200 fCLK V x f-3dB 5 10 NC AGND 6 C 14 9 VOUT/VIN (dB) 1 0.1F VOUT2 VOUT1 -30 -45 -60 -75 -90 VOUT2 8 C= 1064 TA06 5 f -3dB -105 10 fIN (kHz) 1 (F) 100 1064 TA09 OUTPUT1 WIDEBAND NOISE: 50VRMS OUTPUT2 WIDEBAND NOISE: 110VRMS VIN2 Transient Response to a 2V Step Input VOUT2 Transient Response to a 2V Step Input VOUT1 1V/DIV 1V/DIV 0.1ms/DIV 0.1ms/DIV Adding an Output Buffer-Filter to Eliminate Any Clock Feedthrough Over a 10:1 Clock Range, for fCLK = 2kHz to 20kHz 1 VIN 2 3 V+ 0.1F 4 5 6 7 R(h, I) INV C VIN COMP2* 14 13 V- 12 V- AGND LTC1064-1 11 fCLK V+ AGND COMP1* INV A NC VOUT NC 10k 0.1F VOUT 200pF 10 9 8 4.99k 4.99k - 50 LT1056 430pF + 0.027F 1064 TA10 10641fa 6 LTC1064-1 U PACKAGE DESCRIPTIO J Package 14-Lead CERDIP (Narrow 0.300, Hermetic) (LTC DWG # 05-08-1110) .200 (5.080) MAX .300 BSC (7.62 BSC) .015 - .060 (0.381 - 1.524) .008 - .018 (0.203 - 0.457) .785 (19.939) MAX .005 (0.127) MIN 14 13 12 11 10 9 8 .220 - .310 (5.588 - 7.874) .025 (0.635) RAD TYP 0 - 15 .045 - .065 (1.143 - 1.651) .100 (2.54) BSC .014 - .026 (0.360 - 0.660) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS .125 (3.175) MIN 2 1 3 4 5 6 7 J14 0801 OBSOLETE PACKAGE N Package 14-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) .770* (19.558) MAX 14 13 11 12 .300 - .325 (7.620 - 8.255) 10 9 .045 - .065 (1.143 - 1.651) .130 .005 (3.302 0.127) 8 .020 (0.508) MIN .065 (1.651) TYP .008 - .015 (0.203 - 0.381) .255 .015* (6.477 0.381) +.035 .325 -.015 1 2 3 5 4 ( 7 6 8.255 +0.889 -0.381 .005 (0.125) .100 MIN (2.54) BSC .120 (3.048) MIN ) NOTE: 1. DIMENSIONS ARE .018 .003 (0.457 0.076) INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) N14 1002 SW Package 16-Lead Plastic Small Outline (Wide .300 Inch) (Reference LTC DWG # 05-08-1620) .050 BSC .045 .005 .030 .005 TYP .398 - .413 (10.109 - 10.490) NOTE 4 16 N 15 14 13 12 11 10 9 N .325 .005 .420 MIN .394 - .419 (10.007 - 10.643) NOTE 3 1 2 3 NOTE: 1. DIMENSIONS IN N/2 N/2 RECOMMENDED SOLDER PAD LAYOUT 1 .291 - .299 (7.391 - 7.595) NOTE 4 .010 - .029 x 45 (0.254 - 0.737) .005 (0.127) RAD MIN 2 3 .093 - .104 (2.362 - 2.642) 4 5 6 7 8 .037 - .045 (0.940 - 1.143) 0 - 8 TYP .009 - .013 (0.229 - 0.330) NOTE 3 .016 - .050 (0.406 - 1.270) .050 (1.270) BSC .014 - .019 (0.356 - 0.482) TYP Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .004 - .012 (0.102 - 0.305) S16 (WIDE) 0502 10641fa 7 LTC1064-1 U TYPICAL APPLICATIO Transitional Elliptic-Bessel 10th Order Lowpass Filter C 47.5k 1 2 R(h, I) INV C VIN COMP2* 14 - 13 LT1056 V- 3 12 V- AGND LTC1064-1 4 + 11 fCLK = 250 fCLK V x f-3dB 5 10 NC AGND V+ 0.1F 6 C 7 COMP1* INV A VOUT NC + 0.1F 9 8 C= 47.5k 1064 TA03 VIN VOUT 3 (F) f -3dB OUTPUT WIDEBAND NOISE:110VRMS Amplitude Response 15 f -3dB = 3kHz f CLK = 750kHz 0 Transient Response to a 2V Step Input VOUT/VIN (dB) -15 -30 -45 1V/DIV -60 -75 -90 -105 0.1ms/DIV 1 10 fIN (kHz) 100 1064 TA05 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1069-1 8th Order Elliptic Lowpass S0-8 Package, Low Power LTC1069-6 Single Supply, 8th Order Elliptic Lowpass S0-8 Package, Very Low Power LTC1569-6 DC Accurate, 10th Order, Lowpass Internal Precision Clock, Low Power LTC1569-7 DC Accurate, 10th Order, Lowpass Internal Precision Clock, S0-8 Package 10641fa 8 Linear Technology Corporation LW/TP 1202 1K REV A * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 1989