Application Note RF Link Using the Z86E08 AN005801-Z8X0500 ZILOG WORLDWIDE HEADQUARTERS 910 E. HAMILTON AVENUE CAMPBELL, CA 95008 TELEPHONE: 408.558.8500 FAX: 408.558.8300 WWW.ZILOG.COM Application Note RF Link Using the Z86E08 This publication is subject to replacement by a later edition. To determine whether a later edition exists, or to request copies of publications, contact: ZiLOG Worldwide Headquarters 910 E. Hamilton Avenue Campbell, CA 95008 Telephone: 408.558.8500 Fax: 408.558.8300 www.ZiLOG.com Windows is a registered trademark of Microsoft Corporation. Information Integrity The information contained within this document has been verified according to the general principles of electrical and mechanical engineering. Any applicable source code illustrated in the document was either written by an authorized ZiLOG employee or licensed consultant. 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AN005801-Z8X0500 Application Note RF Link Using the Z86E08 iii Table of Contents General Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Hardware Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Z8 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Assembling the Application Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Source Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Flow Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Test Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Equipment Used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 General Test Setup and Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Acknowledgements Project Lead Engineer Mark Shaw Application and Support Engineer Mark Shaw System and Code Development Mark Shaw AN005801-Z8X0500 Application Note RF Link Using the Z86E08 1 RF Link Using the Z86E08 General Overview Low power RF systems are an extremely popular means of transmitting wireless data. These units typically transmit less than 1 mW of power and operate over distances of 3 to 60 meters. The advantage of these systems is that when certified to meet local communications regulations, they do not require a license for operation. More than 60 million short-range wireless products are manufactured each year with sales expected to top 100 million systems by the year 2000. This application note provides the schematics and software required to build an RF Link using a ZiLOG Inc Z86E08 microcontroller on the Protocol Board of the RF Monolithics (RFM), Virtual Wire, Radio Design Kit. This design kit allows the implementation of low-power wireless ASCII communications between two PCs with RS-232C serial ports. The kit contains two communications nodes with each node consisting of a protocol board and a data radio board. This kit is an excellent tool for evaluating the feasibility of a low-speed wireless data application as well as facilitating the development of the actual design. The following list identifies some applications for short-range wireless data systems: Wireless bar-code and credit-card readers Wireless and bar-code label printers and credit-card receipt printers Smart ID tags for inventory tracking and identification Wireless automatic utility meter reading systems Communications links for hand-held terminals, HPCs and PDAs Wireless keyboards, joysticks, mice and game controls Portable and field data logging Location tracking (follow-me phone extensions, etc.) Sports telemetry Surveying system data links Engine diagnostic links Polled wireless security alarm sensors AN005801-Z8X0500 Application Note RF Link Using the Z86E08 2 Authentication and access control tags Further information concerning the hardware and software described by this application note can be found at the RFM web page at www.rfm.com. Discussion Hardware Description Figure 1 contains the design kit block diagram. The kit contains two circuit card assemblies: The Data Radio CCA and the Protocol CCA. Figure 1. Hardware Block Diagram Antenna RS232 3 MAX218 3 Z86E08 4 Board Address 3 Data Radio Board DR1004/5 DR1200/1 PC Protocol CCA LED Indicators The Data Radio can be either the RFMa DR1004/5 or DR 1200/1 Data Radio CCA. This board contains the RF transceiver or receiver/transmitter pair, discrete circuitry, and the antenna necessary to generate and receive ~900-MHz RF communication. The transceiver includes provisions for on-off keyed (OOK) or amplitude- AN005801-Z8X0500 Application Note RF Link Using the Z86E08 3 shift keyed (ASK) modulation. This application uses OOK. The Data Radio operates from 3V power supplied by the Protocol CCA. The Protocol CCA contains all of the circuitry necessary to interface to the Data Radio CCA and a PC, including RS-232 communication to the PC and packet protocol serial communication to the Data Radio CCA. The CCA also contains jumpers for setting a 4-bit board address and 3 LEDs for monitoring communications status. Power is supplied by three 1.5-V batteries. Z8 Microcontroller The microcontroller selected for this application is the Z86E08. It demonstrates a minimal cost and configuration for the application while maintaining the expected performance of the RF Link. The Z8 controls the four primary functions of the Protocol CCA. These functions are listed below and described in the Software Overview section. RS-232 communications to the PC RF serial communication to the Data Radio Board Interpretation of board address Control of LED indicators The Z86E08 is an 18-pin device with 14 available I/O pins. The I/O pins are arranged into two 3-bit ports, Port 0 and Port 3, and one 8-bit port, Port 2. Port 0 (P02P00) is a dedicated output port. Port 2 (P27P20) is a bidirectional port with each pin independently configurable as input or output. Port 3 (P33P31) is a dedicated input port. Note: P32 and P31 are external interrupt sources and are therefore used by the serial communications inputs (RF and PC). Table 1 provides a pin-out and pin description. Table 1. Z86E08 Pin Configuration Pin # Name Symbol Function Direction Pin 1 D3 P24 D3 (PC RCV) Diode Enable. Active Low Output Pin 2 D4 P25 D4 (RF RCV) Diode Enable. Active Low Output Pin 3 D5 P26 D4 (RXI) Diode Enable. Active Low Output Pin 4 PTT_ P27 Radio Transmit Enable. Active Low Output Pin 5 POWER VCC Power Input Pin 6 XTAL2 XTAL2 Crystal Oscillator Clock Input Pin 7 XTAL1 XTAL1 Crystal Oscillator Clock Input AN005801-Z8X0500 Application Note RF Link Using the Z86E08 4 Table 1. Z86E08 Pin Configuration (Continued) Pin # Name Symbol Function Direction Pin 8 232_RX P31 RS232 Receive Data Input Pin 9 RRX P32 Radio Receive Data Input Pin 10 N/A P33 Unused Input Pin 11 RTX P00 Radio Transmit Data Output Pin 12 232_TX P01 RS232 Transmit Data Output Pin 13 SHDN_ P02 RS232 Transmit Disable. Active Low Output Pin 14 GND GND Ground Input Pin 15 ID0 P20 Board Address/ID Bit 0 Input Pin 16 ID1 P21 Board Address/ID Bit 1 Input Pin 17 ID2 P22 Board Address/ID Bit 2 Input Pin 18 ID3 P23 Board Address/ID Bit 3 Input Firmware Overview The primary functions of the Protocol CCA reside in the firmware within the Z86E08. The majority of the processing consists of two major interrupt service routines: receiving PC RS-232 data (PC_RCV) and receiving RF serial data (RF_RCV). The processor waits in the main processing loop until one of these two interrupts is received. Figure 2 contains a high-level flowchart for these routines. RS-232 Communication The software features an RS-232 communication port controlled entirely by software. This port operates at 9600 baud, half-duplex, with no flow control. A data byte consists of 10 bits: 1 start bit (active Low), 8 data bits, and 1 stop bit (active High). Between transmissions, the port resets High. Receipt of a data byte is initiated by a falling edge of the 232_RX (P31) pin. After a byte is received, it is stored in RAM. When an entire message is received, the data is processed and appropriate actions taken. Figure 3 contains a flow diagram for receiving data on the RS232 communications port. RS-232 Packet Protocol A PC message packet contains the data to be sent over the RF link. As shown below, the basic elements of a packet are the TO/FROM address, the packet number, the message size, and the message itself. All elements are 8-bit data segments. The first byte of a packet contains the TO/FROM address. The High nibble contains the TO node address of the Protocol CCA and the Low nibble contains the FROM node address. The second byte contains the packet number. The packet number is a message sequence number incremented each time an RF AN005801-Z8X0500 Application Note RF Link Using the Z86E08 5 message is successfully transmitted. A valid packet number is restricted to values 1 through 7. The number 8 is reserved for telemetry packets. The third byte contains the size. The size indicates the number of data bytes contained in the message. A message can contain up to 32 bytes. However, the first byte and most recent byte contain the start byte (0x02) and the stop byte (0x03) thereby limiting the actual data stream to 30 bytes. PC Message Packet: | TO/FROM | Packet#, 01hto08h | Size | Message (up to 32 bytes) | When the host software is ready to transmit a message packet, it tests the availability of the communications port by sending the TO/FROM byte. If the TO/FROM byte is returned to the protocol CCA within 50ms, the host software controls the RS-232 communications interrupt and sends the remaining data bytes. This test applies to all message packets including the special messages discussed below. Figure 5 illustrates the timing and flow for a PC message packet transmission to the Protocol CCA. Special messages are data packets intended only for the Protocol CCA. This message is a request for information or an instruction to perform a specific task. The packet format is the same as a PC message packet A special message is indicated by a Packet number of 00h. A list of special messages follows: Reset instructs the receiving unit to perform a software reset: | FROM/FROM | 00h | 01h | 30h | Send Node Address requests the node address of the receiving unit: | 00h | 00h | 01h | 31h | Set Node Address sets the node address of the receiving unit to ADDR: | 00h | 00h | 02h | 34h | ADDR | Run Self Test instructs the receiving unit to run an internal SRAM memory test. | FROM/FROM | 00h | 01h | 33h | All communication from the PC to the Protocol CCA requires a response from the Protocol CCA to the PC in complete the transaction. Figure 6 contains the timing and flow for all of the special message transmissions between the PC and the Protocol CCA. A list of valid responses and a description of each follow. The message from Host too Long indicates that the unit received more than the allowable 32 characters. Firmware limits data to a length of 32 bytes: | FROM/FROM | 00h | 01h | 30h | AN005801-Z8X0500 Application Note RF Link Using the Z86E08 6 Failed Self Test indicates that the microcontroller failed the internal SRAM memory test: | FROM/FROM | 00h | 01h | 33h | Passed Self Test indicates that the microcontroller passed the internal SRAM memory test: | FROM/FROM | 00h | 01h | 34h | Local Node Address sends the local node address of the Protocol CCA. The address is contained in the FROM/FROM byte: | FROM/FROM | 00h | 01h | 35h | Link status messages are packets transmitted to the PC to indicate the status of the RF link. The purpose of these messages is to inform the PC whether an RF transmission was successful. ACK indicates that the message is acknowledged, and that the RF packet has been transmitted and received successfully. | TO/FROM | Packet # | En | (n=1 to 8), number of retries NAK indicates that the RF packet was transmitted and the receiving unit did not acknowledge receipt of the packet: | TO/FROM | Packet # | DDh | RF Communications Port The software features an RF serial data port for communication with the Data Radio CCA. This port is controlled by software and operates at 9600 baud halfduplex. A data segment consists of 14 bits: 1 start bit (active Low), 12 DC-balanced data bits, and 1 stop bit (active High). To meet the polarity requirements of the data radio, all RF serial data is inverted in software before the data is placed on the output port. Receipt of data is initiated by a falling edge of the RRX (P32) pin. After a byte is received, it is stored in RAM. When an entire message is received, the data is processed. Figure 3 contains a flow diagram for receiving data on the RF Communication Port. RF Packet Protocol As shown below, the basic elements of a data packet are the TO/FROM address, the packet number, the message size, and the message. All the elements are 8-bit data segments. The first byte of a 232 message contains the TO/FROM address. The High nibble contains the TO node address of the Protocol CCA and the Low nibble contains the FROM node address. The second byte contains the packet number. The packet number is a message sequence number that is incremented AN005801-Z8X0500 Application Note RF Link Using the Z86E08 7 each time an RF message is successfully transmitted. A valid packet number is restricted to values 1 through 7. The number 8 is reserved for telemetry packets. The third byte contains the size. The size indicates the number of data bytes contained in the message. A message contains up to 32 bytes. Upon successful receipt of a message and verification of the TO/FROM address, the software processes the received data. Data Message: | 0x55h | TO/FROM | Packet # | Size | 0x02 | Message (up to 30 characters) | 0x03 | FCSHI | FCSLO| Upon successful receipt and verification of an RF Packet, the software sends a receipt acknowledgment (ACK) to the originator. The acknowledgment consists of a start byte (0x55h), the TO/FROM address, the packet number, En (where n is the retry number), and the FCS. Data Acknowledge: | 0x55h | TO/FROM | Packet # | En | FCSHI | FCSLO | After transmitting the data message, the message originator waits approximately 10ms for the data acknowledgment packet. If a timeout occurs, the originator delays an additional 25ms before re-sending the data packet. The data is resent up to seven times before the originator sends a data not acknowledged (NAK) message to the PC. Figure 7 illustrates the timing and flow for an RF message retry. Figure 8 illustrates the timing and flow for an RF communications timeout. An additional transmit option is the Broadcast Mode. A broadcast message is intended for all the nodes rather than a single address. A TO/FROM address of 00h indicates to the receiving node that the message is a broadcast. The receiving node, therefore, does not respond with a data acknowledgment. Because ACK is not used, the originator sends the broadcast packet eight times to enhance the probability of reception. Figure 9 illustrates the message broadcast timing. DC-Balancing the Receiver To increase transmission efficiency, all the data is DC-balanced by the software before the data is transmitted. The software encodes the data to condition the transmitted signal for efficient AC coupling at the receiver. The encoding scheme used for this application is an 8- to 12-bit symbol conversion. Each 8-bit byte of data is encoded as 12-bits with six 1 bits and six 0 bits to balance the data. Also, it is important to limit the number of 1 and 0 pulses that occur consecutively. Consecutive identical pulses are limited to no more than three. To perform this conversion in software, a lookup table is used on each nibble of data to convert the nibble from 4 bits to the encoded 6 bits. Table 2 lists the conversion values for the encoding. AN005801-Z8X0500 Application Note RF Link Using the Z86E08 8 Table 2. DC Balance Encoding 8-bit Data 12-bit Encoding 0000 010101 (15h) 0001 110001 (31h) 0010 110010 (32h) 0011 010011 (13h) 0100 110100 (34h) 0101 100101 (25h) 0110 100110 (26h) 0111 000111 (07h) 1000 111000 (38h) 1001 101001 (29h) 1010 101010 (2Ah) 1011 001011 (0Bh) 1100 101100 (2Ch) 1101 001101 (0Dh) 1110 001110 (0Eh) 1111 011100 (1Ch) To further increase the receiver efficiency, a 24-bit preamble is sent to the receiver prior to all RF message transmissions. This preamble is a string of 24 alternating 1 and 0 pulses. The purpose of the preamble is to train the receiver to optimum efficiency prior to sending actual data. The firmware detects a preamble and ignores the data stream. RF Noise Immunity Message validation is performed on all received data. This process determines as fast and reliably as possible whether an interrupt on the RRX input was caused by valid data or RF noise. Several tests are required to determine the validity of a message. When an interrupt is received, the firmware determines whether the incoming data is a new message or the next byte of a message already in progress. If the data is a new message, the firmware verifies the first three bits of the preamble. If any of the pulses fail, the firmware immediately exits to the main loop to await the next interrupt. If the pulses are verified, then the firmware runs a delay loop to the end of the preamble before waiting for the next data bit. AN005801-Z8X0500 Application Note RF Link Using the Z86E08 9 When a 12-bit encoded data segment is received, the value is converted to 8-bit format. If either of the nibbles fails to match a valid value from the encoding table, the message is deemed invalid and the firmware immediately exits to the main loop to await the next interrupt. When an entire message is received, the Frame Check Sequence (FCS) is calculated and verified. The FCS is calculated based on all of the bits in the message, excluding the start byte. The FCS used by this application is defined by ISO 3309. When the FCS is verified, the data is sent as a data message to the PC. If the FCS fails verification, the firmware immediately exits to the main loop to await the next interrupt. LED Indicators The Protocol CCA contains three LED indicators. The RXI LED indicates that the firmware is processing an interrupt of the RRX line. The RF RCV indicates that a valid RF Packet was received. The PC RCV indicates that a valid message from the PC was received. Node Addressing Each Protocol CCA contains a set of four jumpers to set the node address. This binary address is interpreted by the firmware to determine whether or not a message is intended for that node. Therefore, using four jumpers, 16 different addresses theoretically can be set. Because of the way the address is processed, only 15 node addresses are possible. The node address of the board is equal to the jumper value plus 1. Therefore, with no jumpers set, the node address is 1. The exception occurs when jumpers are placed on all pins, which is also interpreted as node address 1. Note that node address 0 is not a valid address. Node 0 is reserved for packets broadcast to all other nodes. Table 3 contains the interpretation table Table 3. Node Address Table Jumper Value (binary) Node Address 0000 1 0001 2 0010 3 0011 4 0100 5 0101 6 0110 7 0111 8 AN005801-Z8X0500 Application Note RF Link Using the Z86E08 10 Table 3. Node Address Table Jumper Value (binary) Node Address 1000 9 1001 10 1010 11 1011 12 1100 13 1101 14 1110 15 1111 1 Summary This application provides a reliable and inexpensive start for developing a lowpower wireless data communications application. The application code readily fits into the 2-KB program space of the Z86E08, utilizing approximately 1.7KB. If additional I/O or code space is required, the code transfers to larger microcontrollers in the Z8 family. Technical Support Assembling the Application Code Any Z8 assembler can be used to assemble the application code, but ZiLOG Development Studio (ZDS) is recommended. This integrated suite of software tools allows for program file handling, editing, real-time emulation, and debugging when used with the appropriate emulator. Future versions of ZDS incorporate a CCompiler, simulator and trace buffer. See ZiLOGOs web page for news and free downloads of ZDS. Place the.ASM file into itOs own sub-directory. Invoke ZDS and select a new project from the file menu. Under Target Selection, select Family. Under Master Select, select Z8. Under Project Target, select Z86E08. Select the appropriate emulator type to be used. Browse to fill in the project name by clicking on the ... key. Select the sub-directory containing the.ASM file, name the project (the extension is added), click Save, and the first ZDS screen re-appears with the project name, path and file extension filled in. If everything is acceptable, click OK. AN005801-Z8X0500 Application Note RF Link Using the Z86E08 11 Click on the Project tab and select Add to Project. Then select Files. Double click on the RFLink.asm file. This file is displayed in the project window. Next, click on the Build tab and select Build. The Output window displays the assembly results. The standard assembler and linker settings produce listing and hex files along with the ZDS files in the same sub-directory. Save the project and its files by clicking on the File tab to select these options. The ZDS Project File is included and when the ZDS is installed, the above steps can be omitted for program assembly. Programming a One Time Programmable (OTP) is accomplished by selecting the OTP option with the hex code installed. Do not install the OTP until access to it is required, either for blank checking, verification, or programming. Insert a blank Z86E08 into the OTP socket and click on the program OTP selection. Differences exist between earlier GUIs and the ZDS, so take the time to read and understand the operation of the software in use. A recommendation is to pad unused memory locations with FFh before programming. If the padding is not consistently done, differences in the checksum occurs. Source Code ;-----------------------------------------------------------------------; RFZ8.ASM (Version 1.0) 12/17/99 ; Asynchronous 232 and RF Interface for Z86x08 ; Baud Rate is 9600 for both channels ; Half-Duplex Operation Mode. ; ; Signal Pin Z86E08 Pin Signal ; ----------- --------------------------; D3 P24 -- | 1 18 |-- P23 ID3 ; D4 P25 -- | 2 17 |-- P22 ID2 ; D5 P26 -- | 3 16 |-- P21 ID1 ; PTT_ P27 -- | 4 15 |-- P20 ID0 ; Power VCC -- | 5 14 |-- GND Ground ; Crystal Out XTAL2 -- | 6 13 |-- P02 SHDN_ ; Crystal In XTAL1 -- | 7 12 |-- P01 232_TX ; 232_RX P31 -- | 8 11 |-- P00 RTX ; RRX P32 -- | 9 10 |-; --------; ; SCLK = 6 MHz (FOSC = 12 MHz in OSC/2 Standard Mode) ; ; Assembler: ZDS V3.0 ; Best if viewed in Courier New 9 pt with 7 space tabs ;-----------------------------------------------------------------------GLOBALS ON DEFINE REGDATA, SPACE=RFILE ;************************************************************************ ;* Global Definitions ;************************************************************************ SEGMENT REGDATA AN005801-Z8X0500 Application Note RF Link Using the Z86E08 12 P0COPY P2COPY P3COPY RCV_STATUS FRAME_ERR MY_ADDR FROMFROM SERDATA RFDATA RETRY DATA_PTR SPCL_DATA COPYSIZE BYTECNT STARTBYTE TOFROM PACKET SIZE DATABUF FCSHI FCSLO ESTARTBYTE ETOFROM EPACKET EFCSHI EFCSLO TABLE DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS DS 4 1 1 1 1 1 1 1 1 1 1 1 1 14 1 1 1 1 1 1 1 33 1 1 1 1 1 1 1 19 16 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; Ports %04 %05 %06 %07 %08 %09 %0A %0B %0C %0D %0E %0F %10-1D %1E %1F %20 %21 %22 %23 %24 %25 %46 %47 %48 %49 %4A %4B %4C %4D %60-6F ;************************************************************************ ; Register Definitions ;************************************************************************ ; ; RCV_STATUS: ; BIT0 - PC_RCV Receiving Serial Data from PC ; BIT1 - RF_DATA_WAIT Waiting for RF Data (Preamble rcvd) ; BIT2 - PC_TIMEOUT Timeout of PC Channel occurred ; BIT3 - RF_TIMEOUT Timeout of RF Channel occurred ; BIT4 - RF_ECHO_FAIL Timeout of RF Channel awaiting echo ; BIT5 - RF_ECHO_WAIT Waiting for echo on RF channel ; BIT6 - EMPTY ; BIT7 - BROADCAST TOFROM=00 (from PC) for RF Broadcast ; ;************************************************************* ; RAM bank 0 (RP=00H for working register usage. Physical * ; addresses 00H to 0FH). * ;************************************************************* PORT_GRP _P0 _P2 _P3 _P2COPY .EQU .EQU .EQU .EQU .EQU 00h r0 r2 r3 r5 ; ; ; ; ; Register Work Port 0, 4-bit Port 2, 4-bit Port 3, 4-bit Port 2 shadow Group 0 address address address register AN005801-Z8X0500 Application Note RF Link Using the Z86E08 13 ;************************************************************* ; RAM bank 6 (RP=60H for working register usage. Physical * ; addresses 60H to 6FH). * ; This bank holds the table for DC balancing the RF output * ; This table is stored in RAM to increase the lookup speed * ;************************************************************* _TABLE NIBBLE0 NIBBLE1 NIBBLE2 NIBBLE3 NIBBLE4 NIBBLE5 NIBBLE6 NIBBLE7 NIBBLE8 NIBBLE9 NIBBLE10 NIBBLE11 NIBBLE12 NIBBLE13 NIBBLE14 NIBBLE15 .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU 60h; 15H 31H 32H 23H 34H 25H 26H 07H 38H 29H 2AH 0BH 2CH 0DH 0EH 1CH ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE NIBBLE = = = = = = = = = = = = = = = = 0 010101 1 110001 2 110010 3 100011 4 110100 5 100101 6 100110 7 000111 8 111000 9 101001 10 101010 11 001011 12 101100 13 001101 14 001110 15 011100 ;************************************************************* ; RAM bank F (RP=F0H for working register usage. Physical ; addresses F0H to FFH). ;************************************************************* CTRL_GRP _TMR _T1 _PRE1 _P2M _P3M _P01M _IPR _IMR _SPL .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU 0F0h r1 r2 r3 r6 r7 r8 r9 r11 r15 ; Register Work Group F ;Timer Mode Register ;Timer T1 ;T1 Prescaler ;Port 2 Mode Register ;Port 3 Mode Register ;Port 0/1 Mode Register ;Interrupt Priority Register ;Interrupt Mask Register ;Stack Pointer Low ;************************************************************** ;* Constants Definitions ;************************************************************** SCRATCHPAD .EQU 50h ; PC_PRE .EQU 07h ; PC_BAUD .EQU 156 ; 104us ~(9.6kbps) RF_BAUD .EQU 156 ; 104us ~(9.6kbps) BIT0 .EQU 01h ; Bit 0 mask BIT1 .EQU 02h ; Bit 1 mask BIT2 .EQU 04h ; Bit 2 mask BIT3 .EQU 08h ; Bit 3 mask BIT4 .EQU 10h ; Bit 4 mask BIT5 .EQU 20h ; Bit 5 mask BIT6 .EQU 40h ; Bit 6 mask BIT7 .EQU 80h ; Bit 7 mask MASK0 .EQU 0Eh ; Bit 0 Mask MASK1 .EQU 0Dh ; Bit 1 Mask AN005801-Z8X0500 Application Note RF Link Using the Z86E08 14 MASK_ID ON_232 OFF_232 PTT_ON PTT_OFF D3_ON D3_OFF D4_ON D4_OFF D5_ON D5_OFF RAM_TOP RAM_BOT RF_IMR PC_IMR PCRF_IMR TMR1_IMR TMR0_IMR TMR10_IMR PCTMR0_IMR RFTMR0_IMR RFTMR1_IMR .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU 0Fh 04h 0FBh 7Fh 80h 0E0h 10h 0D0h 20h 0B0h 40h 7Fh 07h 01h 04h 05h 20h 10h 30h 14h 11h 21h ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ID Mask Turn RS232 Drive On Turn RS232 Drive Off Turn PTT (RF Xmt) On Turn PTT (RF Xmt) Off Turn on D3 Turn off D3 Turn on D4 Turn off D4 Turn off D5 Turn off D5 Top of RAM Bottom of RAM IMR for IRQ0 (RF_RCV) IMR for IRQ2 (PC_RCV) IMR for IRQ2/IRQ0 IMR for IRQ5 (Timer1) IMR for IRQ4 (Timer0) IMR for IRQ5/IRQ4 IMR for IRQ2/IRQ4 IMR for IRQ2/IRQ4 IMR for IRQ2/IRQ5 ;************************************************************************ ; Interrupt Vector Table ;************************************************************************ SEGMENT code VECTOR VECTOR VECTOR VECTOR VECTOR VECTOR VECTOR IRQ0= RF_RCV IRQ1= START IRQ2= PC_RCV IRQ3= START IRQ4= TIMER0 IRQ5= TIMER1 RESET= START ;************************************************************************ ; Initialization Section ; Functions: ; 1) Initialize I/O ports ; 2) Clear memory (RAM) ; 3) Initialize DC Balance Table into RAM ; 4) Retrieve and process Protocol CCA address ; 5) Initialize Stack ; 6) Initialize interrupts and set interrupt priority ;************************************************************************ START: srp ld ld ld ld ld ld ld srp #0h P2COPY,#0F0h P0COPY,#02h P2, P2COPY P0, P0COPY P3M,#01h P2M,#00fh P01M,#04h #CTRL_GRP ; ; ; ; ; ; ; ; ; LEDs off, PTT off serial ports High, SHDN_ High Port3 -> Digital Inputs Port2 -> P24,P25,P26 Outputs Port1 -> P01-P03 Inputs AN005801-Z8X0500 Application Note RF Link Using the Z86E08 15 ld r15,#RAM_BOT ; Clear RAM from 07h to 7Fh clr inc cp jr @r15 r15 r15,#RAM_TOP+1 nz,initram ; RAM_BOT = 07h ; RAM_TOP = 7Fh ; ; srp ld ld ld ld ld ld ld ld ld ld ld ld ld ld ld ld #_TABLE r0,#NIBBLE0 r1,#NIBBLE1 r2,#NIBBLE2 r3,#NIBBLE3 r4,#NIBBLE4 r5,#NIBBLE5 r6,#NIBBLE6 r7,#NIBBLE7 r8,#NIBBLE8 r9,#NIBBLE9 r10,#NIBBLE10 r11,#NIBBLE11 r12,#NIBBLE12 r13,#NIBBLE13 r14,#NIBBLE14 r15,#NIBBLE15 ; This section initializes the ; BALANCE TABLE into RAM memory ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; or ld com inc and ld swap or P2COPY,P2 MY_ADDR,P2COPY MY_ADDR MY_ADDR MY_ADDR,#MASK_ID FROMFROM,MY_ADDR FROMFROM FROMFROM,MY_ADDR ; Retrieve and process board addr ; ; ; ; ; ; ; ld ld ld clr SPL,#80h IPR,#%20 IMR,#PCRF_IMR IRQ ; ; ; ; initram: Initialize stack interrupt priority: 3>5>2>0>4>1 enable IRQ0 and IRQ2 clear interrupts ;************************************************************************ ; Main Program ;************************************************************************ MAIN: or ld ei nop halt jr P2COPY,#70h P2,P2COPY MAIN ; ; ; ; ; ; Disable all diodes enable interrupts clear pipeline wait for next interrupt ;************************************************************************ ; Timeout Interrupt Service ; INPUT: RCV_STATUS ; DESCRIPTION: Uses RCV_STATUS register to determine cause of ; a data communications timeout of the PC or RF ports and resets ; the communications accordingly. AN005801-Z8X0500 Application Note RF Link Using the Z86E08 16 ;************************************************************************ TIMER0: clr tmr ; tm RCV_STATUS,#BIT7 ; test for Broadcast Echo jr nz,BROADCAST ; cp RCV_STATUS,#BIT0 ; test for PC Data fail jr z,PC_DATA_FAIL ; tm RCV_STATUS,#BIT5 ; test for Echo fail jr nz,RF_ECHO_FAIL ; tm RCV_STATUS,#BIT1 ; test for RF Data Fail jr nz,RF_DATA_FAIL ; call DELAY5MS ; delay 5ms before returning ld IMR,#PCRF_IMR ; enable IRQ0 and IRQ2 clr RCV_STATUS ; clr IRQ ; clear interrupts iret ; RF_DATA_FAIL: call DELAY5MS ; 5 ms delay jp RF_EXIT ; exit RF_RCV module RF_ECHO_FAIL: or RCV_STATUS,#BIT4 ; RF_Echo Timeout clr IRQ ; clear interrupts jp RF_RETRY ; retry PC_DATA_FAIL: jp PC_EXIT ; exit PC_RCV module BROADCAST: call PC_ECHO ; jp PC_WAIT10 ; wait 10ms for next byte TIMEOUT10: ld PRE0,#0F3h ; 10ms Timeout ld T0,#0FAh ; ld TMR,#03h ; ret ; TIMEOUT1: ld PRE0,#3Ch ; 1ms Timeout ld T0,#14h ; ld TMR,#03h ; ret ; ;*********************************************************************** ; PC_RCV (Interrupt Service) ; INPUT: Serial Data on P31 ; OUTPUT: SERDATA ; DESCRIPTION: Enter on falling edge of P31 (IRQ2) ; After a half bittime P31 is sampled again to validate ; the Start bit. Then IRQ5 is enabled and T1 is setup ; for bittime delay in continous mode. ;*********************************************************************** bitcnt rbuf hbcnt loopcnt rtxcnt .EQU .EQU .EQU .EQU .EQU r0 r1 r2 r12 r13 srp push #SCRATCHPAD IMR ; ; ; ; ; # of bits/word buffer halfbit count RF Retry count PC_RCV: ; ; save present interrupt mask AN005801-Z8X0500 Application Note RF Link Using the Z86E08 17 ld ld and ld ld PRE1,#07h T1,#PC_BAUD P2COPY,#D3_ON P2,P2COPY hbcnt,#04 ; ; ; ; ; Modulo-N, PSC=1, TCLK=SCLK/4=1us Baudrate = 9600 turn on PCRCV diode djnz tm jp hbcnt,HALF_BIT P3,#02h nz,PC_FAIL ; total delay ~ 25uS ; take Sample on P31: RX=0? ; if zero, Start bit is valid or ld clr ei ld TMR,#0ch IMR,#TMR1_IMR IRQ ; ; ; ; ; load and enable T1 enable IRQ5 clear interrupts enable interrupts number of data bits/word ; ; ; ; ; ; clear pipeline wait for next bit RX=0? if zero, then reset carry bit if one, then set carry bit "1" into buffer delay to half bit point HALF_BIT: START_OK: bitcnt,#08h RECEIVE_LP: nop halt tm jr scf jr P3,#BIT1 z,ZERO_IN COM_IN ZERO_IN: rcf ; reset carry; "0" into buffer COM_IN: rrc djnz rbuf ; carry into MSB, LSB into Carry bitcnt,RECEIVE_LP ; max loop delay = 108 SCLK (27us) GET_STOP: nop halt clr pop tm TMR IMR P3,#BIT1 ; clear pipeline ; wait for Stop Bit ; ; ; test Stop Bit jp cp jr cp jr cp jr jr z,PC_FAIL BYTECNT,#0h z,PCTOFROM BYTECNT,#1h z,PCPACKET BYTECNT,#2h z,PCSIZE PCDATA ; use BYTECNT to determine ; which word was received ; ; ; ; ; ; ld ld cp jr cp jr inc call jp DATA_PTR,#24h TOFROM,rbuf rbuf,#0h z,SPCLMSG rbuf,FROMFROM z,SPCLMSG BYTECNT PC_ECHO PC_WAIT ; ; ; ; ; ; ; ; ; inc ld jp BYTECNT RCV_STATUS,#BIT7 PC_WAIT1 ; Special Message ; RCV_STATUS = Broadcast ; wait 1ms for next byte PCTOFROM: if TO/FROM indicates 'special msg' no echo is returned and code waits for next byte. else go to LOCAL send echo to PC wait for next byte SPCLMSG: PCPACKET: AN005801-Z8X0500 Application Note RF Link Using the Z86E08 18 ld inc jp PACKET,rbuf BYTECNT PC_WAIT10 ; Save PCPACKET ; ; wait 10ms for next byte ld ld ld inc jp DATA_PTR,#24h SIZE,rbuf COPYSIZE,rbuf BYTECNT PC_WAIT10 ; Save PCSIZE ; ; ; ; wait 10ms for next byte ld inc dec jr jp @DATA_PTR,rbuf DATA_PTR COPYSIZE z,PCPROC PC_WAIT10 ; store message DATA ; increment RAM address ; ; ; wait 10ms for next byte TMR DATA_PTR,#44h gt,MSG_LONG PACKET,#0h z,XMT_SPECIAL FCS BYTECNT TMR DELAY5MS rtxcnt,#8h TOFROM,#0h z,RF_XMT_BCST ; ; ; ; ; ; ; ; ; ; ; ; RF_XMT DELAY3MS DELAY3MS ; transmit RF Data ; delay 6ms before 10ms timeout ; TIMEOUT10 IMR,#RFTMR0_IMR IRQ ; 10ms timeout for RF_ECHO ; Enable IRQ0 and IRQ2 ; ; PCSIZE: PCDATA: PCPROC: clr cp jr cp jr call clr clr call ld cp jr RF_XMT_CALL: call call call RFECHO_WAIT: call ld clr iret RF_XMT_BCST: call call djnz call jp TIMER1: clr iret XMT_SPECIAL: or ld ld call cp jr cp jr cp jr cp Process Message Data check if size > 32 bytes message is too long check if PACKET = 0 message is 'special' calculate FCS ld transmit counter = 8 Check TOFROM = 0 for 'broadcast' message RF_XMT ; RF Broadcast 8X DELAY100 ; 100ms delay between broadcasts rtxcnt,RF_XMT_BCST ; PC_NAK ; 'NAK' sent to PC after xmt PC_EXIT ; is completed. IRQ P0COPY,#ON_232 P0,P0COPY SERDATA,TOFROM PC_XMT DATABUF,#30h z,RESET DATABUF,#31h z,SEND_ADDR DATABUF,#32h z,SEND_BATT DATABUF,#33h ; ; ; ; ; ; ; ; ; ; ; ; ; ; clear interrupts Transmit response for 'Special' Enable 232 Drive Echo send echo to PC Software Reset Unit Address send unit node address Battery Status send battery status Self Test AN005801-Z8X0500 Application Note RF Link Using the Z86E08 19 jr cp jr z,SELF_TEST DATABUF,#34h z,SET_ADDR ; self Self Test pass/fail ; Set Address ; s/w setting of node address ld jr SPCL_DATA,#30h XMT_SPCL ; Message >32 Bytes ; jp START ; Software Reset ld jr SPCL_DATA,#35h XMT_SPCL ; Send Address ; call jp RAMTEST START ; Self Test ; ld jr SPCL_DATA,#32h XMT_SPCL ; Assume battery ok ; dec ld ld swap or ld jr DATA_PTR MY_ADDR,@DATA_PTR FROMFROM,MY_ADDR FROMFROM FROMFROM,MY_ADDR SPCL_DATA,#35h PC_EXIT ; S/W setting of Address ; ; ; ; ; ; ld call SERDATA,FROMFROM PC_XMT ; send FROMFROM ; ld call cp jr ld call SERDATA,#0h PC_XMT DATABUF,#34 nz,XMT_SPCL2 SERDATA,#0h PC_XMT ; send '00h' to PC ; ; ; ; send '00h' to PC ; ld call ld call jr SERDATA,#01h PC_XMT SERDATA,SPCL_DATA PC_XMT PC_EXIT ; send '01h' to PC ; ; send status byte to PC ; ; exit PC_RCV module ld ld clr iret RCV_STATUS,#BIT0 IMR,#PCTMR0_IMR IRQ ; ; ; ; RCV_STATUS = PC_RCV Enable IRQ2 and IRQ4 clear interrupts return to MAIN loop ld call ld clr iret RCV_STATUS,#BIT0 TIMEOUT10 IMR,#PCTMR0_IMR IRQ ; ; ; ; ; RCV_STATUS = PC_RCV 10ms timeout Enable IRQ2 and IRQ4 clear interrupts return to MAIN loop call ld clr iret TIMEOUT1 IMR,#PCTMR0_IMR IRQ ; ; ; ; 1ms timeout enable IRQ2 and IRQ4 clear interrupts return to MAIN loop MSG_LONG: RESET: SEND_ADDR: SELF_TEST: SEND_BATT: SET_ADDR: XMT_SPCL: XMT_SPCL1: XMT_SPCL2: PC_WAIT: PC_WAIT10: PC_WAIT1: PC_FAIL; AN005801-Z8X0500 Application Note RF Link Using the Z86E08 20 clr pop TMR IMR ; exit PC_RCV ; reload initial IMR and TMR and ld clr clr ld clr iret P0COPY,#OFF_232 P0,P0COPY RCV_STATUS BYTECNT IMR,#PCRF_IMR IRQ ; ; ; ; ; ; ; ld or ld call and ld ret SERDATA,TOFROM P0COPY,#ON_232 P0,P0COPY PC_XMT P0COPY,#OFF_232 P0,P0COPY ; ; ; ; ; ; ; PC_EXIT: Turn off 232 drive enable IRQ0 and IRQ2 clear interrupts return to MAIN loop PC_ECHO: Echo TOFROM back to PC Enable 232 drive Send Echo Disable 232 drive ;************************************************************************ ; Transmit RS232 Data (CALL) ; Input: SERDATA ; Output: Serial Data on P01 ; Format: | start | data | stop | ; start = active Low ; data = 8 bits ; stop = active High ;*********************************************************************** xbitcnt .EQU r3 ; data1 .EQU r4 ; data2 .EQU r5 ; dummy .EQU r6 ; PC_XMT: push push srp IMR RP #SCRATCHPAD ; ; ; or ld ld ld P0COPY,#BIT1 P0,P0COPY data1,SERDATA data2,#1 ; insure output is High ; ; load SERDATA into temp register ; shift in stop bit rcf rlc rlc data1 data2 ; reset Carry ; start bit into LSB ; now all bits are in TX_LP: ld ld ld ld ld clr ei nop halt xbitcnt,#10 PRE1,#PC_PRE T1,#PC_BAUD TMR,#0ch IMR,#TMR1_IMR IRQ ; ; ; ; ; ; ; ; ; number of bits (start,data,stop) PC Baudrate = 9600 ~ 104us load and enable timer enable IRQ5 bittime delay on T1 clear interrupts enable interrupts clear pipeline wait 104us to send next bit SEND_LP: rrc data2 ; LSB into Carry AN005801-Z8X0500 Application Note RF Link Using the Z86E08 21 rrc jr or jr data1 nc,ZERO_OUT P0COPY,#BIT1 COM_OUT ; Carry into MSB, LSB into Carry ; data bit zero? ; TX=1, '1' on output port ; and ld P0COPY,#MASK1 dummy,#0 ; TX=0, '0' on output port ; balance loop, 10 SCLK ld nop halt djnz clr pop pop ret P0,P0COPY ; Output at port, 50 SCLK delay (TX=1) ZERO_OUT: COM_OUT: xbitcnt,SEND_LP TMR RP IMR ; wait 104us to send next bit ; ; ; ; ; ;************************************************************************ ; RF_XMT: ; Performs transmission of RF Data Stream ; Input: STARTBYTE,TOFROM,PACKET,SIZE,DATABUF,FCSHI,FCSLO ; (RAM Address 20h...) ; Output: Serial Data on P01 ; Protocol: |0x55|TOFROM|PACKET|SIZE|0x02|DATA...|0x03|FCSHI|FCSLO| ; ;*********************************************************************** rf_ptr .EQU r0 ; rfsize .EQU r1 ; rfbits .EQU r2 ; rfpass .EQU r3 ; rfretry .EQU r4 ; table_ls .EQU r6 ; table_ms .EQU r7 ; dcb_ls .EQU r8 ; dcb_ms .EQU r9 ; loop_cnt .EQU r10 ; temp1 .EQU r11 ; RF_XMT: srp and ld call ld ld add ld #SCRATCHPAD P2COPY,#PTT_ON P2,P2COPY RF_TRAIN rf_ptr,#20h rfsize,SIZE rfsize,#4 STARTBYTE,#55h ; ; ; ; ; ; ; ; ld call inc djnz ld call ld call or ld SERDATA,@rf_ptr RF_SEND rf_ptr rfsize,XMT_LOOP SERDATA,FCSLO RF_SEND SERDATA,FCSHI RF_SEND P2COPY,#PTT_OFF P2,P2COPY ; ; ; ; ; ; ; ; ; ; Clear PTT to enable RF Xmit send preamble (DC Bal Training) pointer to start of data buffer # of bytes to send Add Headers, FCS, STARTBYTE = '55h' XMT_LOOP: XMT RF Data Loop send byte increment data pointer send FCSLO send FCSHI Disable RF Transmit AN005801-Z8X0500 Application Note RF Link Using the Z86E08 22 ld or call ret loop_cnt,#0FFh RCV_STATUS,#BIT5 DELAY3MS ; ; RCV_STATUS = RF_ECHO_WAIT ; delay 3ms ; ld ld push ld ld ld or clr ei nop halt or ld rfbits,#6 rfpass,#2 IMR IMR,#TMR1_IMR PRE1,#07h T1,#RF_BAUD TMR,#0ch IRQ ; ; ; ; ; ; ; ; ; ; ; ; ; ld ld and ld swap and ld table_ls,SERDATA ; Retrieve DC Balanced Value table_ms,table_ls ; for LS and MS Nibble of table_ls,#MASK_ID ; Data dcb_ls,TABLE(table_ls); r8 = LS (6 bits) table_ms ; table_ms,#MASK_ID ; dcb_ms,TABLE(table_ms); r9 = MS (6 bits) rrc jr and jr dcb_ls nc,ONE_OUT P0COPY,#MASK0 RF_OUT ; Inverted logic. ; ; data=1 sends a 0 on RTX. ; or P0COPY,#BIT0 ; clr nop halt ld djnz ld ld djnz nop halt IRQ P0,P0COPY rfbits,RFTX_LOOP dcb_ls,dcb_ms rfbits,#6 rfpass,RFTX_LOOP ; ; ; ; ; ; ; ; ; ; and ld pop clr ret P0COPY,#0FEh P0,P0COPY IMR IRQ ; send stop bit ; ; ; clear interrupts ; push ld ld ld ld or clr IMR rfpass,#12 IMR,#TMR1_IMR PRE1,#07h T1,#RF_BAUD TMR,#0ch IRQ ; ; ; ; ; ; ; RF_SEND: P0COPY,#1 P0,P0COPY # of bits/pass # of passes (2 6-bit xmits) enable IRQ5 bittime delay on T1 continous mode T1, TCLK=SLCK/4=1us set T1 for baud rate 9600 load and enable timer clear interrupts enable interrupts clear pipeline wait 104us to send next bit send start bit DC_BAL: RFTX_LOOP: ONE_OUT: RF_OUT: Transmit loop (12 bits) clear pipeline wait 104us to send next bit 6 bits/pass 2 passes clear pipeline wait 104us to send next bit RF_TRAIN: Output 24 bit alternating 1,0,1,0 pulses to 'train' the DC Balance of the RF Transmitter (preamble) RF_BAUD = 9600 load and enable timer clear interrupts AN005801-Z8X0500 Application Note RF Link Using the Z86E08 23 ei ; enable interrupts TRAIN_LOOP: nop halt or ld clr ei nop halt and ld djnz pop ret ; ; P0COPY,#1 ; P0,P0COPY ; IRQ ; ; ; ; P0COPY,#0FEh ; P0,P0COPY ; rfpass,TRAIN_LOOP ; IMR ; ; clear pipeline wait 104us to send next bit send '1' clear interrupts enable interrupts clear pipeline wait 104us to send next bit send a '0' loop 12 times ;***************************************************************************** ; RF_RCV: ; Entry: Enter module from IRQ0, falling edge of P32 ; INPUT: Serial Data on P32 ; Definition: Module reacts to incoming data on P31 RF serial input. Input ; should be 1 start bit, 12 data bits, 1 stop bit. Each bit is sampled ; 11X for verification. After 6 data bits have been received, the data ; is run through the 6to4 module to convert from 12 bit data format to ; 8 bit data format. After 12 bits are received, the data is combined ; into a 8-bit word and stored in RAM (0x20 to 0x45) ; Memory map for RAM is as follows: ; Start Finish Reg Description ; 0x20 0x20 r0 RF Start Byte (0x55) ; 0x21 0x21 r1 RF TO/FROM ; 0x22 0x22 r2 RFPACKET# ; 0x23 0x23 r3 RF Size ; 0x24 0x24 r4 Start byte (0x02) ; 0x24 0x43 RF Data ; 0x44 0x44 r4 Stop byte (0x03) ; 0x45 0x45 r5 RFFCSHI ; 0x46 0x46 r6 RFFCSLO ; After each byte is received, the module will exit to the MAIN loop ; to await the next interrupt. If the wait loop times out (1ms), the ; module will be exited and an error flag risen. After the FCS data is ; stored, the FCS module is called to calculate and verify the FCS ; for the data stream. If the FCS is verified, then the RFECHO module ; is called and an ECHO/ACKNOWLEDGE is transmitted back on the RF link ; to acknowledge receipt of the data. ; BROADCAST: ; In the special case of BROADCAST: When a TOFROM=00h is detected, the ; ECHO is skipped and the software enters a 100ms delay loop to wait out ; the 8x broadcast of the message. ; RF NOISE FILTERING: ; 1) 11X oversampling - Each bit is sampled 11X to determine the value ; 2) RF Data Validation - Each time the potential start of a message ; is received (Training Pulses), the 1st, 2nd, and 3rd bits of the ; training pulses are verified. The purpose of this is to filter ; RF noise and ensure that a valid message is being received ; before delaying past the remaining pulses and entering the main ; loop. ;***************************************************************************** * AN005801-Z8X0500 Application Note RF Link Using the Z86E08 24 rx_ptr rfdata rffcshi rffcslo cmp_val bits nibcnt p32mask lonib hinib rf_size rftofrom pdata result .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 ; ; ; ; ; ; ; ; ; ; ; ; ; ; RF_RCV: srp push and ld RF_TRAIN_TEST: ld ld ld or tm jr RF_RCV_TRAIN: ld NLOOP: nop djnz ld call cp jr clr ei nop halt call cp jr clr ei nop halt call cp jr RF_INVALID: pop clr iret RF_VALID: ld ld #SCRATCHPAD IMR P2COPY,#D5_ON P2,P2COPY ; ; ; Enable RXI Diode ; PRE1,#07h T1,#RF_BAUD IMR,#TMR1_IMR TMR,#0ch RCV_STATUS,#BIT1 nz,RF_RCV_DATA ; ; ; ; ; ; nibcnt,#11 ; nibcnt,NLOOP p32mask,#04h RF_SAMPLE result,#16h ugt,RF_INVALID IRQ RF_SAMPLE result,#16h ult,RF_INVALID IRQ RF_SAMPLE result,#16h ult,RF_VALID ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; Verify first 3 pulses of pulse train (preamble). Return to main if any one is invalid enable timer if RCV_STATUS = RF_DATA_WAIT skip preamble check delay to ~ middle of pulse P32 Test Mask test Sample#1=0 sample time ~ 40us (50-90us) invalid bit if result > 16h clear interrupts enable interrupts clear pipeline wait 104us for next bit test for valid Sample#2 sample time ~ 40us (50-90us) invalid bit if result < 16h clear interrupts enable interrupts clear pipeline wait 104us for next bit Test for valid Sample#3 sample time ~40us (50-90us) invalid bit if result > 16h IMR IRQ ; if preamble test fails, ; restore IMR and return to ; MAIN loop PRE1,#57h T1,#RF_BAUD ; if preamble test passes ; delay 21 x 104us (21 pulses) AN005801-Z8X0500 Application Note RF Link Using the Z86E08 25 ld ld clr ei nop halt or pop clr iret RF_RCV_DATA: pop ld ld ld ld ld clr ei SB_SAMPLE: call cp jp RFNIB_LP: ld clr RFRCV_OLP: nop halt RFRCV_SAMPLE: call cp jr LOGIC0: rcf rrc djnz jr LOGIC1: scf rrc djnz STORE: rr rr and CONV6TO4: cp jp cp jp SIX_OK: cp jr clr jr CHECK1: cp IMR,#TMR1_IMR TMR,#0ch IRQ RCV_STATUS,#BIT1 IMR IRQ ; ; ; ; ; ; ; ; ; ; to start of message clear interrupts enable interrupts clear pipeline wait 104us for next bit Set Status = RF_DATA_WAIT restore IMR clear interrupts return to MAIN loop IMR PRE1,#07h T1,#RF_BAUD IMR,#TMR1_IMR TMR,#0ch nibcnt,#2 IRQ ; ; ; ; ; ; ; ; RF_SAMPLE result,#16h gt,RF_FAIL ; 11x sampling of input ; Compare to 22 (14h) ; Error if not zero bits,#6 r12 ; number of data bits ; set timer0 = 104us load and enable T1 2 6-bit nibbles/word clear interrupts enable interrupts ; clear pipeline ; wait 104us for next bit RF_SAMPLE result,#16h gt,LOGIC1 ; 11x sampling of input ; compare to 22 (16h) ; if > 16, data = 1 rfdata bits,RFRCV_OLP STORE ; set carry flag ; rotate '1' into byte ; ; rfdata bits,RFRCV_OLP ; clear carry flag ; rotate '0' into byte ; rfdata rfdata rfdata,#3Fh ; format data and convert ; dc balanced (12 bit) data ; rfdata,#7h lt,RF_FAIL rfdata,#38h gt,RF_FAIL ; verify 7 <= R13 <= 38 ; DC Balanced data is invalid ; if not withing this range ; rfdata,#15h ne,CHECK1 rfdata SIXOUT ; if 15, then return 0 ; '15' corresponds to value '0' ; in the DC Balance Table ; rfdata,#1Ch ; elseif 1C, then return 15 AN005801-Z8X0500 Application Note RF Link Using the Z86E08 26 jr ld jr ne,CHECK2 rfdata,#0fh SIXOUT ; '1C' corresponds to value '15' ; in the DC Balance TAble ; and rfdata,#0fh ; elseif return Low nibble djnz nibcnt,LONIBBLE ; ld jr hinib,rfdata COMBINE ; store results for hinibble ; ld jr lonib,rfdata RFNIB_LP ; store results for lonibble ; swap or ld hinib hinib,lonib RFDATA,hinib ; swamp nibbles to format data ; ; RFDATA <= RESULT TMR RCV_STATUS,#BIT5 z,RF_PROCESS ; ; ; ; ; CHECK2: SIXOUT: HINIBBLE: LONIBBLE: COMBINE: RFSTOP: nop halt clr tm jr clear pipeline wait 104us if RCV_STATUS = RF_ECHO_WAIT then received data is RF ECHO data ;***************************************************************************** ; RFECHO_PROCESS: ; Entry: Enter module from RF_RCV ; Definition: Module takes data from RF_RCV and determines where ; in SRAM each byte should be stored. ;***************************************************************************** RFECHO_PROCESS: cp BYTECNT,#0 ; use BYTECNT to determine which jr z,RFETOFROM ; databyte was received cp BYTECNT,#1 ; jr z,RFEPACKET ; cp BYTECNT,#2 ; jr z,RFESIZE ; jr RF_RETRY ; RFETOFROM: cp RFDATA,TOFROM ; verify TOFROM is valid jr nz,RF_RETRY ; if not, RETRY inc BYTECNT ; jp RFECHO_WAIT ; wait for next byte RFEPACKET: cp RFDATA,PACKET ; verify PACKET # jr nz,RF_RETRY ; if not, RETRY inc BYTECNT ; jp RFECHO_WAIT ; wait for next byte RFESIZE: cp RFDATA,SIZE ; verify SIZE is valid jr nz,RF_RETRY ; if not, RETRY inc RETRY ; call PC_ACK ; if valid, send ACK to PC jp RF_XMT_EXIT ; RF_RETRY: call DELAY100 ; 100ms delay between retries inc RETRY ; ld RCV_STATUS,#BIT5 ; RCV_STATUS = RF_ECHO_WAIT AN005801-Z8X0500 Application Note RF Link Using the Z86E08 27 cp RETRY,#8h ; jp nz,RF_XMT_CALL ; send RF Message RF_XMT_FAIL: call PC_NAK ; RF_XMT_EXIT: clr RETRY ; exit the module clr BYTECNT ; clear globals clr RCV_STATUS ; ld IMR,#PCRF_IMR ; enable IRQ0 and IRQ2 clr IRQ ; clear interrupts iret ; return to MAIN loop ;***************************************************************************** ; RF_PROCESS: (JUMP) ; Entry: Enter module from RF_RCV ; Definition: Module takes data from RF_RCV and determines where ; in SRAM each byte should be stored. ;***************************************************************************** RF_PROCESS: cp BYTECNT,#0h ; use BYTECNT to determine which jr z,RFSTARTBYTE ; databyte was received cp BYTECNT,#1h ; jr z,RFTOFROM ; cp BYTECNT,#2h ; jr z,RFPACKET ; cp BYTECNT,#3 ; jr z,RFSIZE ; jr RFDATABUF ; RFSTARTBYTE: cp RFDATA,#55h ; verify the STARTBYTE = 55h jr nz,RF_FAIL ; ld STARTBYTE,RFDATA ; inc BYTECNT ; jr RF_WAIT ; wait for next byte RFTOFROM: ld rx_ptr,#24h ; store TOFROM ld TOFROM,RFDATA ; inc BYTECNT ; jr RF_WAIT ; wait for next byte RFPACKET: ld PACKET,RFDATA ; store PACKET # inc BYTECNT ; jr RF_WAIT ; wait for next byte RFSIZE: ld SIZE,RFDATA ; store SIZE (# of data bytes) ld rf_size,SIZE ; add rf_size,#2 ; add 2 to account for FCS bytes inc BYTECNT ; in determining message size jr RF_WAIT ; wait for next byte RFDATABUF: ld @rx_ptr,RFDATA ; store message data bytes inc rx_ptr ; rf_size = # of bytes djnz rf_size,RF_WAIT ; dec ld dec ld jr rx_ptr EFCSHI,@rx_ptr rx_ptr EFCSLO,@rx_ptr RF_VERIFY ; ; ; ; ; Load FCS into global variables for compare with calculated values verification of RF Message AN005801-Z8X0500 Application Note RF Link Using the Z86E08 28 RF_WAIT: ld call ld clr iret RCV_STATUS,#BIT1 TIMEOUT1 IMR,#RFTMR0_IMR IRQ ; ; ; ; ; RCV_STATUS = RF_DATA_WAIT (causes s/w to skip preamble test) enable IRQ0 and IRQ4 clear interrupts return to MAIN loop cp jr ld swap and cp jr PACK_VERIFY: cp jr cp jr call cp jr cp jr call call cp jr jr RF_FAIL: tm jr clr jp RF_EXIT: clr clr ld clr iret DELAY1200: ld D1200_LOOP: call djnz jr TOFROM,#0h z,PACK_VERIFY rftofrom,TOFROM rftofrom rftofrom,#0fh rftofrom,MY_ADDR nz,RF_EXIT ; ; ; ; ; ; ; if TOFROM = 0, message is a 'BROADCAST' message else verify TO Address PACKET,#8h gt,RF_EXIT PACKET,#1h lt,RF_EXIT FCS FCSHI,EFCSHI nz,RF_EXIT FCSLO,EFCSLO nz,RF_EXIT RF_ACK PC_XMT_DATA TOFROM,#0h z,DELAY1200 RF_EXIT ; ; ; ; ; ; ; ; ; ; ; ; ; ; verify Valid Packet # if 1 <= PACKET <=8 else PACKET # is invalid and module is exited verify FCS (checksum) compare calclated (FCSHI/LO) to the received (EFCSHI/LO) exit if FCS fails RCV_STATUS,#BIT5 z,RF_EXIT BYTECNT RF_RETRY ; if RCV_STATUS = RF_ECHO_WAIT ; exit module ; ; else RETRY BYTECNT RCV_STATUS IMR,#PCRF_IMR IRQ ; ; ; ; ; r12,#240 ; 1200ms delay loop DELAY5MS r12,D1200_LOOP RF_EXIT ; perform 240 5ms delay loops ; ; RF_VERIFY: exit if address not equal to MY_ADDR Send 'ACK' to PC if FCS is okay transmit Message to PC Check if message is a 'BROADCAST' if 'BROADCAST', Delay 1.2ms then exit module clear global variables enable IRQ0 and IRQ2 clear interrupts return to MAIN loop ;***************************************************************************** ; RF_SAMPLE: (CALL) ; Entry: Enter module from RF_RCV ; INPUT: Serial Data on P32 ; OUTPUT: 'result' (local variable) ; Definition: Module sample P32 input 11 times. P32 is masked and ; a running sum is calculated in the 'result' register. This 'result' ; is used to determine whether the average sample was a '1' or '0' by ; comparing the value to 16h (22). ;***************************************************************************** RF_SAMPLE: AN005801-Z8X0500 Application Note RF Link Using the Z86E08 29 clr ld and ld and add ld and add ld and add ld and add ld and add ld and add ld and add ld and add ld and add ld and add ret result result,P3 result,p32mask pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata pdata,P3 pdata,p32mask result,pdata ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 11X Sampling of P32 Sample #1 Sample #2 Sample #3 Sample #4 Sample #5 Sample #6 Sample #7 Sample #8 Sample #9 Sample #10 Sample #11 sum results ;************************************************************* ; PC_XMT_DATA: (CALL) ; INPUT: RF DATA SRAM ADDR 0x21 to End of data ; OUTPUT: Serial Data on P01 ; Description: Transmits Rf data received by RRX to the host ; software (PC). ;************************************************************* pc_ptr .EQU r0 ; pc_size .EQU r1 ; PC_XMT_DATA: call and ld or ld ld ld ld call ld call ld DELAY5MS P2COPY,#D4_ON P2,P2COPY P0COPY,#ON_232 P0,P0COPY pc_ptr,#24h pc_size,SIZE SERDATA,TOFROM PC_XMT SERDATA,PACKET PC_XMT SERDATA,SIZE ; ; ; ; ; ; ; ; ; ; ; ; turn on RFRCV Diode enable 232 set pointer to DATA Buffer transmit protocol info send TOFROM byte send PACKET byte AN005801-Z8X0500 Application Note RF Link Using the Z86E08 30 call PC_XMT ; send SIZE byte ld call inc djnz SERDATA,@pc_ptr ; send message data PC_XMT ; pc_ptr ; pc_size,PCXMT_LOOP; and ld or ld ret P0COPY,#OFF_232 P0,P0COPY P2COPY,#D4_OFF P2,P2COPY call call and ld call ld call ld call ld call or ld ret DELAY5MS DELAY5MS P2COPY,#PTT_ON P2,P2COPY RF_TRAIN SERDATA,TOFROM RF_SEND SERDATA,PACKET RF_SEND SERDATA,SIZE RF_SEND P2COPY,#PTT_OFF P2,P2COPY call or ld ld call ld call ld call and ld ret DELAY5MS P0COPY,#ON_232 P0,P0COPY SERDATA,TOFROM PC_XMT SERDATA,PACKET PC_XMT SERDATA,#0DDh PC_XMT P0COPY,#OFF_232 P0,P0COPY ; ; ; ; ; ; ; ; ; ; ; ; call or ld ld call ld call ld or call and ld ret DELAY5MS P0COPY,#ON_232 P0,P0COPY SERDATA,TOFROM PC_XMT SERDATA,PACKET PC_XMT SERDATA,#0E0h SERDATA,RETRY PC_XMT P0COPY,#OFF_232 P0,P0COPY ; ; ; ; ; ; ; ; ; ; ; ; di push ld IMR PRE1,#7Bh ; 5ms Delay routine ; ; PCXMT_LOOP: RF_ACK: ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; Disable 232 Turn off RFRCV Diode sends RF_ACK to RF msg originator Delay 10ms to allow xmtr power to stabilize Enable RF Transmit send preamble (DC Balance Train) Transmits Acknowledge to RF Link send TOFROM byte send PACKET byte send SIZE byte Disable RF Transmit PC_NAK: sends NAK to PC (retry failed 8X) Enable 232 format = |TOFROM|PACKET|DDh| send TOFROM byte send PACKET byte send 'DDh' byte Disable 232 PC_ACK: sends ACK to PC Enable 232 format = |TOFROM|PACKET|En| n = RETRY send TOFROM byte send PACKET byte send 'En' byte Disable 232 DELAY5MS: AN005801-Z8X0500 Application Note RF Link Using the Z86E08 31 ld ld ld clr ei nop halt pop ret T1,#0FAh IMR,#TMR1_IMR TMR,#0Ch IRQ IMR ; ; ; ; ; ; ; ; ; enable interrupts clear interrupts enable interrupts clear pipeline wait 5ms restore IMR DELAY3MS: di push ld ld ld ld clr ei nop halt pop ret IMR PRE1,#0F3h T1,#04Bh IMR,#TMR1_IMR TMR,#0Ch IRQ IMR ; ; ; ; ; ; ; ; ; ; ; ; 3ms delay routine enable IRQ5 clear interrupts enable interrupts clear pipeline wait 3ms restore IMR RAMTEST: push srp ld ld RP #0h R13,TOFROM DATA_PTR,#10h ; RAM Self Test ; ; ; ld inc cp jr ld @DATA_PTR,#0AAh DATA_PTR DATA_PTR,#76h nz,RAMWR DATA_PTR,#10h ; ; ; ; ; cp jr inc cp jr jr @DATA_PTR,#0AAh nz,RAMFAIL DATA_PTR DATA_PTR,#76h nz,RAMRD RAMPASS ; read memory and verify 'AA' ; ; ; ; ; ld jr r15,#33h RAMCLR ; send '33h' if RAM fails ; clear RAM ld r15,#34h ; send '34h' if RAM passes ld DATA_PTR,#10h ; clear RAM from '10h' to '76h' clr inc cp jr @DATA_PTR DATA_PTR DATA_PTR,#76h nz,RAMCLR1 ; ; ; ; ld call ld call ld SERDATA,#0 PC_XMT SERDATA,#0 PC_XMT SERDATA,#1 ; transmit test status to PC ; send '00' to PC ; ; send '00' to PC ; RAMWR: ld 'AA' into memory from address '10h' to '76' avoids overwriting data and stack RAMRD: RAMFAIL: RAMPASS: RAMCLR: RAMCLR1: RAM_XMT: AN005801-Z8X0500 Application Note RF Link Using the Z86E08 32 call ld call pop ret PC_XMT SERDATA,r15 PC_XMT RP ; send '01' to PC ; ; send '33h' to '34h' to PC ; restore RP ; push srp ld RP #SCRATCHPAD r12,#20 ; 100ms delay routine ; ; call djnz pop ret DELAY5MS r12,D100_LOOP RP ; perform 20 5ms delays ; ; ; DELAY100: D100_LOOP: ;************************************************************************ ; FCS: Performs FCS Checksum calculation ; ; Input: DATABUF (all data contained in SRAM) ; Output: FCSHI,FCSLO ; ; Output placed at end of the data buffer ; This section uses register group 50h as a scratchpad ;************************************************************************ fcs_ptr fsize fbitcnt fdata1 fdata2 fcsls fcsms ftemp1 ftemp2 .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU r0 r2 r3 r4 r5 r6 r7 r8 r9 ; ; ; ; ; ; ; ; ; srp ld add ld #SCRATCHPAD fsize,SIZE fsize,#03h fcs_ptr,#21h ; ; ; ; ld ld fcsls,#0ffh fcsms,#0ffh ; preset FCS ; ld ld inc fbitcnt,#08h fdata1,@fcs_ptr fcs_ptr ; Process 8 bits/byte ; ; increment for next pass ld and rr ftemp1,fdata1 ftemp1,#1 fdata1 ; ; get LSB ; rotate for next pass ld and fdata2,fcsls fdata2,#1 ; ; LS byte of FCS FCS: set register pointer to scratchpad calculate # bytes to process by adding (size +3) FCS starts with TO/FROM byte FCS21: FCS22: ;************************************************************************ ; 16 bit shift of FCS ;************************************************************************ AN005801-Z8X0500 Application Note RF Link Using the Z86E08 33 rcf ; rrc fcsms ; from buffer rrc fcsls ; from FCS ;************************************************************************ ; Compare Bits saved from buffer and from LS bit of LS byte of FCS ;************************************************************************ ld ftemp2,ftemp1 ; Use r8 as temp xor ftemp2,fdata2 ; jp z,FCS23 ; jump if r8=0 xor fcsms,#84h ; xor with poly xor fcsls,#08h ; FCS23: djnz fbitcnt,FCS22 ; go for another bit djnz fsize,FCS21 ; go for another byte ld FCSHI,fcsls ; store FCS data in data buffer inc DATA_PTR ; ld FCSLO,fcsms ; ret ; return for FCS in r7,r6 ;************************************************************************ ; Add FCS Buffer to XMIT ;************************************************************************ ADD_FCS: ld fsize,#8h ; RLOOP1: rrc fcsms ; rlc ftemp1 ; djnz fsize,RLOOP1 ; com ftemp1 ; ld @fcs_ptr,ftemp1 ; ld FCSHI,ftemp1 ; inc ld fcs_ptr fsize,#8h ; ; rrc rlc djnz com ld ld ret fcsls ftemp1 fsize,RLOOP2 ftemp1 @fcs_ptr,ftemp1 FCSLO,ftemp1 ; ; ; ; ; ; ; RLOOP2: END AN005801-Z8X0500 Application Note RF Link Using the Z86E08 34 Flow Diagrams Figure 2. Software Flow Block Diagram Power On Initialize Z8 ports Clear RAM Initialize DC Balance Table into RAM Retrieve Board Address Main Loop IRQ2 IRQ0 PC_RCV Module Receive PC Serial Data PC_XMT Module Send Response to PC Yes RF_RCV Module Receive RF Serial Data FCS Module Calculate FCS for Message Is Message a Special? No No FCS Verify? FCS Module Calculate FCS for Message Yes PC_ACK Module Send acknowledge to PC RF_XMT Module Transmit Message on RF RF_ACK Send RF Acknowledge Yes RF_ACK Received? No Yes No PC_NAK Module Send fail to PC Yes PC_XMT Transmit message to PC Is Msg a Broadcast? Retry = 8? No Is Msg a Broadcast? No Yes Delay 600ms No Increment Retry Delay 100ms AN005801-Z8X0500 Application Note RF Link Using the Z86E08 35 Figure 3. Receiving RF Serial Communication Flow Diagram IRQ2 Wait for 1/2 bit time (52us) Sample P31 data pin P31 = 0? Yes Mask IRQ2 & Enable IRQ5 Clear serial word buffer Initialize bit counter Halt 104 us IRQ5 No Data bit = 1, rotate into word buffer Yes P31 = 0? 7 Data bit = 0, rotate into word buffer No Decrement Bit Counter P31 = 0? Yes Halt 104 us IRQ5 P31 = 0? No Stop Bit Fail Yes Stop Bit OK, store byte Yes Process Message Yes End of Message? No Return Disable T1, reenable IRQ0,IRQ2 AN005801-Z8X0500 Application Note RF Link Using the Z86E08 36 Timing Diagrams Figure 4. PC Data Message Packet Transmission PC #1 RS232: | TO/FROM | echo 110us Protocol CCA #1 RS232: TO/FROM 110us to 1.3ms | Packet # | Size | Message (up to 32 bytes) | Figure 5. PC Special Message Packet Transmission Reset: PC #1 RS232: | FROM/FROM | 00h | 01h | 30h | echo 110us Protocol CCA #1 RS232: | FROM/FROM | Send Node Address: PC #1 RS232: | 00h | 00h | 01h | 31h | echo 110us Protocol CCA #1 RS232: | 00h | FROM/FROM | 00h | 01h | 35h | Set Node Address: PC #1 RS232: | 00h | 00h | 02h | 32h | ADDR | echo 110us Protocol CCA #1 RS232: | 00h | Run Self Test: PC #1 RS232: | FROM/FROM | 00h | 01h | 33h | echo 110us Protocol CCA #1 RS232: |FROM/FROM | 2.2ms |00h | 00h | 01h | 33h or 34h | Figure 6. Typical Timing for Message Transmission PC #1 RS232: TOFROM 110us PCDATA echo Protocol CCA #1 RS232: Protocol CCA #1 RF: Protocol CCA #2 RF: Protocol CCA #2 RS232: 110us TOFROM 110us 110us PC ACK 110us PCMSG RFMSG 110us RF ACK AN005801-Z8X0500 Application Note RF Link Using the Z86E08 37 Figure 7. RF Retry Timing retry #2 Protocol CCA #1 RF: RF MSG#1 10ms Timeout 100ms Delay RF MSG#1 10ms Timeout 100ms Delay RF MSG#1 110us Protocol CCA #2 RF: RF ACK Figure 8. RF Communications Timeout retry #7 Protocol CCA #1 RF: RF MSG#1 10ms Timeout 25ms Delay Protocol CCA #1 RS232: RF NAK Figure 9. Broadcast Timing broadcast#1 Protocol CCA #1 RF: RF MSG#1 broadcast#2 100ms delay RF MSG#1 broadcast#7 .............. RF MSG#1 broadcast#8 100ms delay RF MSG#1 Timing Diagram Glossary The glossary below defines terms used in the timing diagrams above (Figures 4 through 9). TOFROM. The first nibble is the node address of the intended receiver. The second nibble is the node address of the sender. PCDATA. All remaining bytes of a PC data message packet, excluding the TOFROM address. RF MSG. The RF message packet. RF ACK. A message to the RF packet originator acknowledging receipt of a valid message packet. PCMSG. A PC message packet. PC ACK. A message to the PC acknowledging successful transmission and receipt of an RF message packet. AN005801-Z8X0500 Application Note RF Link Using the Z86E08 38 RF NAK. A message from Protocol CCA to the PC indicating that the RF communications timed out without receiving a valid RF message acknowledgment. Test Procedure Equipment Used Testing the application requires the following items: 2 Protocol CCAs with programmed Z86E08 2 DR1200/1-DK or 2 DR1004/5-DK Data Radios Two Windows 95/98-based PCs, each with: RFM Terminal Program One available 9-pin serial port Z86CCP01ZEM (CCP Emulator) 8V @0.8 Amp power supply (for emulator power) General Test Setup and Execution For simplicity, exercise the application by using two programmed Z86E08 devices in the Protocol CCAs rather than running the application from the emulator. If an emulator is used for one of the nodes, then two serial ports are required on that PC: one for the emulator and one for the applications RS-232 interface.To assemble the code and to program a device, follow the instructions as detailed in the Assembling the Application Code section. The RFM Terminal Program provides a medium for sending plain-text ASCII messages from one PC for display on another PC. The program can be obtained either by purchasing the Virtual Wire Design Kit or from the RFM web page at www.rfm.com. To install the program, create a directory on Version 2 of the Terminal Program (vwt97v02.exe). When the files are installed, edit the vwt97.cfg file. The .cfg file is a one-line ASCII file containing the communications port number, baud rate, and TO node address. Edit the line as follows: *COM1:""9600""2* Ensure that the Data Radio is properly installed onto the Protocol CCA. Set the node address of each Protocol CCA by removing or installing jumpers on the address pins. Note the address of each Protocol CCA. Attach each Protocol CCA to a PC serial port either directly or through a serial cable. AN005801-Z8X0500 Application Note RF Link Using the Z86E08 39 Test Results Apply power to the Protocol CCAs by moving the power switch to the ON position. Start the terminal program Execute the Terminal Program Executable File (.exe) on both PCs to start the terminal program.by Upon execution, the program automatically polls the Protocol CCA for the node address. When the program obtains the node address, the program displays the terminal screen. The following list identifies the commands that can be executed from the terminal screen. Esc: End Task ALT-A: Read Node Number ALT-B: Broadcast Mode ALT-C: Clear Screen ALT-D: Decrement TO Node Address ALT-H: Help Screen ALT-I: Increment TO Node Address ALT-R: Protocol CCA Reset ALT-S: Protocol CCA Self Test ALT-X: Exit Program CTL-N: Software Setting of Node Address Function Key F1: Sends multi-packet test message (30 bytes) The terminal screen contains three windows. The MESSAGES RECEIVED window displays message packets received from other nodes. The ENTER MESSAGE TO SEND window receives message packets to be sent to other nodes. The MESSAGES SENT window contains a history of message packets sent to other nodes. Note that this window displays the start byte and end byte characters of the message packet as J and (c) respectively. This window also displays the packet number and the status of sent packages. The status is indicated by several different messages. If the packet is transmitted successfully, the status indicates RX OK ON retry with retry being the number of packet transmission attempts before the messages were successfully acknowledged. If after eight tries, the packet remains unacknowledged, a LINK FAULT status is displayed. If the PC loses communication with the Protocol CCA, a TIME-OUT UNIT NOT RESPONDING status is displayed. References RFM Virtual Wire Development Kit Manual. RF Monolithics, Inc., 1999. RFM ASH Transceiver DesignerOs Guide. RF Monolithics, Inc., 1999. ZiLOG Z8 Microcontroller UserOs Manual. UM97Z8X0104. ZiLOG Inc., 1997. AN005801-Z8X0500 Application Note RF Link Using the Z86E08 40 Appendix Figure 10. RF Link Schematic AN005801-Z8X0500