HD74HC83 4-bit Binary Full Adder (with Fast Carry) REJ03D0554-0200 (Previous ADE-205-426) Rev.2.00 Oct 06, 2005 Description This improved full adder performs the addition of two 4-bit binary numbers. The sum () output are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. This adder features full internal look ahead across all four bit generating the carry term in ten nanoseconds typically. This provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation. Features * * * * * * High Speed Operation: tpd (Ai or Bi to Zi) = 16 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information Part Name Package Type HD74HC83FPEL SOP-16 pin (JEITA) HD74HC83RPEL SOP-16 pin (JEDEC) Package Code (Previous Code) PRSP0016DH-B (FP-16DAV) PRSP0016DG-A (FP-16DNV) Package Abbreviation FP EL (2,000 pcs/reel) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Rev.2.00, Oct 06, 2005 page 1 of 6 Taping Abbreviation (Quantity) HD74HC83 Function Table Outputs Inputs When C0 = L / When C2 = L 1 / 3 2 / 4 C2 / C4 When C0 = H / When C2 = H 1 / 3 2 / 4 C2 / C4 A1 / A3 B1 / B3 A1 / A3 A1 / A3 L H L L L L L L L H L L L L H L L H L L L H H H L L L L H L L H L L L H H H L L L H L L H H L L L H H H L L H L H L L H L H H H H H L L H L H L L H L H L L H H L H L L L L H H L H H H L L H L H L L H L H H H L L H H H L H L L H L H L L H H L H L L H H H H L H L L H H H L L H H H L H H H H H H H H L L H H H L H H H H H H: L: X: Note : High level Low level Irrelevant Input conditions at A1, B1, A2, B2 and C0 are used to determine outputs 1 and 2 and the value of the internal carry C2. The value at C2, A3, B3, A4 and B4 are than used to determine outputs 3, 4 and C4 Pin Arrangement A4 1 16 B4 B4 4 15 4 A3 C4 14 C4 B3 C0 13 C0 3 2 A4 3 A3 3 B3 4 VCC 5 12 GND 2 6 2 B2 7 B2 A2 B1 11 B1 A1 1 10 A1 9 1 A2 8 (Top view) Rev.2.00, Oct 06, 2005 page 2 of 6 HD74HC83 Logic Diagram C4 B4 4 A4 B3 A3 3 B2 A2 2 B1 A1 C0 1 Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input / Output voltage VCC Vin, Vout -0.5 to 7.0 -0.5 to VCC +0.5 V V IIK, IOK IO 20 25 mA mA ICC or IGND PT 50 500 mA mW Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Tstg -65 to +150 C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Symbol VCC Ratings 2 to 6 Unit V Input / Output voltage Operating temperature VIN, VOUT Ta 0 to VCC -40 to 85 V C tr , tf 0 to 1000 0 to 500 Input rise / fall time Note: *1 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Rev.2.00, Oct 06, 2005 page 3 of 6 ns Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V HD74HC83 Electrical Characteristics Ta = 25C Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Ta = -40 to+85C Unit Test Conditions 2.0 Min 1.5 Typ -- Max -- Min 1.5 Max -- 4.5 6.0 3.15 4.2 -- -- -- -- 3.15 4.2 -- -- 2.0 4.5 -- -- -- -- 0.5 1.35 -- -- 0.5 1.35 6.0 2.0 -- 1.9 -- 2.0 1.8 -- -- 1.9 1.8 -- 4.5 6.0 4.4 5.9 4.5 6.0 -- -- 4.4 5.9 -- -- 4.5 6.0 4.18 5.68 -- -- -- -- 4.13 5.63 -- -- 2.0 4.5 -- -- 0.0 0.0 0.1 0.1 -- -- 0.1 0.1 6.0 4.5 -- -- 0.0 -- 0.1 0.26 -- -- 0.1 0.33 -- -- -- -- 0.26 0.1 -- -- 0.33 1.0 IOL = 5.2 mA A Vin = VCC or GND -- -- 4.0 -- 40 A Vin = VCC or GND, Iout = 0 A Input current Iin 6.0 6.0 Quiescent supply current ICC 6.0 V V V Vin = VIH or VIL IOH = -20 A IOH = -4 mA IOH = -5.2 mA V Vin = VIH or VIL IOL = 20 A IOL = 4 mA Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25C Item Propagation delay time Symbol VCC (V) tPLH, tPHL tPLH, tPHL tPLH, tPHL tPLH, tPHL Output fall time Input capacitance tTHL Cin Ta = -40 to +85C 2.0 Min -- Typ -- Max 150 Min -- Max 190 4.5 6.0 -- -- 19 -- 30 26 -- -- 38 33 2.0 4.5 -- -- -- 16 150 30 -- -- 190 38 6.0 2.0 -- -- -- -- 26 150 -- -- 33 190 4.5 6.0 -- -- 17 -- 30 26 -- -- 38 33 2.0 4.5 -- -- -- 18 150 30 -- -- 190 38 6.0 2.0 -- -- -- -- 26 75 -- -- 33 95 4.5 6.0 -- -- 5 -- 15 13 -- -- 19 16 -- -- 5 10 -- 10 Rev.2.00, Oct 06, 2005 page 4 of 6 Unit Test Conditions ns C0 to 1 ns A1 or B1 to 1 ns C0 to C4 ns A1 or B1 to C4 ns pF HD74HC83 Test Circuit VCC VCC Output Pulse generator Zout = 50 See Function Table Input A4 B4 A3 B3 A2 B2 A1 B1 C0 C4 CL = 50 pF Output 4 CL = 50 pF Output 1 CL = 50 pF Note: C L includes the probe and jig capacitance. Waveforms tr tf 90 % 50 % Input 10 % 10 % t PLH 0V t PHL 90 % Same-phase output VCC 90 % 50 % VOH 90 % 50 % 10 % t PHL 50 % 10 % t TLH t PLH t THL 90 % 90 % Inverse-phase output 50 % 10 % t THL VOL 50 % 10 % VOH VOL t TLH Notes: 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns 2. The output are measured one at a time with one transition per measurement. Rev.2.00, Oct 06, 2005 page 5 of 6 HD74HC83 Package Dimensions JEITA Package Code P-SOP16-3.95x9.9-1.27 RENESAS Code PRSP0016DG-A *1 Previous Code FP-16DNV MASS[Typ.] 0.15g D NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F 16 9 c *2 Index mark HE E bp Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) Dimension in Millimeters Min Nom Max D 9.90 10.30 E 3.95 A2 1 8 *3 e Z bp x A1 0.10 0.14 0.25 0.34 0.40 0.46 0.15 0.20 0.25 6.10 6.20 1.75 A M L1 bp b1 c A c A1 L y Detail F 1 0 HE 5.80 1.27 e x 0.25 y 0.15 Z 0.635 0.40 L L JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV 0.60 1.27 1.08 1 MASS[Typ.] 0.24g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. D F 16 8 9 c HE *2 E bp Index mark Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) 1 Z *3 bp Nom D 10.06 E 5.50 Max 10.5 A2 8 e Dimension in Millimeters Min x A1 M 0.00 0.10 0.20 0.34 0.40 0.46 0.15 0.20 0.25 7.80 8.00 2.20 A L1 bp b1 c A c A1 y L Detail F 1 0 HE 7.50 1.27 e x 0.12 y 0.15 Z 0.80 0.50 L L Rev.2.00, Oct 06, 2005 page 6 of 6 8 1 0.70 1.15 0.90 Sales Strategic Planning Div. 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