3.0 kV RMS/3.75 kV RMS Quad Digital Isolators ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E FUNCTIONAL BLOCK DIAGRAMS High common-mode transient immunity: 100 kV/s High robustness to radiated and conducted noise Low propagation delay 13 ns maximum for 5 V operation 15 ns maximum for 1.8 V operation 150 Mbps maximum guaranteed data rate Safety and regulatory approvals UL recognition 3000 V rms/3750 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 849 V peak CQC certification per GB4943.1-2011 Backward compatibility ADuM140E1/ADuM141E1/ADuM142E1 pin-compatible with ADuM1400/ADuM1401/ADuM1402 Low dynamic power consumption 1.8 V to 5 V level translation High temperature operation: 125C Fail-safe high or low options 16-lead, RoHS compliant, SOIC package Qualified for automotive applications VDD1 1 GND1 16 VDD2 15 GND2 VIA 3 ENCODE DECODE 14 VOA VIB 4 ENCODE DECODE 13 VOB VIC 5 ENCODE DECODE 12 VOC VID 6 ENCODE DECODE 11 VOD DISABLE1/NIC 7 10 NIC/VE2 GND1 8 9 GND2 NOTES 1. NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. 2. PIN 7 IS DISABLE1 AND PIN 10 IS NIC FOR THE ADuM140D, AND PIN 7 IS NIC AND PIN 10 IS VE2 FOR THE ADuM140E. Figure 1. ADuM140D/ADuM140E Functional Block Diagram GND1 ADuM141D/ADuM141E 2 16 VDD2 15 GND2 VIA 3 ENCODE DECODE 14 VOA VIB 4 ENCODE DECODE 13 VOB VIC 5 ENCODE DECODE 12 VOC VOD 6 DECODE ENCODE 11 VID 10 DISABLE2/VE2 DISABLE1/VE1 7 GND1 8 9 GND2 NOTES 1. PIN 7 IS DISABLE1 AND PIN 10 IS DISABLE 2 FOR THE ADuM141D, AND PIN 7 IS VE1 AND PIN 10 IS VE2 FOR THE ADuM141E. 13119-102 VDD1 1 APPLICATIONS Figure 2. ADuM141D/ADuM141E Functional Block Diagram General-purpose multichannel isolation Serial peripheral interface (SPI)/data converter isolation Industrial field bus isolation VDD1 1 The ADuM140D/ADuM140E/ADuM141D/ADuM141E/ ADuM142D/ADuM142E1 are quad-channel digital isolators based on Analog Devices, Inc., iCoupler(R) technology. Combining high speed, complementary metal-oxide semiconductor (CMOS) and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices and other integrated couplers. The maximum propagation delay is 13 ns with a pulse width distortion of less than 3 ns at 5 V operation. Channel matching is tight at 3.0 ns maximum. The ADuM140D/ADuM140E/ADuM141D/ADuM141E/ ADuM142D/ADuM142E data channels are independent and are available in a variety of configurations with a withstand voltage rating of 3.0 kV rms or 3.75 kV rms (see the Ordering Guide). The devices operate with the supply voltage on either side ranging from 1.8 V to 5 V, providing compatibility with lower voltage systems as well as enabling voltage translation ADuM142D/ADuM142E GND1 2 GENERAL DESCRIPTION Rev. I ADuM140D/ADuM140E 2 13119-101 FEATURES 16 VDD2 15 GND2 VIA 3 ENCODE DECODE 14 VOA VIB 4 ENCODE DECODE 13 VOB VOC 5 DECODE ENCODE 12 VIC ENCODE 11 VID VOD 6 DECODE DISABLE1/VE1 7 10 GND1 8 9 DISABLE2/VE2 GND2 NOTES 1. PIN 7 IS DISABLE1 AND PIN 10 IS DISABLE 2 FOR THE ADuM142D, AND PIN 7 IS VE1 AND PIN 10 IS VE2 FOR THE ADuM142E. 13119-103 Data Sheet Figure 3. ADuM142D/ADuM142E Functional Block Diagram functionality across the isolation barrier. Unlike other optocoupler alternatives, dc correctness is ensured in the absence of input logic transitions. Two different fail-safe options are available, by which the outputs transition to a predetermined state when the input power supply is not applied or the inputs are disabled. The ADuM140E1/ADuM141E1/ADuM142E1 are pin-compatible with the ADuM1400/ADuM1401/ADuM1402. 1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2015-2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Recommended Operating Conditions .................................... 16 Applications ....................................................................................... 1 Absolute Maximum Ratings ......................................................... 17 General Description ......................................................................... 1 ESD Caution................................................................................ 17 Functional Block Diagrams ............................................................. 1 Truth Tables................................................................................. 18 Revision History ............................................................................... 3 Pin Configurations and Function Descriptions ......................... 19 Specifications..................................................................................... 4 Typical Performance Characteristics ........................................... 22 Electrical Characteristics--5 V Operation................................ 4 Applications Information .............................................................. 24 Electrical Characteristics--3.3 V Operation ............................ 6 Overview ..................................................................................... 24 Electrical Characteristics--2.5 V Operation ............................ 8 Printed Circuit Board (PCB) Layout ....................................... 24 Electrical Characteristics--1.8 V Operation .......................... 10 Propagation Delay Related Parameters ................................... 25 Insulation and Safety Related Specifications .......................... 12 Jitter Measurement ..................................................................... 25 Package Characteristics ............................................................. 12 Insulation Lifetime ..................................................................... 25 Regulatory Information ............................................................. 13 Outline Dimensions ....................................................................... 27 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics ............................................................................ 14 Ordering Guide .......................................................................... 28 Automotive Products ................................................................. 30 Rev. I | Page 2 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E REVISION HISTORY 8/2018--Rev. H to Rev. I Changes to Table 13 ........................................................................13 Changes to Table 15 ........................................................................14 Changes to Ordering Guide ...........................................................28 Change to Automotive Products Section .....................................30 12/2017--Rev. G to Rev. H Changes to Ordering Guide ...........................................................28 7/2017--Rev. F to Rev. G Changes to Ordering Guide ...........................................................28 6/2017--Rev. E to Rev. F Changes to Ordering Guide ...........................................................28 2/2017--Rev. D to Rev. E Added RQ-16 Package ....................................................... Universal Added Table 11; Renumbered Sequentially .................................12 Changes to Table 12 ........................................................................12 Changes to Table 13 and Table 14 .................................................13 Added Table 15 ................................................................................14 Added Table 18 ................................................................................15 Added Figure 6; Renumbered Sequentially .................................16 Added Table 23 ................................................................................18 Added Figure 29 ..............................................................................28 Updated Outline Dimensions ........................................................28 Changes to Ordering Guide ...........................................................28 Changes to Automotive Products Section ...................................29 10/2016--Rev. C to Rev. D Changes to Features Section ............................................................ 1 Changes to Table 12 and Table 13 .................................................12 4/2016--Rev. B to Rev. C Changes to Features Section ............................................................ 1 Changes to Ordering Guide ...........................................................26 Added Automotive Products Section ...........................................27 11/2015--Rev. A to Rev. B Added 16-Lead, Narrow Body SOIC Package ................ Universal Changes to Title, Features Section, and General Description Section ................................................................................................ 1 Changes to Table 1 ............................................................................ 3 Changes to Table 3 ............................................................................ 5 Changes to Table 5 ............................................................................ 7 Changes to Table 7 ............................................................................ 9 Added Table 9; Renumbered Sequentially ................................... 11 Changes to Table 10 and Table 11 ................................................. 11 Changes to Regulator Information Section ................................. 12 Changes to Table 12 ........................................................................ 12 Added Table 13 ................................................................................ 12 Changes to Table 14 ........................................................................ 13 Added Table 15 and Figure 4; Renumbered Sequentially ................ 14 Changes to Figure 5 Caption ................................................................. 14 Changes to Endnote 3, Table 17, and Table 19 Title .......................... 15 Added Table 18 ......................................................................................... 15 Changes to Surface Tracking Section ................................................... 23 Changes to Calculation and Use of Parameters Example Section..... 24 Updated Outline Dimensions ............................................................... 25 Changes to Ordering Guide................................................................... 26 9/2015--Rev. 0 to Rev. A Added ADuM141D/ADuM141E ..................................... Universal Added ADuM142D/ADuM142E ..................................... Universal Changes to Features and Figure 1 ................................................... 1 Delete Figure 2; Renumbered Sequentially ................................... 1 Added Figure 2 and Figure 3; Renumbered Sequentially ............ 1 Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Changes to Table 3 ............................................................................ 5 Changes to Table 4 ............................................................................ 6 Changes to Table 5 ............................................................................ 7 Change to Table 6 .............................................................................. 8 Changes to Table 7 ............................................................................ 9 Changes to Table 8 .......................................................................... 10 Changes to Table 11 ........................................................................ 11 Changes to Table 12 ........................................................................ 12 Changes Table 15 ............................................................................. 13 Changes to Table 17 ........................................................................ 14 Added Figure 7, Figure 8, and Table 19; Renumbered Sequentially ...................................................................................... 16 Added Figure 9, Figure 10, and Table 20...................................... 16 Added Figure 13 and Figure 16 ..................................................... 18 Changes to Figure 17 and Figure 18 ............................................. 19 Changes to Overview Section and Figure 19 .............................. 20 Updated Outline Dimensions........................................................ 23 Changes to Ordering Guide ........................................................... 23 4/2015--Revision 0: Initial Version Rev. I | Page 3 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet SPECIFICATIONS ELECTRICAL CHARACTERISTICS--5 V OPERATION All typical specifications are at TA = 25C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended operation range of 4.5 V VDD1 5.5 V, 4.5 V VDD2 5.5 V, and -40C TA +125C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 1. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate 1 Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter DC SPECIFICATIONS Input Threshold Voltage Logic High Logic Low Output Voltage Logic High Logic Low Input Current per Channel VE2 Enable Input Pull-Up Current DISABLE1 Input Pull-Down Current Tristate Output Current per Channel Quiescent Supply Current ADuM140D/ADuM140E Symbol Min PW 6.6 150 4.8 tPHL, tPLH PWD Typ 7.2 0.5 1.5 tPSK Max Unit Test Conditions/Comments 13 3 ns Mbps ns ns ps/C ns Within pulse width distortion (PWD) limit Within PWD limit 50% input to 50% output |tPLH - tPHL| 6.1 tPSKCD tPSKOD 0.5 0.5 490 70 VIH VIL 0.7 x VDDx VOH VDDx - 0.1 VDDx - 0.4 3.0 3.0 0.3 x VDDx VDDx VDDx - 0.2 0.0 0.2 +0.01 -3 9 +0.01 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) ns ns ps p-p ps rms Between any two units at the same temperature, voltage, and load See the Jitter Measurement section See the Jitter Measurement section V V V V IOx 2 = -20 A, VIx = VIxH 3 IOx2 = -4 mA, VIx = VIxH3 15 +10 V V A A A A IOx2 = 20 A, VIx = VIxL 4 IOx2 = 4 mA, VIx = VIxL4 0 V VIx VDDx VE2 = 0 V DISABLE1 = VDDx 0 V VOx VDDx 1.2 2.0 12.0 2.0 2.2 2.72 20.0 2.92 mA mA mA mA VI 5 = 0 (E0, D0), 1 (E1, D1) 6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.6 1.9 10.0 6.0 2.46 2.62 17.0 10.0 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.6 1.6 7.2 8.4 2.46 2.46 11.5 11.5 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VOL II IPU IPD IOZ -10 -10 -10 0.1 0.4 +10 ADuM141D/ADuM141E ADuM142D/ADuM142E Rev. I | Page 4 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Parameter Dynamic Supply Current Dynamic Input Dynamic Output Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity7 Symbol Min Typ IDDI (D) IDDO (D) UVLO VDDxUV+ VDDxUV- VDDxUVH Max Unit Test Conditions/Comments 0.01 0.02 mA/Mbps mA/Mbps Inputs switching, 50% duty cycle Inputs switching, 50% duty cycle 1.6 1.5 0.1 V V V tR/tF |CMH| 75 2.5 100 ns kV/s |CML| 75 100 kV/s 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible. IOx is the Channel x output current, where x = A, B, C, or D. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 VI is the voltage input. 6 E0 is the ADuM140E0/ADuM141E0/ADuM142E0 models, D0 is the ADuM140D0/ADuM141D0/ADuM142D0 models, E1 is the ADuM140E1/ADuM141E1/ADuM142E1 models, and D1 is the ADuM140D1/ADuM141D1/ADuM142D1 models. See the Ordering Guide section. 7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. 1 2 Table 2. Total Supply Current vs. Data Throughput Parameter SUPPLY CURRENT ADuM140D/ADuM140E Supply Current Side 1 Supply Current Side 2 ADuM141D/ADuM141E Supply Current Side 1 Supply Current Side 2 ADuM142D/ADuM142E Supply Current Side 1 Supply Current Side 2 Symbol Min 1 Mbps Typ Max Min 25 Mbps Typ Max Min 100 Mbps Typ Max Unit IDD1 IDD2 6.8 2.1 10 3.7 7.8 3.9 12 5.7 11.8 9.2 17.4 13 mA mA IDD1 IDD2 5.8 4.0 10.3 6.85 7.0 5.5 10.9 8.5 11.4 10.3 15.9 14.0 mA mA IDD1 IDD2 4.3 5.3 7.7 8.7 6.0 6.7 9.3 10.1 10.3 11.0 14.2 14.9 mA mA Rev. I | Page 5 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet ELECTRICAL CHARACTERISTICS--3.3 V OPERATION All typical specifications are at TA = 25C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended operation range: 3.0 V VDD1 3.6 V, 3.0 V VDD2 3.6 V, and -40C TA +125C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 3. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate 1 Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter DC SPECIFICATIONS Input Threshold Voltage Logic High Logic Low Output Voltage Logic High Logic Low Input Current per Channel VE2 Enable Input Pull-Up Current DISABLE1 Input Pull-Down Current Tristate Output Current per Channel Quiescent Supply Current ADuM140D/ADuM140E Symbol Min PW 6.6 150 4.8 tPHL, tPLH PWD Typ 6.8 0.7 1.5 tPSK Unit Test Conditions/Comments 14 3 ns Mbps ns ns ps/C ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH - tPHL| 7.5 tPSKCD tPSKOD 0.7 0.7 580 120 VIH VIL 0.7 x VDDx VOH VDDx - 0.1 VDDx - 0.4 3.0 3.0 0.3 x VDDx VOL II IPU IPD IOZ Max -10 -10 -10 VDDx VDDx - 0.2 0.0 0.2 +0.01 -3 9 +0.01 ns ns ps p-p ps rms Between any two units at the same temperature, voltage, and load See the Jitter Measurement section See the Jitter Measurement section V V 15 +10 V V V V A A A A IOx 2 = -20 A, VIx = VIxH 3 IOx2 = -2 mA, VIx = VIxH3 IOx2 = 20 A, VIx = VIxL 4 IOx2 = 2 mA, VIx = VIxL4 0 V VIx VDDx VE2 = 0 V DISABLE1 = VDDx 0 V VOx VDDx 0.1 0.4 +10 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.2 2.0 12.0 2.0 2.12 2.68 19.6 2.8 mA mA mA mA VI 5 = 0 (E0, D0), 1 (E1, D1) 6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.5 1.8 9.8 5.7 2.36 2.52 16.7 9.7 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.6 1.6 7.2 8.4 2.4 2.4 11.2 11.2 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 ADuM141D/ADuM141E ADuM142D/ADuM142E Rev. I | Page 6 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Parameter Dynamic Supply Current Dynamic Input Dynamic Output Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity 7 Symbol Min IDDI (D) IDDO (D) UVLO VDDxUV+ VDDxUV- VDDxUVH Typ Max Unit Test Conditions/Comments 0.01 0.01 mA/Mbps mA/Mbps Inputs switching, 50% duty cycle Inputs switching, 50% duty cycle 1.6 1.5 0.1 V V V tR/tF |CMH| 75 2.5 100 ns kV/s |CML| 75 100 kV/s 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible. IOx is the Channel x output current, where x = A, B, C, or D. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 VI is the voltage input. 6 E0 is the ADuM140E0/ADuM141E0/ADuM142E0 models, D0 is the ADuM140D0/ADuM141D0/ADuM142D0 models, E1 is the ADuM140E1/ADuM141E1/ADuM142E1 models, and D1 is the ADuM140D1/ADuM141D1/ADuM142D1 models. See the Ordering Guide section. 7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. 1 2 Table 4. Total Supply Current vs. Data Throughput Parameter SUPPLY CURRENT ADuM140D/ADuM140E Supply Current Side 1 Supply Current Side 2 ADuM141D/ADuM141E Supply Current Side 1 Supply Current Side 2 ADuM142D/ADuM142E Supply Current Side 1 Supply Current Side 2 Symbol Min 1 Mbps Typ Max Min 25 Mbps Typ Max Min 100 Mbps Typ Max Unit IDD1 IDD2 6.6 2.0 9.8 3.7 7.4 3.5 11.2 5.5 10.7 8.2 15.9 11.6 mA mA IDD1 IDD2 5.65 3.9 10.1 6.65 6.65 5.2 10.5 8.0 10.4 9.4 14.9 12.8 mA mA IDD1 IDD2 4.3 5.0 7.7 8.4 5.6 6.2 9.0 9.6 9.1 9.8 13 13.7 mA mA Rev. I | Page 7 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet ELECTRICAL CHARACTERISTICS--2.5 V OPERATION All typical specifications are at TA = 25C, VDD1 = VDD2 = 2.5 V. Minimum/maximum specifications apply over the entire recommended operation range: 2.25 V VDD1 2.75 V, 2.25 V VDD2 2.75 V, -40C TA +125C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 5. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate 1 Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter DC SPECIFICATIONS Input Threshold Voltage Logic High Logic Low Output Voltage Logic High Logic Low Input Current per Channel VE2 Enable Input Pull-Up Current DISABLE1 Input Pull-Down Current Tristate Output Current per Channel Quiescent Supply Current ADuM140D/ADuM140E Symbol Min PW 6.6 150 5.0 tPHL, tPLH PWD Typ 7.0 0.7 1.5 tPSK Unit Test Conditions/Comments 14 3 ns Mbps ns ns ps/C ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH - tPHL| 6.8 tPSKCD tPSKOD 0.7 0.7 800 190 VIH VIL 0.7 x VDDx VOH VDDx - 0.1 VDDx - 0.4 3.0 3.0 0.3 x VDDx VOL II IPU IPD IOZ Max -10 -10 -10 VDDx VDDx - 0.2 0.0 0.2 +0.01 -3 9 +0.01 ns ns ps p-p ps rms Between any two units at the same temperature, voltage, and load See the Jitter Measurement section See the Jitter Measurement section V V 15 +10 V V V V A A A A IOx 2 = -20 A, VIx = VIxH 3 IOx2 = -2 mA, VIx = VIxH3 IOx2 = 20 A, VIx = VIxL 4 IOx2 = 2 mA, VIx = VIxL4 0 V VIx VDDx VE2 = 0 V DISABLE1 = VDDx 0 V VOx VDDx 0.1 0.4 +10 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.2 2.0 1.2 2.0 2.0 2.64 19.6 2.76 mA mA mA mA VI 5 = 0 (E0, D0), 1 (E1, D1) 6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.46 1.75 9.7 5.67 2.32 2.47 16.6 9.67 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.6 1.6 7.2 8.4 2.32 2.32 11.2 11.2 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDDI (D) IDDO (D) 0.01 0.01 mA/Mbps mA/Mbps Inputs switching, 50% duty cycle Inputs switching, 50% duty cycle ADuM141D/ADuM141E ADuM142D/ADuM142E Dynamic Supply Current Dynamic Input Dynamic Output Rev. I | Page 8 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Parameter Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity7 Symbol Min VDDxUV+ VDDxUV- VDDxUVH Typ Max Unit 1.6 1.5 0.1 V V V tR/tF |CMH| 75 2.5 100 ns kV/s |CML| 75 100 kV/s Test Conditions/Comments 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible. IOx is the Channel x output current, where x = A, B, C, or D. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 VI is the voltage input. 6 E0 is the ADuM140E0/ADuM141E0/ADuM142E0 models, D0 is the ADuM140D0/ADuM141D0/ADuM142D0 models, E1 is the ADuM140E1/ADuM141E1/ADuM142E1 models, and D1 is the ADuM140D1/ADuM141D1/ADuM142D1 models. See the Ordering Guide section. 7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. 1 2 Table 6. Total Supply Current vs. Data Throughput Parameter SUPPLY CURRENT ADuM140D/ADuM140E Supply Current Side 1 Supply Current Side 2 ADuM141D/ADuM141E Supply Current Side 1 Supply Current Side 2 ADuM142D/ADuM142E Supply Current Side 1 Supply Current Side 2 Symbol Min 1 Mbps Typ Max Min 25 Mbps Typ Max Min 100 Mbps Typ Max Unit IDD1 IDD2 6.5 2.0 9.8 3.6 7.3 3.3 11.1 5.2 10.4 7.3 15.5 10.2 mA mA IDD1 IDD2 5.6 3.8 10.0 6.55 6.4 4.8 10.4 7.7 9.7 8.3 14.5 11.5 mA mA IDD1 IDD2 4.3 5.0 7.7 8.4 5.4 6.1 8.8 9.5 8.8 9.5 12.7 13.4 mA mA Rev. I | Page 9 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet ELECTRICAL CHARACTERISTICS--1.8 V OPERATION All typical specifications are at TA = 25C, VDD1 = VDD2 = 1.8 V. Minimum/maximum specifications apply over the entire recommended operation range: 1.7 V VDD1 1.9 V, 1.7 V VDD2 1.9 V, and -40C TA +125C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 7. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate 1 Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter DC SPECIFICATIONS Input Threshold Voltage Logic High Logic Low Output Voltage Logic High Logic Low Input Current per Channel VE2 Enable Input Pull-Up Current DISABLE1 Input Pull-Down Current Tristate Output Current per Channel Quiescent Supply Current ADuM140D/ADuM140E Symbol Min PW 6.6 150 5.8 tPHL, tPLH PWD Typ 8.7 0.7 1.5 tPSK Max Unit Test Conditions/Comments 15 3 ns Mbps ns ns ps/C ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH - tPHL| 7.0 tPSKCD tPSKOD 0.7 0.7 470 70 VIH VIL 0.7 x VDDx VOH VDDx - 0.1 VDDx - 0.4 3.0 3.0 0.3 x VDDx VDDx VDDx - 0.2 0.0 0.2 +0.01 -3 9 +0.01 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) ns ns ps p-p ps rms Between any two units at the same temperature, voltage, and load See the Jitter Measurement section See the Jitter Measurement section V V 15 +10 V V V V A A A A IOx 2 = -20 A, VIx = VIxH 3 IOx2 = -2 mA, VIx = VIxH3 IOx2 = 20 A, VIx = VIxL 4 IOx2 = 2 mA, VIx = VIxL4 0 V VIx VDDx VE2 = 0 V DISABLE1 = VDDx 0 V VOx VDDx 1.2 2.0 12.0 2.0 1.92 2.64 19.6 2.76 mA mA mA mA VI 5 = 0 (E0, D0), 1 (E1, D1) 6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.4 1.73 9.6 5.6 2.28 2.45 16.5 9.6 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.6 1.6 7.2 8.4 2.28 2.28 11.2 11.2 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VOL II IPU IPD IOZ -10 -10 -10 0.1 0.4 +10 ADuM141D/ADuM141E ADuM142D/ADuM142E Rev. I | Page 10 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Parameter Dynamic Supply Current Dynamic Input Dynamic Output Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity7 Symbol Min Typ IDDI (D) IDDO (D) UVLO VDDxUV+ VDDxUV- VDDxUVH Max Unit Test Conditions/Comments 0.01 0.01 mA/Mbps mA/Mbps Inputs switching, 50% duty cycle Inputs switching, 50% duty cycle 1.6 1.5 0.1 V V V tR/tF |CMH| 75 2.5 100 ns kV/s |CML| 75 100 kV/s 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible. IOx is the Channel x output current, where x = A, B, C, or D. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 VI is the voltage input. 6 E0 is the ADuM140E0/ADuM141E0/ADuM142E0 models, D0 is the ADuM140D0/ADuM141D0/ADuM142D0 models, E1 is the ADuM140E1/ADuM141E1/ADuM142E1 models, and D1 is the ADuM140D1/ADuM141D1/ADuM142D1 models. See the Ordering Guide section. 7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. 1 2 Table 8. Total Supply Current vs. Data Throughput Parameter SUPPLY CURRENT ADuM140D/ADuM140E Supply Current Side 1 Supply Current Side 2 ADuM141D/ADuM141E Supply Current Side 1 Supply Current Side 2 ADuM142D/ADuM142E Supply Current Side 1 Supply Current Side 2 Symbol Min 1 Mbps Typ Max Min 25 Mbps Typ Max Min 100 Mbps Typ Max Unit IDD1 IDD2 6.4 1.9 9.8 3.5 7.2 3.1 11 5.0 10.2 6.8 15.2 10 mA mA IDD1 IDD2 5.5 3.72 9.1 6.45 6.3 4.8 10.0 7.5 9.6 8.4 14.0 11.2 mA mA IDD1 IDD2 4.3 4.9 7.7 8.3 5.3 6.0 8.7 9.4 8.6 9.3 12.6 13.3 mA mA Rev. I | Page 11 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet INSULATION AND SAFETY RELATED SPECIFICATIONS For additional information, see www.analog.com/icouplersafety. Table 9. R-16 Narrow Body [SOIC_N] Package Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L (I01) Value 3000 4.0 Unit V rms mm min Minimum External Tracking (Creepage) L (I02) 4.0 mm min Minimum Clearance in the Plane of the Printed Circuit Board (PCB Clearance) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Material Group L (PCB) 4.5 mm min CTI 25.5 >400 II m min V Unit V rms mm min Test Conditions/Comments 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance path along body Measured from input terminals to output terminals, shortest distance through air, line of sight, in the PCB mounting plane Minimum distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) Table 10. RW-16 Wide Body [SOIC_W] Package Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L (I01) Value 3750 7.8 Minimum External Tracking (Creepage) L (I02) 7.8 mm min Minimum Clearance in the Plane of the Printed Circuit Board (PCB Clearance) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Material Group L (PCB) 8.3 mm min CTI 25.5 >400 II m min V Unit V rms mm min Test Conditions/Comments 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance path along body Measured from input terminals to output terminals, shortest distance through air, line of sight, in the PCB mounting plane Minimum distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) Table 11. RQ-16 [QSOP] Package Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L (I01) Value 3000 3.2 Minimum External Tracking (Creepage) L (I02) 3.2 mm min Minimum Clearance in the Plane of the Printed Circuit Board (PCB Clearance) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Material Group L (PCB) 3.8 mm min CTI 25.5 >400 II m min V Test Conditions/Comments 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance path along body Measured from input terminals to output terminals, shortest distance through air, line of sight, in the PCB mounting plane Minimum distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) PACKAGE CHARACTERISTICS Table 12. Parameter Resistance (Input to Output) 1 Capacitance (Input to Output)1 Input Capacitance 2 IC Junction to Ambient Thermal Resistance R-16 Narrow Body [SOIC_N] Package RW-16 Wide Body [SOIC_W] Package RQ-16 [QSOP] Package 1 2 Symbol RI-O CI-O CI JA JA JA Min Typ 1013 2.2 4.0 76 45 76 Max Unit pF pF Test Conditions/Comments C/W C/W C/W Thermocouple located at center of package underside Thermocouple located at center of package underside Thermocouple located at center of package underside f = 1 MHz The device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together. Input capacitance is from any input data pin to ground. Rev. I | Page 12 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E REGULATORY INFORMATION See Table 21 for the SOIC_N package or Table 22 for the SOIC_W package and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross isolation waveforms and insulation levels. Table 13. R-16 Narrow Body [SOIC_N] Package UL Recognized Under UL 1577 Component Recognition Program 1 Single Protection, 3000 V rms Isolation Voltage File E214100 1 2 CSA Approved under CSA Component Acceptance Notice 5A CSA 60950-1-07+A1+A2 and IEC 60950-1, second edition, +A1+A2: Basic insulation at 400 V rms (565 V peak) Reinforced insulation at 200 V rms (283 V peak) IEC 60601-1 Edition 3.1: Basic insulation (one means of patient protection (1 MOPP)), 250 V rms (354 V peak) CSA 61010-1-12 and IEC 61010-1 third edition: Basic insulation at 300 V rms mains, 400 V rms secondary (565 V peak) Reinforced insulation at 300 V rms mains, 200 V secondary (282 V peak) File 205078 VDE Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 2 Reinforced insulation, VIORM = 565 V peak, VIOSM = 6000 V peak Basic insulation, VIORM = 565 V peak, VIOSM = 10 kV peak File 2471900-4880-0001 CQC Certified under CQC11-471543-2012 GB4943.1-2011: Basic insulation at 770 V rms (1089 V peak) Reinforced insulation at 385 V rms (545 V peak) File CQC16001147385 In accordance with UL 1577, each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the R-16 narrow body [SOIC_N] package is proof tested by applying an insulation test voltage 3600 V rms for 1 sec. In accordance with DIN V VDE V 0884-10, each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the R-16 narrow body [SOIC_N] package is proof tested by applying an insulation test voltage 1059 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. Table 14. RW-16 Wide Body [SOIC_W] Package UL Recognized Under UL 1577 Component Recognition Program 1 Single Protection, 3750 V rms Isolation Voltage File E214100 CSA Approved under CSA Component Acceptance Notice 5A CSA 60950-1-07+A1+A2 and IEC 60950-1, second edition, +A1+A2: Basic insulation at 780 V rms (1103 V peak) Reinforced insulation at 390 V rms (552 V peak) IEC 60601-1 Edition 3.1: Basic insulation (1 means of patient protection (MOPP)), 490 V rms (693 V peak) CSA 61010-1-12 and IEC 61010-1 third edition: Basic insulation at 300 V rms mains, 780 V secondary (1103 V peak) Reinforced insulation at 300 V rms mains, 390 V secondary (552 V peak) File 205078 VDE Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 2 Reinforced insulation, VIORM = 849 V peak, VIOSM = 6000 V peak Basic insulation, VIORM = 849 V peak, VIOSM = 10 kV peak File 2471900-4880-0001 CQC Certified under CQC11-471543-2012 GB4943.1-2011: Basic insulation at 780 V rms (1103 V peak) Reinforced insulation at 390 V rms (552 V peak) File CQC16001147385 In accordance with UL 1577, each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the RW-16 wide body [SOIC_W] package is proof tested by applying an insulation test voltage 4500 V rms for 1 sec. 2 In accordance with DIN V VDE V 0884-10, each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the RW-16 wide body [SOIC_W] package is proof tested by applying an insulation test voltage 1592 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. 1 Rev. I | Page 13 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet Table 15. RQ-16 [QSOP] Package UL (Pending) Recognized Under UL 1577 Component Recognition Program1 Single Protection, 3000 V rms Isolation Voltage File E214100 CSA (Pending) Approved under CSA Component Acceptance Notice 5A VDE (Pending) Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-122 CQC Certified under CQC11-471543-2012 CSA 60950-1-07+A1+A2 and IEC 60950-1, second edition, +A1+A2: Basic insulation at 320 V rms (450 V peak) Reinforced insulation, 636 V peak, VIOSM = 6 kV peak Basic insulation 636 V peak, VIOSM = 10 kV peak GB4943.1-2011: File 2471900-4880-0001 File CQC18001192421 Reinforced insulation at 160 V rms (225 V peak) IEC 60601-1 Edition 3.1: Basic insulation (1MOPP), 250 V rms (354 V peak) CSA 61010-1-12 and IEC 61010-1 third edition: Basic insulation at 300V rms mains, 320 V rms (450 V peak) Reinforced insulation at 150 V rms mains, 160 V rms (225 V peak) secondary File 205078 Basic insulation at 320 V rms (450 V peak) Reinforced insulation at 160Vrms (225 Vpeak) 1 In accordance with UL 1577, each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the RQ-16 [QSOP] package is proof tested by applying an insulation test voltage 3600 V rms for 1 sec. 2 In accordance with DIN V VDE V 0884-10, each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the RQ-16 [QSOP] package is proof tested by applying an insulation test voltage 1059 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS These isolators are suitable for reinforced electrical isolation only within the safety limit data. Protective circuits ensure the maintenance of the safety data. The * marking on packages denotes DIN V VDE V 0884-10 approval. Table 16. R-16 Narrow Body [SOIC_N] Package Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage 150 V rms For Rated Mains Voltage 300 V rms For Rated Mains Voltage 600 V rms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum Working Insulation Voltage Input to Output Test Voltage, Method B1 Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 After Input and/or Safety Test Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Surge Isolation Voltage Basic Surge Isolation Voltage Reinforced Safety Limiting Values Maximum Junction Temperature Total Power Dissipation at 25C Insulation Resistance at TS Test Conditions/Comments VIORM x 1.875 = Vpd (m), 100% production test, tini = tm = 1 sec, partial discharge < 5 pC Symbol Characteristic Unit VIORM Vpd (m) I to IV I to IV I to III 40/125/21 2 565 1059 V peak V peak 848 V peak 678 V peak VIOTM VIOSM 4200 10000 V peak V peak VIOSM 6000 V peak TS PS RS 150 1.64 >109 C W Vpd (m) VIORM x 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC VIORM x 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC V peak = 10 kV, 1.2 s rise time, 50 s, 50% fall time V peak = 10 kV, 1.2 s rise time, 50 s, 50% fall time Maximum value allowed in the event of a failure (see Figure 4) VIO = 500 V Rev. I | Page 14 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Table 17. RW-16 Wide Body [SOIC_W] Package Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage 150 V rms For Rated Mains Voltage 300 V rms For Rated Mains Voltage 600 V rms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum Working Insulation Voltage Input to Output Test Voltage, Method B1 Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 After Input and/or Safety Test Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Surge Isolation Voltage Basic Surge Isolation Voltage Reinforced Safety Limiting Values Maximum Junction Temperature Total Power Dissipation at 25C Insulation Resistance at TS Test Conditions/Comments Symbol Characteristic Unit VIORM Vpd (m) I to IV I to IV I to IV 40/125/21 2 849 1592 V peak V peak 1274 V peak 1019 V peak VIOTM VIOSM 7000 12000 V peak V peak VIOSM 8000 V peak VIO = 500 V TS PS RS 150 2.78 >109 C W Test Conditions/Comments Symbol Characteristic Unit VIORM Vpd (m) I to IV I to IV I to IV 40/125/21 2 565 1059 V peak V peak 848 V peak 678 V peak VIOTM VIOSM 4242 10000 V peak V peak VIOSM 6000 V peak TS PS RS 150 1.64 >109 C W VIORM x 1.875 = Vpd (m), 100% production test, tini = tm = 1 sec, partial discharge < 5 pC Vpd (m) VIORM x 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC VIORM x 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC V peak = 12.8 kV, 1.2 s rise time, 50 s, 50% fall time V peak = 12.8 kV, 1.2 s rise time, 50 s, 50% fall time Maximum value allowed in the event of a failure (see Figure 5) Table 18. RQ-16 [QSOP] Package Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage 150 V rms For Rated Mains Voltage 300 V rms For Rated Mains Voltage 600 V rms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum Working Insulation Voltage Input to Output Test Voltage, Method B1 Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 After Input and/or Safety Test Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Surge Isolation Voltage Basic Surge Isolation Voltage Reinforced Safety Limiting Values Maximum Junction Temperature Total Power Dissipation at 25C Insulation Resistance at TS VIORM x 1.875 = Vpd (m), 100% production test, tini = tm = 1 sec, partial discharge < 5 pC Vpd (m) VIORM x 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC VIORM x 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC V peak = 10 kV, 1.2 s rise time, 50 s, 50% fall time V peak = 10 kV, 1.2 s rise time, 50 s, 50% fall time Maximum value allowed in the event of a failure (see Figure 5) VIO = 500 V Rev. I | Page 15 of 30 Data Sheet 1.8 1.8 1.6 SAFE LIMITING POWER (W) 1.6 1.4 1.2 1.0 0.8 0.6 1.4 1.2 1.0 0.8 0.6 0.4 0.4 0.2 0 0 0 50 100 150 200 AMBIENT TEMPERATURE (C) Figure 4. Thermal Derating Curve for R-16 Narrow Body [SOIC_N] Package, Dependence of Safety Limiting Values with Ambient Temperature per DIN V VDE V 0884-10 0 50 100 150 AMBIENT TEMPERATURE (C) 200 13119-203 0.2 13119-202 SAFE OPERATING PVDD1 , PVDDA OR PVDDB POWER (W) ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Figure 6. Thermal Derating Curve for RQ-16 [QSOP] Package, Dependence of Safety Limiting Values with Ambient Temperature per DIN V VDE V 0884-10 RECOMMENDED OPERATING CONDITIONS 3.0 Table 19. Parameter Operating Temperature Supply Voltages Input Signal Rise and Fall Times SAFE LIMITING POWER (W) 2.5 2.0 1.5 1.0 0 0 50 100 150 AMBIENT TEMPERATURE (C) 200 13119-003 0.5 Figure 5. Thermal Derating Curve for RW-16 Wide Body [SOIC_W] Package, Dependence of Safety Limiting Values with Ambient Temperature per DIN V VDE V 0884-10 Rev. I | Page 16 of 30 Symbol TA VDD1, VDD2 Rating -40C to +125C 1.7 V to 5.5 V 1.0 ms Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Table 20. Parameter Storage Temperature (TST) Range Ambient Operating Temperature (TA) Range Supply Voltages (VDD1, VDD2) Input Voltages (VIA, VIB, VIC, VID, VE1, VE2, DISABLE1, DISABLE2) Output Voltages (VOA, VOB, VOC, VOD) Average Output Current per Pin3 Side 1 Output Current (IO1) Side 2 Output Current (IO2) Common-Mode Transients4 Rating -65C to +150C -40C to +125C -0.5 V to +7.0 V -0.5 V to VDDI1 + 0.5 V ESD CAUTION -0.5 V to VDDO2 + 0.5 V -10 mA to +10 mA -10 mA to +10 mA -150 kV/s to +150 kV/s VDDI is the input side supply voltage. VDDO is the output side supply voltage. See Figure 4 for the R-16 narrow body [SOIC_N] package, Figure 5 for the RW-16 wide body [SOIC_W] package, or Figure 6 for the RQ-16 [QSOP] package for the maximum rated current values at various temperatures. 4 Refers to the common-mode transients across the insulation barrier. Common-mode transients exceeding the absolute maximum ratings may cause latch-up or permanent damage. 1 2 3 Table 21. Maximum Continuous Working Voltage R-16 Narrow Body [SOIC_N] Package1 Parameter AC Voltage Bipolar Waveform Basic Insulation Reinforced Insulation Unipolar Waveform Basic Insulation Reinforced Insulation DC Voltage Basic Insulation Reinforced Insulation 1 2 Rating Constraint2 789 V peak 403 V peak Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 909 V peak 469 V peak Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 558 V peak 285V peak Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Insulation lifetime for the specified test condition is greater than 50 years. Table 22. Maximum Continuous Working Voltage RW-16 Wide Body [SOIC_W] Package1 Parameter AC Voltage Bipolar Waveform Basic Insulation Reinforced Insulation Unipolar Waveform Basic Insulation Reinforced Insulation DC Voltage Basic Insulation Reinforced Insulation 1 2 Rating Constraint2 849 V peak 768 V peak 50-year minimum insulation lifetime Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 1698 V peak 885 V peak 50-year minimum insulation lifetime Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 1092 V peak 543 V peak Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Insulation lifetime for the specified test condition is greater than 50 years. Rev. I | Page 17 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet Table 23. Maximum Continuous Working Voltage RQ-16 [QSOP] Package1 Parameter AC Voltage Bipolar Waveform Basic Insulation Reinforced Insulation Unipolar Waveform Basic Insulation Reinforced Insulation DC Voltage Basic Insulation Reinforced Insulation 1 2 Rating Constraint2 636 V peak 318 V peak Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 734 V peak 367 V peak Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 450 V peak 225 V peak Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Insulation lifetime for the specified test condition is greater than 50 years. TRUTH TABLES Table 24. ADuM140D/ADuM141D/ADuM142D Truth Table (Positive Logic) VIx Input 1, 2 L H X X4 X4 VDISABLEx Input1, 2 L or NC L or NC H X4 X4 VDDI State2 Powered Powered Powered Unpowered Powered VDDO State2 Powered Powered Powered Powered Unpowered Default Low (D0), VOx Output1, 2, 3 L H L L Indeterminate Default High (D1), VOx Output1, 2, 3 L H H H Indeterminate Test Conditions/Comments Normal operation Normal operation Inputs disabled, fail-safe output Fail-safe output L means low, H means high, X means don't care, and NC means not connected. VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). VDISABLEx refers to the input disable signal on the same side as the VIx inputs. VDDI and VDDO refer to the supply voltages on the input and output sides of the given channel, respectively. 3 D0 is the ADuM140D0/ADuM141D0/ADuM142D0 models, and D1 is the ADuM140D1/ADuM141D1/ADuM142D1 models. See the Ordering Guide section. 4 Input pins (VIx, DISABLE1, and DISABLE2) on the same side as an unpowered supply must be in a low state to avoid powering the device through its ESD protection circuitry. 1 2 Table 25. ADuM140E/ADuM141E/ADuM142E Truth Table (Positive Logic) VIx Input 1, 2 L H X L X4 X4 VEx Input1, 2 H or NC H or NC L H or NC L4 X4 VDDI State2 Powered Powered Powered Unpowered Unpowered Powered VDDO State2 Powered Powered Powered Powered Powered Unpowered Default Low (E0), VOx Output1, 2, 3 L H Z L Z Indeterminate Default High (E1), VOx Output1, 2, 3 L H Z H Z Indeterminate Test Conditions/Comments Normal operation Normal operation Outputs disabled Fail-safe output Outputs disabled L means low, H means high, X means don't care, NC means not connected, and Z means high impedance. VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). VEx refers to the output enable signal on the same side as the VOx outputs. VDDI and VDDO refer to the supply voltages on the input and output sides of the given channel, respectively. 3 E0 is the ADuM140E0/ADuM141E0/ADuM142E0 models, and E1 is the ADuM140E1/ADuM141E1/ADuM142E1 models. See the Ordering Guide section. 4 Input pins (VIx, VE1, and VE2) on the same side as an unpowered supply must be in a low state to avoid powering the device through its ESD protection circuitry. 1 2 Rev. I | Page 18 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 16 VDD2 VDD1 1 16 15 GND2 GND1 2 15 GND2 VIA 3 14 VOA VIA 3 14 VOA ADuM140D 13 VOB VIB 4 13 VOB TOP VIEW (Not to Scale) 12 VOC VIC 5 VID 6 11 VOD DISABLE1 7 10 NIC GND1 8 9 GND2 VIB 4 VIC 5 NOTES 1. NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. ADuM140E TOP VIEW (Not to Scale) VDD2 12 VOC VID 6 11 VOD NIC 7 10 VE2 GND1 8 9 GND2 NOTES 1. NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. Figure 7. ADuM140D Pin Configuration 13119-005 VDD1 13119-004 1 GND1 2 Figure 8. ADuM140E Pin Configuration Table 26. Pin Function Descriptions Pin No. 1 ADuM140D ADuM140E 1 1 2, 8 2, 8 3 3 4 4 5 5 6 6 7 Not applicable Mnemonic VDD1 GND1 VIA VIB VIC VID DISABLE1 9, 15 10 Not applicable 9, 15 7 10 GND2 NIC VE2 11 12 13 14 16 11 12 13 14 16 VOD VOC VOB VOA VDD2 1 Description Supply Voltage for Isolator Side 1. Ground Reference for Isolator Side 1. Logic Input A. Logic Input B. Logic Input C. Logic Input D. Input Disable 1. This pin disables the isolator inputs. Outputs take on the logic state determined by the fail-safe option shown in the Ordering Guide. Ground Reference for Isolator Side 2. No Internal Connection. Leave this pin floating. Output Enable 2. Active high logic input. When VE2 is high or disconnected, the VOA, VOB, VOC, and VOD outputs are enabled. When VE2 is low, the VOA, VOB, VOC, and VOD outputs are disabled to the high-Z state. Logic Output D. Logic Output C. Logic Output B. Logic Output A. Supply Voltage for Isolator Side 2. Reference the AN-1109 Application Note for specific layout guidelines. Rev. I | Page 19 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet VDD1 1 16 VDD2 VDD1 1 16 VDD2 GND1 2 15 GND2 GND1 2 15 GND2 VIC 5 VOD 6 ADuM141D VIA 3 13 VOB VIB 4 TOP VIEW (Not to Scale) 12 VOC 11 VID DISABLE1 7 GND1 8 10 DISABLE2 9 GND2 VIC 5 VOD 6 VE1 7 13119-104 VIB 4 14 VOA GND1 8 Figure 9. ADuM141D Pin Configuration 14 VOA ADuM141E 13 VOB TOP VIEW (Not to Scale) 12 VOC 11 VID 10 VE2 9 GND2 13119-105 VIA 3 Figure 10. ADuM141E Pin Configuration Table 27. Pin Function Descriptions ADuM141D 1 2, 8 3 4 5 6 7 Pin No. 1 ADuM141E 1 2, 8 3 4 5 6 Not applicable Mnemonic VDD1 GND1 VIA VIB VIC VOD DISABLE1 Not applicable 7 VE1 9, 15 10 9, 15 Not applicable GND2 DISABLE2 Not applicable 10 VE2 11 12 13 14 16 11 12 13 14 16 VID VOC VOB VOA VDD2 1 Description Supply Voltage for Isolator Side 1. Ground Reference for Isolator Side 1. Logic Input A. Logic Input B. Logic Input C. Logic Output D. Input Disable 1. This pin disables the isolator inputs. Outputs take on the logic state determined by the fail-safe option shown in the Ordering Guide. Output Enable 1. Active high logic input. When VE1 is high or disconnected, the VOD output is enabled. When VE1 is low, the VOD output is disabled to the high-Z state. Ground Reference for Isolator Side 2. Input Disable 2. This pin disables the isolator inputs. Outputs take on the logic state determined by the fail-safe option shown in the Ordering Guide. Output Enable 2. Active high logic input. When VE2 is high or disconnected, the VOA, VOB, and VOC outputs are enabled. When VE2 is low, the VOA, VOB, and VOC outputs are disabled to the high-Z state. Logic Input D. Logic Output C. Logic Output B. Logic Output A. Supply Voltage for Isolator Side 2. Reference the AN-1109 Application Note for specific layout guidelines. Rev. I | Page 20 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E VDD1 1 16 VDD2 VDD1 1 16 VDD2 GND1 2 15 GND2 GND1 2 15 GND2 VIA 3 VOC 5 VOD 6 ADuM142D VIA 3 13 VOB VIB 4 TOP VIEW (Not to Scale) 12 VIC 11 VID DISABLE1 7 GND1 8 10 DISABLE2 9 GND2 VOC 5 VOD 6 VE1 7 13119-106 VIB 4 14 VOA GND1 8 Figure 11. ADuM142D Pin Configuration 14 VOA ADuM142E 13 VOB TOP VIEW (Not to Scale) 12 VIC 11 VID 10 VE2 9 GND2 13119-107 Data Sheet Figure 12. ADuM142E Pin Configuration Table 28. Pin Function Descriptions ADuM142D 1 2, 8 3 4 5 6 7 Pin No. 1 ADuM142E 1 2, 8 3 4 5 6 Not applicable Mnemonic VDD1 GND1 VIA VIB VOC VOD DISABLE1 Not applicable 7 VE1 9, 15 10 9, 15 Not applicable GND2 DISABLE2 Not applicable 10 VE2 11 12 13 14 16 11 12 13 14 16 VID VIC VOB VOA VDD2 1 Description Supply Voltage for Isolator Side 1. Ground Reference for Isolator Side 1. Logic Input A. Logic Input B. Logic Output C. Logic Output D. Input Disable 1. This pin disables the isolator inputs. Outputs take on the logic state determined by the fail-safe option shown in the Ordering Guide. Output Enable 1. Active high logic input. When VE1 is high or disconnected, the VOC and VOD outputs are enabled. When VE1 is low, the VOC and VOD outputs are disabled to the high-Z state. Ground Reference for Isolator Side 2. Input Disable 2. This pin disables the isolator inputs. Outputs take on the logic state determined by the fail-safe option shown in the Ordering Guide. Output Enable 2. Active high logic input. When VE2 is high or disconnected, the VOA and VOB outputs are enabled. When VE2 is low, the VOA and VOB outputs are disabled to the high-Z state. Logic Input D. Logic Input C. Logic Output B. Logic Output A. Supply Voltage for Isolator Side 2. Reference the AN-1109 Application Note for specific layout guidelines. Rev. I | Page 21 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 16 VDD1 VDD1 VDD1 VDD1 VDD2 VDD2 VDD2 VDD2 = = = = 16 5V 3.3V 2.5V 1.8V VDD1 VDD1 VDD1 VDD1 14 IDD2 SUPPLY CURRENT (mA) 12 10 8 6 4 2 = VDD2 = VDD2 = VDD2 = VDD2 = 5V = 3.3V = 2.5V = 1.8V 12 10 8 6 4 20 40 60 80 100 120 140 160 DATA RATE (Mbps) 0 0 20 40 60 80 100 120 140 160 DATA RATE (Mbps) Figure 13. ADuM140D/ADuM140E IDD1 Supply Current vs. Data Rate at Various Voltages 16 VDD1 VDD1 VDD1 VDD1 Figure 16. ADuM141D/ADuM141E IDD2 Supply Current vs. Data Rate at Various Voltages 16 = 5V = 3.3V = 2.5V = 1.8V 12 10 8 6 4 2 20 40 60 80 100 120 140 160 12 10 8 6 4 0 16 = 5V = 3.3V = 2.5V = 1.8V VDD1 VDD1 VDD1 VDD1 14 IDD2 SUPPLY CURRENT (mA) 14 = VDD2 = VDD2 = VDD2 = VDD2 20 40 60 80 100 120 140 160 Figure 17. ADuM142D/ADuM142E IDD1 Supply Current vs. Data Rate at Various Voltages 16 VDD1 VDD1 VDD1 VDD1 0 DATA RATE (Mbps) Figure 14. ADuM140D/ADuM140E IDD2 Supply Current vs. Data Rate at Various Voltages IDD1 SUPPLY CURRENT (mA) = 5V = 3.3V = 2.5V = 1.8V 12 10 8 6 4 13119-115 0 DATA RATE (Mbps) 2 = VDD2 = VDD2 = VDD2 = VDD2 = 5V = 3.3V = 2.5V = 1.8V 12 10 8 6 4 2 0 20 40 60 80 100 DATA RATE (Mbps) 120 140 160 0 13119-113 0 = VDD2 = VDD2 = VDD2 = VDD2 2 13119-007 0 VDD1 VDD1 VDD1 VDD1 14 IDD1 SUPPLY CURRENT (mA) IDD2 SUPPLY CURRENT (mA) 14 = VDD2 = VDD2 = VDD2 = VDD2 13119-114 0 13119-006 2 0 Figure 15. ADuM141D/ADuM141E IDD1 Supply Current vs. Data Rate at Various Voltages 0 20 40 60 80 100 DATA RATE (Mbps) 120 140 160 13119-116 IDD1 SUPPLY CURRENT (mA) 14 = = = = Figure 18. ADuM142D/ADuM142E IDD2 Supply Current vs. Data Rate at Various Voltages Rev. I | Page 22 of 30 Data Sheet = = = = VDD2 VDD2 VDD2 VDD2 = = = = 14 5V 3.3V 2.5V 1.8V 12 10 8 6 4 = = = = VDD2 VDD2 VDD2 VDD2 = = = = 5V 3.3V 2.5V 1.8V 10 8 6 4 2 2 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 140 0 -40 13119-008 0 -40 VDD1 VDD1 VDD1 VDD1 Figure 19. Propagation Delay, tPLH vs. Temperature at Various Voltages -20 0 20 40 60 80 TEMPERATURE (C) 100 120 140 13119-009 PROPAGATION DELAY, tPHL (ns) 12 VDD1 VDD1 VDD1 VDD1 PROPAGATION DELAY, tPHL (ns) 14 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Figure 20. Propagation Delay, tPHL vs. Temperature at Various Voltages Rev. I | Page 23 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet APPLICATIONS INFORMATION PRINTED CIRCUIT BOARD (PCB) LAYOUT The ADuM140D/ADuM140E/ADuM141D/ADuM141E/ ADuM142D/ADuM142E use a high frequency carrier to transmit data across the isolation barrier using iCoupler chip scale transformer coils separated by layers of polyimide isolation. Using an on/off keying (OOK) technique and the differential architecture shown in Figure 22 and Figure 23, the ADuM140D/ ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E have very low propagation delay and high speed. Internal regulators and input/output design techniques allow logic and supply voltages over a wide range from 1.7 V to 5.5 V, offering voltage translation of 1.8 V, 2.5 V, 3.3 V, and 5 V logic. The architecture is designed for high common-mode transient immunity and high immunity to electrical noise and magnetic interference. Radiated emissions are minimized with a spread spectrum OOK carrier and other techniques. The ADuM140D/ADuM140E/ADuM141D/ADuM141E/ ADuM142D/ADuM142E digital isolators require no external interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at the input and output supply pins (see Figure 21). Bypass capacitors are most conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The recommended bypass capacitor value is between 0.01 F and 0.1 F. The total lead length between both ends of the capacitor and the input power supply pin must not exceed 10 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 must also be considered, unless the ground pair on each package side is connected close to the package. Figure 22 illustrates the waveforms for models of the ADuM140D/ ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E that have the condition of the fail-safe output state equal to low, where the carrier waveform is off when the input state is low. If the input side is off or not operating, the low fail-safe output state (ADuM140D0/ADuM140E0/ADuM141D0/ADuM141E0/ ADuM142D0/ADuM142E0) sets the output to low. For the ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ ADuM142E that have a high fail-safe output state, Figure 23 illustrates the conditions where the carrier waveform is off when the input state is high. When the input side is off or not operating, the fail-safe output state of high (ADuM140D1/ADuM140E1/ ADuM141D1/ADuM141E1/ADuM142D1/ADuM142E1) sets the output to high. See the Ordering Guide for the model numbers that have the fail-safe output state of low or the fail-safe output state of high. VDD1 GND1 VIA VIB VIC/VOC VID/VOD DISABLE1/VE1/NIC GND1 VDD2 GND2 VOA VOB VIC/VOC VID/VOD DISABLE2/VE2/NIC GND2 13119-010 OVERVIEW Figure 21. Recommended Printed Circuit Board Layout In applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. Furthermore, design the board layout such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this can cause voltage differentials between pins exceeding the Absolute Maximum Ratings of the device, thereby leading to latch-up or permanent damage. See the AN-1109 Application Note for board layout guidelines. REGULATOR REGULATOR TRANSMITTER RECEIVER VIN GND1 13119-014 VOUT GND2 Figure 22. Operational Block Diagram of a Single Channel with a Low Fail-Safe Output State REGULATOR REGULATOR TRANSMITTER RECEIVER VIN GND1 GND2 Figure 23. Operational Block Diagram of a Single Channel with a High Fail-Safe Output State Rev. I | Page 24 of 30 13119-015 VOUT Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E PROPAGATION DELAY RELATED PARAMETERS INSULATION LIFETIME Propagation delay is a parameter that describes the time required for a logic signal to propagate through a component. The propagation delay to a Logic 0 output may differ from the propagation delay to a Logic 1 output. All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation as well as on the materials and material interfaces. INPUT (VIx) 50% tPHL OUTPUT (VOx) 13119-011 tPLH 50% Figure 24. Propagation Delay Parameters Pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved. Channel matching is the maximum amount the propagation delay differs between channels within a single ADuM140D/ADuM140E/ ADuM141D/ADuM141E/ADuM142D/ADuM142E component. Propagation delay skew is the maximum amount the propagation delay that differs between multiple ADuM140D/ADuM140E/ ADuM141D/ADuM141E/ADuM142D/ADuM142E components operating under the same conditions. JITTER MEASUREMENT Figure 25 shows the eye diagram for the ADuM140D/ADuM140E/ ADuM141D/ADuM141E/ADuM142D/ADuM142E. The measurement was taken using an Agilent 81110A pulse pattern generator at 150 Mbps with pseudorandom bit sequences (PRBS) 2(n - 1), n = 14, for 5 V supplies. Jitter was measured with the Tektronix Model 5104B oscilloscope, 1 GHz, 10 GSPS with the DPOJET jitter and eye diagram analysis tools. The result shows a typical measurement on the ADuM140D/ADuM140E/ ADuM141D/ADuM141E/ADuM142D/ADuM142E with 490 ps p-p jitter. 5 3 2 1 0 -10 -5 0 5 10 TIME (ns) 13119-012 VOLTAGE (V) 4 The two types of insulation degradation of primary interest are breakdown along surfaces exposed to the air and insulation wear out. Surface breakdown is the phenomenon of surface tracking and the primary determinant of surface creepage requirements in system level standards. Insulation wear out is the phenomenon where charge injection or displacement currents inside the insulation material cause long-term insulation degradation. Surface Tracking Surface tracking is addressed in electrical safety standards by setting a minimum surface creepage based on the working voltage, the environmental conditions, and the properties of the insulation material. Safety agencies perform characterization testing on the surface insulation of components that allows the components to be categorized in different material groups. Lower material group ratings are more resistant to surface tracking and, therefore, can provide adequate lifetime with smaller creepage. The minimum creepage for a given working voltage and material group is in each system level standard and is based on the total rms voltage across the isolation, pollution degree, and material group. The material group and creepage for the ADuM140D/ADuM140E/ ADuM141D/ADuM141E/ADuM142D/ADuM142E isolators are presented in Table 9 for the R-16 narrow body [SOIC_N] package or Table 10 for the RW-16 wide body [SOIC_W] package. Insulation Wear Out The lifetime of insulation caused by wear out is determined by its thickness, material properties, and the voltage stress applied. It is important to verify that the product lifetime is adequate at the application working voltage. The working voltage supported by an isolator for wear out may not be the same as the working voltage supported for tracking. The working voltage applicable to tracking is specified in most standards. Testing and modeling have shown that the primary driver of long-term degradation is displacement current in the polyimide insulation causing incremental damage. The stress on the insulation can be broken down into broad categories, such as dc stress, which causes very little wear out because there is no displacement current, and an ac component time varying voltage stress, which causes wear out. Figure 25. ADuM140D/ADuM140E/ADuM141D/ADuM141E/ ADuM142D/ADuM142E Eye Diagram Rev. I | Page 25 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E The working voltage across the barrier from Equation 1 is The ratings in certification documents are usually based on 60 Hz sinusoidal stress because this reflects isolation from line voltage. However, many practical applications have combinations of 60 Hz ac and dc across the barrier as shown in Equation 1. Because only the ac portion of the stress causes wear out, the equation can be rearranged to solve for the ac rms voltage, as is shown in Equation 2. For insulation wear out with the polyimide materials used in these products, the ac rms voltage determines the product lifetime. VRMS = VAC RMS 2 + VDC 2 (1) VRMS 2 - VDC 2 (2) VRMS = VAC RMS 2 + VDC 2 VRMS = 240 2 + 400 2 VRMS = 466 V This VRMS value is the working voltage used together with the material group and pollution degree when looking up the creepage required by a system standard. To determine if the lifetime is adequate, obtain the time varying portion of the working voltage. To obtain the ac rms voltage, use Equation 2. or V= AC RMS V= AC RMS where: VAC RMS is the time varying portion of the working voltage. VRMS is the total rms working voltage. VDC is the dc offset of the working voltage. VAC RMS = 240 V rms In this case, the ac rms voltage is simply the line voltage of 240 V rms. This calculation is more relevant when the waveform is not sinusoidal. The value is compared to the limits for working voltage in Table 21 for the SOIC_N package or Table 22 for the SOIC_W package, for the expected lifetime, which is less than a 60 Hz sine wave, and it is well within the limit for a 50-year service life. Note that the dc working voltage limit is set by the creepage of the package as specified in IEC 60664-1. This value can differ for specific system level standards. VAC RMS VDC TIME 13119-013 ISOLATION VOLTAGE The following example frequently arises in power conversion applications. Assume that the line voltage on one side of the isolation is 240 V ac rms and a 400 V dc bus voltage is present on the other side of the isolation barrier. The isolator material is polyimide. To establish the critical voltages in determining the creepage, clearance and lifetime of a device, see Figure 26 and the following equations. VRMS VRMS 2 - VDC 2 VAC RMS = 466 2 - 400 2 Calculation and Use of Parameters Example VPEAK Data Sheet Figure 26. Critical Voltage Example Rev. I | Page 26 of 30 Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E OUTLINE DIMENSIONS 10.00 (0.3937) 9.80 (0.3858) 9 16 4.00 (0.1575) 3.80 (0.1496) 1 8 1.27 (0.0500) BSC 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 6.20 (0.2441) 5.80 (0.2283) SEATING PLANE 0.51 (0.0201) 0.31 (0.0122) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AC 060606-A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 27. 16-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-16) Dimensions shown in millimeters and (inches) 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 8 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 10.65 (0.4193) 10.00 (0.3937) 0.75 (0.0295) 45 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 8 0 0.33 (0.0130) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 28. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) Rev. I | Page 27 of 30 1.27 (0.0500) 0.40 (0.0157) 03-27-2007-B 1 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet 0.197 (5.00) 0.193 (4.90) 0.189 (4.80) 16 9 0.158 (4.01) 0.154 (3.91) 0.150 (3.81) 1 8 0.010 (0.25) 0.006 (0.15) 0.069 (1.75) 0.053 (1.35) 0.065 (1.65) 0.049 (1.25) 0.010 (0.25) 0.004 (0.10) COPLANARITY 0.004 (0.10) 0.244 (6.20) 0.236 (5.99) 0.228 (5.79) 0.025 (0.64) BSC SEATING PLANE 0.012 (0.30) 0.008 (0.20) 8 0 0.020 (0.51) 0.010 (0.25) 0.050 (1.27) 0.016 (0.41) 0.041 (1.04) REF 09-12-2014-A COMPLIANT TO JEDEC STANDARDS MO-137-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 29. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches and (millimeters) ORDERING GUIDE Model 1, 2 ADuM140D1BRZ ADuM140D1BRZ-RL7 ADuM140D0BRZ ADuM140D0BRZ-RL7 ADuM140E1BRZ ADuM140E1BRZ-RL7 ADuM140E0BRZ ADuM140E0BRZ-RL7 ADuM140D1BRWZ ADuM140D1BRWZ-RL ADuM140D0BRWZ ADuM140D0BRWZ-RL ADuM140D1BRQZ ADuM140D1BRQZ-RL7 ADuM140D0BRQZ ADuM140D0BRQZ-RL7 ADuM140E1BRWZ ADuM140E1BRWZ-RL ADuM140E1WBRWZ ADuM140E1WBRWZ-RL ADuM140E0BRWZ ADuM140E0BRWZ-RL ADuM140E1BRQZ ADuM140E1BRQZ-RL7 ADuM140E0BRQZ ADuM140E0BRQZ-RL7 ADuM141D1BRZ ADuM141D1BRZ-RL7 ADuM141D0BRZ ADuM141D0BRZ-RL7 ADuM141E1BRZ ADuM141E1BRZ-RL7 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C No. of Inputs, VDD1 Side 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 3 3 3 3 3 3 No. of Inputs, VDD2 Side 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 Withstand Voltage Rating (kV rms) 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.75 3.75 3.75 3.75 3.0 3.0 3.0 3.0 3.75 3.75 3.75 3.75 3.75 3.75 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 Rev. I | Page 28 of 30 Fail-Safe Output State High High Low Low High High Low Low High High Low Low High High Low Low High High High High Low Low High High Low Low High High Low Low High High Input Disable Yes Yes Yes Yes No No No No Yes Yes Yes Yes Yes Yes Yes Yes No No No No No No No No No No Yes Yes Yes Yes No No Output Enable No No No No Yes Yes Yes Yes No No No No No No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No No No Yes Yes Package Description 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N Package Option R-16 R-16 R-16 R-16 R-16 R-16 R-16 R-16 RW-16 RW-16 RW-16 RW-16 RQ-16 RQ-16 RQ-16 RQ-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RQ-16 RQ-16 RQ-16 RQ-16 R-16 R-16 R-16 R-16 R-16 R-16 Data Sheet Model 1, 2 ADuM141E0BRZ ADuM141E0BRZ-RL7 ADuM141D1BRWZ ADuM141D1BRWZ-RL ADuM141D0BRWZ ADuM141D0BRWZ-RL ADuM141D1BRQZ ADuM141D1BRQZ-RL7 ADuM141D0BRQZ ADuM141D0BRQZ-RL7 ADuM141E1BRWZ ADuM141E1BRWZ-RL ADuM141E1WBRWZ ADuM141E1WBRWZ-RL ADuM141E0BRWZ ADuM141E0BRWZ-RL ADuM141E1BRQZ ADuM141E1BRQZ-RL7 ADuM141E0BRQZ ADuM141E0BRQZ-RL7 ADuM141E1WBRQZ ADuM141E1WBRQZ-RL7 ADuM142D1BRZ ADuM142D1BRZ-RL7 ADuM142D0BRZ ADuM142D0BRZ-RL7 ADuM142E1BRZ ADuM142E1BRZ-RL7 ADuM142E0BRZ ADuM142E0BRZ-RL7 ADuM142D1BRWZ ADuM142D1BRWZ-RL ADuM142D0BRWZ ADuM142D0BRWZ-RL ADuM142D1BRQZ ADuM142D1BRQZ-RL7 ADuM142D0BRQZ ADuM142D0BRQZ-RL7 ADuM142E1BRWZ ADuM142E1BRWZ-RL ADuM142E1WBRWZ ADuM142E1WBRWZ-RL ADuM142E0BRWZ ADuM142E0BRWZ-RL ADuM142E1BRQZ ADuM142E1BRQZ-RL7 ADuM142E0BRQZ ADuM142E0BRQZ-RL7 ADuM142E1WBRQZ ADuM142E1WBRQZ-RL7 1 2 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C No. of Inputs, VDD1 Side 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 No. of Inputs, VDD2 Side 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Withstand Voltage Rating (kV rms) 3.0 3.0 3.75 3.75 3.75 3.75 3.0 3.0 3.0 3.0 3.75 3.75 3.75 3.75 3.75 3.75 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.75 3.75 3.75 3.75 3.0 3.0 3.0 3.0 3.75 3.75 3.75 3.75 3.75 3.75 3.0 3.0 3.0 3.0 3.0 3.0 Fail-Safe Output State Low Low High High Low Low High High Low Low High High High High Low Low High High Low Low High High High High Low Low High High Low Low High High Low Low High High Low Low High High High High Low Low High High Low Low High High Input Disable No No Yes Yes Yes Yes Yes Yes Yes Yes No No No No No No No No No No No No Yes Yes Yes Yes No No No No Yes Yes Yes Yes Yes Yes Yes Yes No No No No No No No No No No No No Output Enable Yes Yes No No No No No No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No No No Yes Yes Yes Yes No No No No No No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Package Description 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_N 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP Package Option R-16 R-16 RW-16 RW-16 RW-16 RW-16 RQ-16 RQ-16 RQ-16 RQ-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 R-16 R-16 R-16 R-16 R-16 R-16 R-16 R-16 RW-16 RW-16 RW-16 RW-16 RQ-16 RQ-16 RQ-16 RQ-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 Z = RoHS Compliant Part. The ADuM140E1WBRWZ, ADuM140E1WBRWZ-RL, ADuM141E1WBRWZ, ADuM141E1WBRWZ-RL, ADuM141E1WBRQZ, ADuM141E1WBRQZ-RL7, ADuM142E1WBRWZ, ADuM142E1WBRWZ-RL, ADuM142E1WBRQZ, and ADuM142E1WBRQZ-RL7 are qualified for automotive applications. Rev. I | Page 29 of 30 ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E Data Sheet AUTOMOTIVE PRODUCTS The ADuM140E1W, ADuM141E1W and ADuM142E1W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. (c)2015-2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13119-0-8/18(I) Rev. I | Page 30 of 30