1
LTC1062
1062fd
10Hz 5th Order Butterworth Lowpass Filter Filter Amplitude Response and Noise
■
Lowpass Filter with No DC Error
■
Low Passband Noise
■
Operates DC to 20kHz
■
Operates On a Single 5V Supply or Up to ±8V
■
5th Order Filter
■
Maximally Flat Response
■
Internal or External Clock
■
Cascadable for Faster Rolloff
■
Buffer Available
The LTC
®
1062 is a 5th order all pole maximally flat
lowpass filter with no DC error. Its unusual architecture
puts the filter outside the DC path so DC offset and low
frequency noise problems are eliminated. This makes the
LTC1062 very useful for lowpass filters where DC accuracy
is important.
The filter input and output are simultaneously taken across
an external resistor. The LTC1062 is coupled to the signal
through an external capacitor. This RC reacts with the
internal switched capacitor network to form a 5th order
rolloff at the output.
The filter cutoff frequency is set by an internal clock that
can be externally driven. The clock-to-cutoff frequency
ratio is typically 100:1, allowing the clock ripple to be
easily removed.
Two LTC1062s can be cascaded to form a 10th order quasi
max flat lowpass filter. The device can be operated with
single or dual supplies ranging from ±2.5V to ±9V.
The LTC1062 is manufactured using Linear Technology’s
enhanced LTCMOS
TM
silicon gate process.
■
60Hz Lowpass Filters
■
Antialiasing Filter
■
Low Level Filtering
■
Rolling Off AC Signals from High DC Voltages
■
Digital Voltmeters
■
Scales
■
Strain Gauges
LTCMOS is a trademark of Linear Technology Corporation.
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
C
OSC=
3900pF
1062 TA01
1µF
V
IN
25.8k
V
+
= 5V
V
–
= –5V
DC ACCURATE
OUTPUT
BUFFERED
OUTPUT
NOTE: TO ADJUST OSCILLATOR FREQUENCY,
USE A 6800pF CAPACITOR IN SERIES
WITH A 50k POT FROM PIN 5 TO GROUND
INPUT FREQUENCY (Hz)
1
–100
AMPLITUDE RESPONSE (dB)
–80
–60
–40
–20
10 100
1062 TA02
0
–90
–70
–50
0
FILTER OUTPUT NOISE (µV/√Hz)
20
40
10
30
50
–30
–10
COSC = 3900pF
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
5th Order Lowpass Filter
2
LTC1062
1062fd
Total Supply Voltage (V
+
to V
–
)............................... 18V
Input Voltage at Any Pin ..... V
–
– 0.3V ≤ V
IN
≤ V
+
+ 0.3V
Operating Temperature Range
LTC1062M (OBSOLETE)............. –55°C ≤ T
A
≤ 125°C
LTC1062C ................................... –40°C ≤ T
A
≤ 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
(Note 1)
The ● denotes specifications which apply over the full operating tempera-
ture range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = –5V, unless otherwise specified. AC output measured at Pin 7,
Figure 1.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supply Current C
OSC
(Pin 5 to V
–
, Pin 11 in SW16) = 100pF 4.5 7 mA
●10 mA
Input Frequency Range 0 to 20 kHz
Filter Gain at f
IN
= 0 f
CLK
= 100kHz, Pin 4 (Pin 6 in SW16) at V
+
, 0.00 dB
f
IN
= 0.5f
C
(Note 2) C = 0.01µF, R = 25.78k –0.02 –0.3 dB
f
IN
= f
C
●–2 –3.00 dB
f
IN
= 2f
C
●–28–30.00 dB
f
IN
= 4f
C
●–52–60.00 dB
Clock-to-Cutoff Frequency Ratio, f
CLK
/f
C
f
CLK
= 100kHz, Pin 4 (Pin 6 in SW16) at V
+
,100 ±1%
C = 0.01µF, R = 25.78k
Filter Gain at f
IN
= 16kHz f
CLK
= 400kHz, Pin 4 at V
+
, C = 0.01µF, R = 6.5k ●–43 –52 dB
f
CLK
/f
C
Tempco f
CLK
= 400kHz, Pin 4 at V
+
, C = 0.01µF, R = 6.5k 10 ppm/°C
Filter Output (Pin 7, Pin 13 in SW16) DC Swing Pin 7/Pin13 (SW16) Buffered with an External Op Amp ●±3.5 ±3.8 V
Clock Feedthrough 1mV
P-P
PACKAGE/ORDER I FOR ATIO
UU
W
ORDER PART
NUMBER
LTC1062CN8
T
J MAX
= 100°C, θ
JA
= 130°C/W
T
J MAX
= 150°C, θ
JA
= 90°C/W
LTC1062CSW
ORDER PART
NUMBER
1
2
3
4
5
6
7
8
TOP VIEW
SW PACKAGE
16-LEAD PLASTIC SO
16
15
14
13
12
11
10
9
NC
NC
FB
AGND
V–
NC
NC
NC
NC
B
OUT
OUT
V
+
C
OSC
NC
NC
DIVIDER
RATIO
1
2
3
4
8
7
6
5
TOP VIEW
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
N8 PACKAGE
8-LEAD PDIP
J8 PACKAGE 8-LEAD CERDIP
T
J MAX
= 150°C, θ
JA
= 100°C/W
LTC1062MJ8
LTC1062CJ8
OBSOLETE PACKAGE
Consider the N8 Package as an Alternate Source
ELECTRICAL CHARACTERISTICS
ABSOLUTE AXI U RATI GS
WWWU
3
LTC1062
1062fd
The ● denotes specifications which apply over the full operating tempera-
ture range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = –5V, unless otherwise specified, AC output measured at Pin 7,
Figure 1.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Internal Buffer
Bias Current 250 pA
●170 1000 pA
Offset Voltage 220 mV
Voltage Swing R
LOAD
= 20k ●±3.5 ±3.8 V
Short-Circuit Current Source/Sink 40/3 mA
Clock (Note 3)
Internal Oscillator Frequency C
OSC
(Pin 5 to V
–
, Pin 11 in SW16) = 100pF 25 32 50 kHz
●15 65 kHz
Max Clock Frequency 4 MHz
Pin 5 (Pin 11 in SW16) Source or Sink Current ●40 80 µA
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
Note 2: f
C
is the frequency where the gain is –3dB with respect to the input
signal.
Note 3: The external or driven clock frequency is divided by either 1, 2 or 4
depending upon the voltage at Pin 4. For the N8 package, when Pin 4 = V
+
,
ratio = 1; when Pin 4 = GND, ratio = 2; when Pin 4 = V
–
, ratio = 4.
Amplitude Response Normalized
to the Cutoff Frequency
f
IN
/f
C
0.1
–100
RESPONSE (dB)
–80
–60
–40
–20
110
1062 G01
0
–90
–70
–50
–30
–10
1
2πRC =
V
S
= ±2.5V
T
A
= 25°C
f
C
1.62
f
CLK
= 500kHz, f
C
= 5kHz
f
CLK
= 250kHz, f
C
= 2.5kHz
f
CLK
= 100kHz, f
C
= 1kHz
f
CLK
= 1kHz, f
C
= 10Hz
f
CLK
= 10kHz, f
C
= 100Hz
f
IN
/f
C
0.1
–100
RESPONSE (dB)
–80
–60
–40
–20
110
1062 G01
0
–90
–70
–50
–30
–10
1
2πRC =
V
S
= ±2.5V
T
A
= 25°C
f
C
1.62
f
CLK
= 500kHz, f
C
= 5kHz
f
CLK
= 250kHz, f
C
= 2.5kHz
f
CLK
= 100kHz, f
C
= 1kHz
f
CLK
= 1kHz, f
C
= 10Hz
f
CLK
= 10kHz, f
C
= 100Hz
fIN/fC
–1.0
–0.4
–0.6
–0.8
0.4
0.2
0
–0.2
1062 G03
PASSBAND GAIN (dB)
0.1 0.2 0.4 0.6 0.8 1
VS = ±5V
TA = 25°C
fCLK = 100kHz
1
2πRC =fC
1.6
1
2πRC =fC
1.62 1
2πRC =fC
1.64
Amplitude Response Normalized
to the Cutoff Frequency
Passband Gain
vs Input Frequency
ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
UW
4
LTC1062
1062fd
Passband Gain
vs Input Frequency and Temperature
Passband Phase Shift
vs Input Frequency Filter Noise Spectral Density
fIN/fC
–1.0
–0.4
–0.6
–0.8
0.4
0.2
0
–0.2
1062 G04
PASSBAND GAIN (dB)
0.1 0.2 0.4 0.6 0.8 1
VS = ±5V
fCLK = 100kHz
1
2πRC =fC
1.62 TA = 125°C
TA = –55°C
f
IN
/f
C
–210
–120
–150
–180
0
–30
–60
–90
1062 G05
PHASE SHIFT (DEG)
0.1 0.2 0.4 0.6 0.8 1
V
S
= ±5V
f
CLK
= 100kHz
1
2πRC =f
C
1.62
T
A
= 25°C
CUTOFF FREQUENCY (Hz)
20
FILTER OUTPUT NOISE (µV/√Hz)
30
50
70
80
0.1 10 100 10k
1062 G06
10
11k
60
40
0
VS = ±5V
TA = 25°C
fC = 10Hz
fC = 1kHz
fC = 100Hz
Normalized Oscillator Frequency,
fOSC vs Supply Voltage
Oscillator Frequency, fOSC
vs Ambient Temperature
V
SUPPLY
(V)
4
OSCILLATOR FREQUENCY NORMALIZED
TO f
OSC
AT 5V SUPPLY
1.1
1.2
1.3
20
1062 G07
1.0
0.9
0.7 812 16 18
610 14
0.8
1.6
1.5
1.4
AMBIENT TEMPERATURE (°C)
–50
60
OSCILLATOR FREQUENCY (kHz)
80
120
140
160
260
200
050 75
1062 G08
100
220
240
180
–25 25 100 125
C
OSC
= 0pF
V
+
= 10V
V
–
= 0V
V
+
= 5V
V
–
= 0V
Power Supply Current
vs Power Supply Voltage
POWER SUPPLY VOLTAGE (V)
4
SUPPLY CURRENT (mA)
8
12
20
1062 G09
4
0812 16
610 14 18
16
6
10
2
14
T
A
= –55°C
T
A
= 25°C
T
A
= 125°C
TYPICAL PERFOR A CE CHARACTERISTICS
UW
5
LTC1062
1062fd
8
7
6
5
1
2
3
4
SWITCHED
CAPACITOR
NETWORK
CLOCK GEN
÷ 1, 2, 4 OSC
B
OUT
OUT
V
+
C
OSC
1062 BD
÷
V
–
AGND
FB
f
CLK
×1
BY CONNECTING PIN 4 TO V
+
, AGND OR V
–
, THE
OUTPUT FREQUENCY OF THE INTERNAL CLOCK
GENERATOR IS THE OSCILLATOR FREQUENCY DI-
VIDED BY 1, 2, 4. THE (f
CLK
/f
C
) RATIO OF 100:1 IS
WITH RESPECT TO THE INTERNAL CLOCK GENERA-
TOR OUTPUT FREQUENCY. PIN 5 CAN BE DRIVEN
WITH AN EXTERNAL CMOS LEVEL CLOCK. THE
LTC1062 CAN ALSO BE SELF-CLOCKED BY CON-
NECTING AN EXTERNAL CAPACITOR (C
OSC
) TO
GROUND (OR TO V
–
IF C
OSC
IS POLARIZED). UNDER
THIS CONDITION AND WITH ±5V SUPPLIES, THE
INTERNAL OSCILLATOR FREQUENCY IS:
f
OSC
≅ 140kHz [33pF/(33pF + C
OSC
)]
AC TEST CIRCUIT
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062 0.1µF
MEASURED
OUTPUT
7
4
8
1
6
0.1µF
1062 F01
C = 0.01µF
V
IN
R = 25.8k
50Ω
5V
–5V
2
3
–5V
5V
f
CLK
= 100kHz
5V
V
–
= –5V R′
–
+
LTC1052
1
2πRC
FOR BEST MAX FLAT APPROXIMATION,
THE INPUT RC SHOULD BE SUCH AS:
A 0.5k RESISTOR, R′, SHOULD BE USED IF
THE BIPOLAR EXTERNAL CLOCK IS APPLIED
BEFORE THE POWER SUPPLIES TURN ON
1
1.63
f
CLK
100
=•
For Adjusting Oscillator Frequency, Insert a 50k Pot in Series with COSC. Use Two Times Calculated COSC
Figure 1
BLOCK DIAGRA
W
6
LTC1062
1062fd
Filter Input Voltage Range
Every node of the LTC1062 typically swings within 1V of
either voltage supply, positive or negative. With the appro-
priate external (RC) values, the amplitude response of all
the internal or external nodes does not exceed a gain of
0dB with the exception of Pin 1. The amplitude response
of the feedback node (Pin 1) is shown in Figure 2. For an
input frequency around 0.8 • f
C
, the gain is 1.7V/V and, with
±5V supplies, the peak-to-peak input voltage should not
exceed 4.7V. If the input voltage goes beyond this value,
clipping and distortion of the output waveform occur, but
the filter will not get damaged nor will it oscillate. Also, the
absolute maximum input voltage should not exceed the
power supplies.
Typical Performance Characteristics. The decrease of the
maximum attenuation is due to the rolloff at higher
frequencies of the loop gains of the various internal
feedback paths and not to the increase of the noise floor.
For instance, for a 100kHz clock and 1kHz cutoff fre-
quency, the maximum attenuation is about 64dB. A 4kHz,
1VRMS input signal will be predictably attenuated by 60dB
at the output. A 6kHz, 1VRMS input signal will be attenu-
ated by 64dB and not by 77dB as an ideal 5th order
maximum flat filter would have dictated. The LTC1062
output at 6kHz will be about 630µVRMS. The measured
RMS noise from DC to 17kHz was 100µVRMS which is
16dB below the filter output.
C
OSC
, Pin 5
The C
OSC
, Pin 5, can be used with an external capacitor,
C
OSC
, connected from Pin 5 to ground. If C
OSC
is polarized
it should be connected from Pin 5 to the negative supply,
Pin 3. C
OSC
lowers the internal oscillator frequency. If
Pin 5 is floating, an internal 33pF capacitor plus the
external interpin capacitance set the oscillator frequency
around 140kHz with ±5V supply. An external C
OSC
will
bring the oscillator frequency down by the ratio (33pF)/
(33pF + C
OSC
). The Typical Performance Characteristics
curves provide the necessary information to get the inter-
nal oscillator frequency for various power supply ranges.
Pin 5 can also be driven with an external CMOS clock to
override the internal oscillator. Although standard 7400
series CMOS gates do not guarantee CMOS levels with the
current source and sink requirements of Pin 5, they will, in
reality, drive the C
OSC
pin. CMOS gates conforming to
standard B series output drive have the appropriate volt-
age levels and more than enough output current to
simultaneously drive several LTC1062 C
OSC
pins. The
typical trip levels of the internal Schmitt trigger which
input is Pin 5, are given in Table 1.
Table 1
V
SUPPLY
V
TH+
V
TH–
±2.5V 0.9V –1V
±5V 1.3V –2.1V
±6V 1.7V –2.5V
±7V 1.75V –2.9V
f
IN
/f
C
0.1
–14
V
PIN1
/V
IN
(dB)
–10
–6
–2
2
110
1062 F02
6
–12
–8
–4
0
41
2πRC =f
C
1.62
V
S
= ±5V
Figure 2. Amplitude Response of Pin 1
Internal Buffer
The internal buffer out (Pin 8) and Pin 1 are part of the
signal AC path. Excessive capacitive loading will cause
gain errors in the passband, especially around the cutoff
frequency. The internal buffer gain at DC is typically
0.006dB. The internal buffer output can be used as a filter
output, however, it has a few millivolts of DC offset. The
temperature coefficient of the internal buffer is typically
1µV/°C.
Filter Attenuation
The LTC1062 rolloff is typically 30dB/octave. When the
clock and the cutoff frequencies increase, the filter’s
maximum attenuation decreases. This is shown in the
APPLICATIO S I FOR ATIO
WUUU
7
LTC1062
1062fd
Divide By 1, 2, 4 (Pin 4)
By connecting Pin 4 to V
+
, to mid supplies or to V
–
, the
clock frequency driving the internal switched capacitor
network is the oscillator frequency divided by 1, 2, 4
respectively. Note that the f
CLK
/f
C
ratio of 100:1 is with
respect to the internal clock generator output frequency.
The internal divider is useful for applications where octave
tuning is required. The ÷2 threshold is typically ±1V from
the mid supply voltage.
Transient Response
Figure 3 shows the LTC1062 response to a 1V input step.
Filter Noise
The filter wideband RMS noise is typically 100µV
RMS
for
±5V supply and it is nearly independent from the value of
the cutoff frequency. For single 5V supply the RMS noise
is 80µV
RMS
. Sixty-two percent of the wideband noise is in
the passband, that is from DC to f
C
. The noise spectral
density, unlike conventional active filters, is nearly zero for
frequencies below 0.1 • f
C
. This is shown in the Typical
Performance Characteristics section. Table 2 shows the
LTC1062 RMS noise for different noise bandwidths.
Table 2
NOISE BW RMS NOISE (V
S
= ±5V)
DC – 0.1 • f
C
2µV
DC – 0.25 • f
C
8µV
DC – 0.5 • f
C
20µV
DC – 1 • f
C
62µV
DC – 2 • f
C
100µV
200mV/VERT DIV
50ms/HORIZ DIV, fC = 10Hz
5ms/HORIZ DIV, fC = 100Hz
0.5ms/HORIZ DIV, fC = 1kHz
1
2πRC
fC
1.62
=
1
2πRC
f
C
1.94
=
1
2πRC
fC
2.11
=
Figure 3. Step Response to a 1V Peak Input Step
APPLICATIO S I FOR ATIO
WUUU
8
LTC1062
1062fd
AC Coupling an External CMOS Clock Powered
from a Single Positive Supply, V+
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
0.01µFV
+
0
1062 TA03
C
V
IN
V
+
100k
V
OUT
V
–
Adding an External (R1, C1) to Eliminate the Clock Feedthrough and
to Improve the High Frequency Attenuation Floor
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
V
OUT
V
+
f
CLK
1062 TA04
C
C1
0.01C
V
IN
R
V
–
R1
10R
–
+
EXTERNAL
BUFFER
Filtering AC Signals from High DC Voltages
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
CLK IN = f
C
• 100
1062 TA05
C
0.01µF
C
0.01µF
12R
309.6k
V
IN
R
25.8k
V
–
= –5V
V
+
= 5V
DC OUTPUT
EXAMPLE:
f
CLK
= 100KHz, f
C
= 1kHz. THE FILTER ACCURATELY PASSES
THE HIGH DC INPUT AND ACTS AS 5TH ORDER LP FILTER
FOR THE AC SIGNALS RIDING ON THE DC
HIGH DC INPUT = 100V
f
IN
/f
C
0.01
–1.4
PASSBAND GAIN (dB)
–1.0
–0.6
0.2
0.1 1
1062 TA06
–0.2
–1.2
–0.8
0
–0.4
V
S
= ±5V
f
CLK
= 100kHz
Passband Amplitude Response for the
High DC Accurate 5th Order Filter
TYPICAL APPLICATIO S
U
9
LTC1062
1062fd
Cascading Two LTC1062s to Form a Very
Selective Clock Sweepable Bandpass Filter
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
1062 TA07
V
IN
R1
10k
f
CLK
V
OUT
5V
–5V 5V
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
–5V
R2
10k
R′1
10k
R′2
12.5k
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
1062 TA08
V
IN
R1
–5V
f
CLK
V
OUT
5V
R2 R3
Clock Tunable Notch Filter
For Simplicity Use R3 = R4 = R5 = 10k;
–
+
R5R4
R5
R2 = 1.234, = 79.3
1
f
CLK
f
NOTCH
Frequency Response of the Bandpass Filter
(kHz)
0.5
(dB)
–80
–60
–40
–20
11.5 2 2.5
1062 TA09
3 3.5 4 4.5
0
–90
–70
–50
–30
10
20
–10
VS = ±5V
VIN = 100mVRMS
= 1
R1
R2
= 0.8
R′1
R′2
Frequency Response of the Notch Filter
(Hz)
100
(dB)
–10
0
10
20
30
40
50
60
70
900
1062 TA10
300 500 700 1100
TYPICAL APPLICATIO S
U
10
LTC1062
1062fd
Simple Cascading Technique
FB
AGND
V–
DIVIDER
RATIO
BOUT
OUT
V+
COSC
1
2
3
4
8
7
6
5
LTC1062 0.1µF
DC ACCURATE
OUTPUT
7
4
8
1
6
0.1µF
1062 TA11
0.1µF
VIN
412k
V+ = 5V
fCLK = 1kHz
10Hz, 10TH ORDER DC ACCURATE LOWPASS FILTER
60dB/OCTAVE ROLLOFF
0.5dB PASSBAND ERROR, 0dB DC GAIN
MAXIMUM ATTENUATION 110dB (fCLK = 10kHz)
100dB (fCLK = 1kHz)
95dB (fCLK = 1MHz)
2
3
–5V
5V
–5V
FB
AGND
V–
DIVIDER
RATIO
BOUT
OUT
V+
COSC
1
2
3
4
8
7
6
5
LTC1062
1µF
–5V
25.8k
–
+
LTC1052
100Hz, 50Hz, 25Hz 5th Order DC Accurate LP Filter
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
1062 TA12
0.1µF
1
2
3
4
0.1µF
1/2 CD4016
V
IN
25.8k
–5V 5V
10kHz
CLK IN
B
OUT
0.2µF
V
OUT
13 5
TO PIN 13 OF CD4016
TO PIN 5 OF CD4016
BY CONNECTING PIN 4 OF THE LTC1062
HIGH/GROUND/LOW THE FILTER CUTOFF
FREQUENCY IS 100Hz/50Hz/25Hz
100k
–5V
–5V
5V
5V
100k
CONTROL
(HIGH, GROUND, LOW)
100k
100k
TYPICAL APPLICATIO S
U
11
LTC1062
1062fd
7th Order 100Hz Lowpass Filter with Continuous Output Filtering, Output Buffering and Gain Adjustment
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
1µF
V
IN
2.6k
–5V
5V
5V
1062 TA13
10kHz
CLK IN
DC GAIN
1
10
R3
∞
3.57k
R4
0
32.4k
R1
14.3k
46k
R2
53.6k
274k
C1
0.1µF
0.01µF
C2
0.033µF
0.02µF
THE LTC1052 IS CONNECTED AS A 2ND ORDER SALLEN AND KEY LOWPASS FILTER WITH A CUTOFF
FREQUENCY EQUAL TO THE CUTOFF FREQUENCY OF THE LTC1062. THE ADDITIONAL FILTERING
ELIMINATES ANY 10kHz CLOCK FEEDTHROUGH PLUS DECREASES THE WIDEBAND NOISE OF THE FILTER
DC OUTPUT OFFSET (REFERRED TO A DC GAIN OF UNITY) = 5µV MAX
WIDEBAND NOISE (REFERRED TO A DC GAIN OF UNITY) = 60µV
RMS
R1
–
+
3
0.1µF
0.1µF
V
OUT
27
5V
6
8
4
1
C2
–5V
C1
R3 R4
R2 LTC1052
OUTPUT FILTER COMPONENT VALUES
Single 5V Supply 5th Order LP Filter
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
1062 TA14
C C
V
IN
R
5V
10µF
SOLID
TANTALUM
5V
25k
5V
CLK
FOR A 10Hz FILTER: R = 29.4k, C = 1µF, f
CLK
= 1kHz
THE FILTER IS MAXIMALLY FLAT FOR
DC ACCURATE
OUTPUT
BUFFERED
OUTPUT
25k
12R
+
1
2πRC =f
C
1.84
TYPICAL APPLICATIO S
U
12
LTC1062
1062fd
A Lowpass Filter with a 60Hz Notch
FB
AGND
V–
DIVIDER
RATIO
BOUT
OUT
V+
COSC
1
2
3
4
8
7
6
5
LTC1062
1062 TA15
VIN
R
9.09k
C
1µF
V–
CLK IN
2.84kHz
VOUT
V+
R2
20k
R3
20k
R4
10k
–
+
R6
19.35k
R5
10k
A1
1/2 LT1013
–
+
A2
1/2 LT1013
R7
20k
C7
0.1µF
1
2πRC =fCLK
100 • 1.62
Frequency Response of the Above Lowpass Filter
with the Notch fNOTCH = fCLK/47.3
fIN (Hz)
1
30
VOUT/VIN (Hz)
10
–10
10 100 1k
1062 TA16
50
40
20
0
60
70
TYPICAL APPLICATIO S
U
13
LTC1062
1062fd
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
J8 0801
.014 – .026
(0.360 – 0.660)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.125
3.175
MIN
.100
(2.54)
BSC
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457) 0° – 15°
.005
(0.127)
MIN
.405
(10.287)
MAX
.220 – .310
(5.588 – 7.874)
1234
87
65
.025
(0.635)
RAD TYP
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
.045 – .065
(1.143 – 1.651)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
OBSOLETE PACKAGE
U
PACKAGE DESCRIPTIO
14
LTC1062
1062fd
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
N8 1002
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.130 ± .005
(3.302 ± 0.127)
.020
(0.508)
MIN
.018 ± .003
(0.457 ± 0.076)
.120
(3.048)
MIN
12 34
87 65
.255 ± .015*
(6.477 ± 0.381)
.400*
(10.160)
MAX
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
U
PACKAGE DESCRIPTIO
15
LTC1062
1062fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
S16 (WIDE) 0502
NOTE 3
.398 – .413
(10.109 – 10.490)
NOTE 4
16 15 14 13 12 11 10 9
1
N
2345678
N/2
.394 – .419
(10.007 – 10.643)
.037 – .045
(0.940 – 1.143)
.004 – .012
(0.102 – 0.305)
.093 – .104
(2.362 – 2.642)
.050
(1.270)
BSC .014 – .019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 3
.009 – .013
(0.229 – 0.330)
.005
(0.127)
RAD MIN
.016 – .050
(0.406 – 1.270)
.291 – .299
(7.391 – 7.595)
NOTE 4
× 45°
.010 – .029
(0.254 – 0.737)
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.420
MIN
.325 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
N
123 N/2
.050 BSC
.030 ±.005
TYP
U
PACKAGE DESCRIPTIO
16
LTC1062
1062fd
LINEAR TE CHNO LOGY CORP O R ATION 1994
LW/TP 1102 1K REV D • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
A Low Frequency, 5Hz Filter Using Back-to-Back Solid Tantalum Capacitors
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
0.08µF
1062 TA17
10µF
10µF
V
IN
5.23k
5V–5V
V
OUT
BV
OUT
+
+
TYPICAL APPLICATIO
U
PART NUMBER DESCRIPTION COMMENTS
LTC1063 5th Order Butterworth Lowpass, DC Accurate Clock Tunable, No External Components
LTC1065 5th Order Bessel Lowpass, DC Accurate Clock Tunable, No External Components
LTC1066-1 8th Order Elliptic or Linear Phase, DC Accurate Clock Tunable, fc ≤ 120kHz
LTC1563-2/
LTC1563-3 Active RC, 4th Order Lowpass Very Low Noise, 256Hz ≤ fc ≤ 256kHz
LTC1564 10kHz to 150kHz Digitally Controlled Lowpass and PGA Continuous Time, Very High Dynamic Range, PGA Included
LTC1569-6 Linear Phase, DC Accurate, 10th Order No External Clock Required, fc ≤ 64kHz, S08
LTC1569-7 Linear Phase, DC Accurate, 10th Order No External Clock Required, fc ≤ 300kHz, S08
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